CN106371877A - Algorithm updating system for field programmable gate array board card - Google Patents

Algorithm updating system for field programmable gate array board card Download PDF

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Publication number
CN106371877A
CN106371877A CN201610787245.2A CN201610787245A CN106371877A CN 106371877 A CN106371877 A CN 106371877A CN 201610787245 A CN201610787245 A CN 201610787245A CN 106371877 A CN106371877 A CN 106371877A
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CN
China
Prior art keywords
algorithm
gate array
programmable gate
field programmable
array board
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Pending
Application number
CN201610787245.2A
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Chinese (zh)
Inventor
赵贺辉
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Inspur Beijing Electronic Information Industry Co Ltd
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Inspur Beijing Electronic Information Industry Co Ltd
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Priority to CN201610787245.2A priority Critical patent/CN106371877A/en
Publication of CN106371877A publication Critical patent/CN106371877A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/70Software maintenance or management
    • G06F8/71Version control; Configuration management

Abstract

The invention discloses an algorithm updating system for a field programmable gate array board card. The algorithm updating system comprises a main server, an end server and a field programmable gate array board card, wherein the main server is used for storing an algorithm file and corresponding version information, and issuing an algorithm burning command and an algorithm updating command to the end server according to an updating instruction; the end server is correspondingly connected with the field programmable gate array board card, and is used for downloading an algorithm file indicated by the algorithm burning command from the main server after the algorithm burning command is received, and writing the downloaded algorithm file into the field programmable gate array board card through a driving module; the field programmable gate array board card is used for executing the algorithm file after the algorithm updating command is received, and performing algorithm updating. By adopting the algorithm updating system for the field programmable gate array board card, automatic updating and upgrading of a field programmable gate array board card algorithm are realized.

Description

A kind of field programmable gate array board algorithm more new system
Technical field
The present invention relates to algorithm update method field, more particularly to a kind of field programmable gate array board algorithm renewal System.
Background technology
Field programmable gate array (field-programmable gate array, fpga) is a kind of FPGA Device, can execute multiple threads in Different Logic, realize pipeline and parallel design, have stronger parallel processing capability, at present Become the acceleration device being applied to Heterogeneous Computing field main flow.
In prior art, to the field programmable gate array board being applied to isomery acceleration, its algorithm is updated rise During level, it is board to be connected with server by manually operating, to be updated upgrading it is seen that its operation is numerous to board programming program Trivial, waste time and energy.
Content of the invention
In consideration of it, the present invention provides a kind of field programmable gate array board algorithm more new system it is achieved that can to scene Program automatically updating of gate array board algorithm.
For achieving the above object, the following technical scheme of present invention offer:
A kind of field programmable gate array board algorithm more new system, can compile including master server, end server and scene Journey gate array board;
Described master server is used for storing algorithm file and corresponding version information, and is taken to described end according to more new command Business device issues algorithm programming order and algorithm more newer command;
Described end server is corresponding with described field programmable gate array board to be connected, for receiving described algorithm burning The algorithm file of described algorithm programming order instruction after write order, is downloaded from described master server, and by under drive module general The algorithm file carrying is written to described field programmable gate array board;
Described field programmable gate array board is provided with described drive module, and described drive module is used for realizing described end Data transfer between server and described field programmable gate array board, described field programmable gate array board is receiving Execute algorithm file to after the more newer command of described algorithm, enter line algorithm and update.
Alternatively, including multiple described field programmable gate array boards and multiple described ends server, multiple described ends Server is connected one to one with multiple described field programmable gate array boards.
Alternatively, described end server is additionally operable to the algorithm file downloaded be verified, if verifying out described download Algorithm document lending, then send Defect Indication information to described master server it is desirable to re-download algorithm file.
Alternatively, the algorithm file of download is written to described field programmable gate by drive module by described end server Array board includes: the algorithm file of download is written to described field-programmable by described drive module by described end server The algorithm performs unit of gate array board;
Described field programmable gate array board executes algorithm file after receiving the more newer command of described algorithm, is calculated Method updates and includes:
After receiving the more newer command of described algorithm, algorithm performs unit executes calculation to described field programmable gate array board Method file, enters line algorithm and updates.
Alternatively, the algorithm file of download is written to described field programmable gate by drive module by described end server Array board includes: the algorithm file of download is written to described field-programmable by described drive module by described end server The sudden strain of a muscle memory module of gate array board;
Described field programmable gate array board executes algorithm file after receiving the more newer command of described algorithm, is calculated Method updates and includes:
, after receiving the more newer command of described algorithm, algorithm performs unit is from described for described field programmable gate array board Dodge memory module to read algorithm file and execute algorithm file, enter line algorithm and update.
Alternatively, described field programmable gate array board executes algorithm literary composition after receiving the more newer command of described algorithm Part, enters line algorithm renewal and includes:
Described field programmable gate array board executes algorithm file after receiving the more newer command of described algorithm;
Described field programmable gate array board restarts, and reloads described algorithm file, is initialized and join Put.
Alternatively, described end server is additionally operable to detect the algorithm file being written to described field programmable gate array board Whether complete, if imperfect, again through described drive module, the algorithm file of download is written to described field-programmable Gate array board.
Alternatively, described master server is communicated by cable network or wireless network with described end server.
As shown from the above technical solution, the field programmable gate array board algorithm more new system that the present invention provides, including Master server, end server and field programmable gate array board, wherein, master server is used for storing algorithm file and corresponding Version information, and algorithm programming order and algorithm more newer command are issued to end server according to more new command;End server is with now Field programmable gate array board is corresponding to be connected, and downloads from master server after receiving the algorithm programming order that master server issues Corresponding algorithm file, and the algorithm file of download is written to by field programmable gate array board by drive module, scene Programmable gate array board executes algorithm file according to algorithm more newer command, enters line algorithm and updates.Therefore, scene of the present invention can be compiled Journey gate array board algorithm more new system is it is achieved that automatically update upgrading to field programmable gate array board algorithm.
Brief description
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing Have technology description in required use accompanying drawing be briefly described it should be apparent that, drawings in the following description be only this Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, acceptable Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is a kind of schematic diagram of field programmable gate array board algorithm more new system provided in an embodiment of the present invention.
Specific embodiment
In order that those skilled in the art more fully understand the technical scheme in the present invention, real below in conjunction with the present invention Apply the accompanying drawing in example, the enforcement it is clear that described is clearly and completely described to the technical scheme in the embodiment of the present invention Example is only a part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, this area is common The every other embodiment that technical staff is obtained under the premise of not making creative work, all should belong to present invention protection Scope.
The embodiment of the present invention provides a kind of field programmable gate array board algorithm more new system, including master server, end Server and field programmable gate array board;
Described master server is used for storing algorithm file and corresponding version information, and is taken to described end according to more new command Business device issues algorithm programming order and algorithm more newer command;
Described end server is corresponding with described field programmable gate array board to be connected, for receiving described algorithm burning The algorithm file of described algorithm programming order instruction after write order, is downloaded from described master server, and by under drive module general The algorithm file carrying is written to described field programmable gate array board;
Described field programmable gate array board is provided with described drive module, and described drive module is used for realizing described end Data transfer between server and described field programmable gate array board, described field programmable gate array board is receiving Execute algorithm file to after the more newer command of described algorithm, enter line algorithm and update.
As can be seen that the present embodiment field programmable gate array board algorithm more new system, including master server, end service Device and field programmable gate array board, wherein, master server is used for storing algorithm file and corresponding version information, and according to More new command issues algorithm programming order and algorithm more newer command to end server;End server and field programmable gate array plate Card is corresponding to be connected, and downloads corresponding algorithm file from master server after receiving the algorithm programming order that master server issues, And the algorithm file of download is written to by field programmable gate array board, field programmable gate array board by drive module Algorithm file is executed according to algorithm more newer command, enters line algorithm and update.Therefore, the present embodiment field programmable gate array board is calculated Method more new system is it is achieved that automatically update upgrading to field programmable gate array board algorithm.
Below the present embodiment field programmable gate array board algorithm more new system is described in detail.The present embodiment is existing Field programmable gate array board algorithm more new system, is applied to the field programmable gate array board accelerating device for isomery Algorithm be updated.
Refer to Fig. 1, the field programmable gate array board algorithm more new system that the present embodiment provides, including master server 10th, end server 11 and field programmable gate array board 12.
Wherein, described master server 10 is used for storing algorithm file and corresponding version information, provides to end server, and Realize carrying out active control to the renewal upgrading of board algorithm, specifically algorithm can be issued to end server 11 according to more new command Programming order and algorithm more newer command.When field programmable gate array board needs to update upgrading into line algorithm, to main service Device 10 sends more new command, controls the renewal carrying out board algorithm by master server.
Described end server 11 is corresponding with described field programmable gate array board 12 to be connected, and the present embodiment system includes Multiple field programmable gate array boards 12, each field programmable gate array board 12 are connected with corresponding end server 11, The topological structure of described master server 10, end server 11 and field programmable gate array board 12 forms a LAN, In the network, it is possible to achieve the batch updating to field programmable gate array board, can flexibly control, user flexibility can be met Changeable demand.
In data center or large-scale machine room, the substantial amounts of field-programmable gate array accelerating device for isomery can be provided with Strake card, updates upgrading, complex operation using existing method to board algorithm, wastes time and energy, be rapidly completed algorithm more new liter Level is extremely difficult.The present embodiment more new system can carry out board batch and automatically update, and can quickly update board according to demand Algorithm.
Described master server 10 can be communicated by cable network or wireless network with end server 11, mutually transmits Instruction or transmission data.
Described end server 11, after receiving the algorithm programming order that master server 10 issues, is downloaded from master server 10 The algorithm file of algorithm programming order instruction.Below scheme is specifically included: end server 11 is receiving algorithm burning during being somebody's turn to do After write order, it is downloaded preparation, prepare download algorithm file;When ready, send to download to master server 10 and ask Ask;, after receiving download request, to end server 11 transmission algorithm file, end server 11 is from master server for master server 10 10 download algorithm files.
In the present embodiment, described end server 11 is additionally operable to the algorithm file downloaded be verified, if verifying out download Algorithm document lending, then send Defect Indication information to master server 10 it is desirable to re-download algorithm file, so pass through school Test the correctness of the algorithm file ensureing to download.
Described field programmable gate array board 10 is provided with drive module, drive module be used for realizing end server 11 with Data transfer between field programmable gate array board 12, makes host-host protocol match it is ensured that correct data transfer.
In the present embodiment, the algorithm file of download is written to field-programmable gate array by drive module by end server 11 Strake card 12, to field programmable gate array board 12 programming algorithm file.Specifically, the algorithm file of download directly can be write Enter the algorithm performs unit of board, or the sudden strain of a muscle memory module that the algorithm file of download can be written to board.
In the first scenario, can compile when the algorithm file of download is written to scene by drive module by end server 11 During the algorithm performs unit of journey gate array, field programmable gate array board 12 after receiving algorithm more newer command, by algorithm Performance element executes algorithm file, enters line algorithm and updates.Specifically, after by algorithm performs unit execution algorithm file, scene can Programming gate array board 12 restarts, and reloads described algorithm file, is initialized and configure, and completes algorithm and updates.
In the latter case, can compile when the algorithm file of download is written to scene by drive module by end server 11 During the sudden strain of a muscle memory module of journey gate array, field programmable gate array board 12 after receiving algorithm more newer command, algorithm performs Unit, from dodging memory module reading algorithm file and executing algorithm file, enters line algorithm and updates.Specifically, field-programmable gate array Strake is stuck in after receiving algorithm more newer command, executes algorithm file, then field programmable gate array by algorithm performs unit Board restarts, and reloads described algorithm file, is initialized and configure, and completes algorithm and updates.
In the present embodiment, described end server 11 is additionally operable to detect the calculation being written to described field programmable gate array board Whether method file is complete, if imperfect, again through described drive module, the algorithm file of download is written to described scene Programmable gate array board.
The present embodiment field programmable gate array board algorithm more new system it is achieved that to board algorithm on-line automatic more Newly, can execute in batches, realize quick renewal;Construct acceleration board grid, algorithm configuration is managed collectively by master server File, and grid is managed collectively, can be according to user's request flexible deployment algorithm and Configuration network, can be flexible Reply changes in demand.
Above detailed Jie is carried out to a kind of field programmable gate array board algorithm more new system provided by the present invention Continue.Specific case used herein is set forth to the principle of the present invention and embodiment, and the explanation of above example is only It is to be used to help understand the method for the present invention and its core concept.It should be pointed out that for those skilled in the art For, under the premise without departing from the principles of the invention, the present invention can also be carried out with some improvement and modify, these improve and repair Decorations also fall in the protection domain of the claims in the present invention.

Claims (8)

1. a kind of field programmable gate array board algorithm more new system it is characterised in that include master server, end server and Field programmable gate array board;
Described master server is used for storing algorithm file and corresponding version information, and according to more new command to described end server Issue algorithm programming order and algorithm more newer command;
Described end server is corresponding with described field programmable gate array board to be connected, for receiving described algorithm programming life After order, download the algorithm file of described algorithm programming order instruction from described master server, and will be downloaded by drive module Algorithm file is written to described field programmable gate array board;
Described field programmable gate array board is provided with described drive module, and described drive module is used for realizing the service of described end Data transfer between device and described field programmable gate array board, described field programmable gate array board is receiving Execute algorithm file after stating algorithm more newer command, enter line algorithm and update.
2. more new system according to claim 1 is it is characterised in that include multiple described field programmable gate array boards With multiple described ends server, multiple described ends server is with multiple described field programmable gate array boards one-to-one corresponding even Connect.
3. more new system according to claim 1 is it is characterised in that described end server is additionally operable to the algorithm literary composition downloaded Part is verified, if verifying out the algorithm document lending of described download, sends Defect Indication information to described master server, Ask and re-download algorithm file.
4. more new system according to claim 1 it is characterised in that described end server pass through drive module by download Algorithm file is written to described field programmable gate array board and includes: described end server will be downloaded by described drive module Algorithm file be written to the algorithm performs unit of described field programmable gate array board;
Described field programmable gate array board executes algorithm file after receiving the more newer command of described algorithm, enters line algorithm more New inclusion:
, after receiving the more newer command of described algorithm, algorithm performs unit execution algorithm is civilian for described field programmable gate array board Part, enters line algorithm and updates.
5. more new system according to claim 1 it is characterised in that described end server pass through drive module by download Algorithm file is written to described field programmable gate array board and includes: described end server will be downloaded by described drive module Algorithm file be written to the sudden strain of a muscle memory module of described field programmable gate array board;
Described field programmable gate array board executes algorithm file after receiving the more newer command of described algorithm, enters line algorithm more New inclusion:
, after receiving the more newer command of described algorithm, algorithm performs unit is from described flash memory for described field programmable gate array board Storage module reads algorithm file and executes algorithm file, enters line algorithm and updates.
6. more new system according to claim 1 is it is characterised in that described field programmable gate array board is receiving Execute algorithm file after the more newer command of described algorithm, enter line algorithm renewal and include:
Described field programmable gate array board executes algorithm file after receiving the more newer command of described algorithm;
Described field programmable gate array board restarts, and reloads described algorithm file, is initialized and configure.
7. the more new system according to any one of claim 1-6 is it is characterised in that described end server is additionally operable to detection and writes Enter whether complete to the algorithm file of described field programmable gate array board, if imperfect, again through described driving mould The algorithm file of download is written to described field programmable gate array board by block.
8. the more new system according to any one of claim 1-6 is it is characterised in that described master server is serviced with described end Device is communicated by cable network or wireless network.
CN201610787245.2A 2016-08-30 2016-08-30 Algorithm updating system for field programmable gate array board card Pending CN106371877A (en)

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CN101420328A (en) * 2008-12-03 2009-04-29 杭州华三通信技术有限公司 System, interface card and method for remote upgrading field programmable gate array
CN102053850A (en) * 2010-12-17 2011-05-11 天津曙光计算机产业有限公司 Method for on-line FPGA logic upgrade
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Application publication date: 20170201