CN106371540B - System power management method, chip and electronic equipment - Google Patents

System power management method, chip and electronic equipment Download PDF

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Publication number
CN106371540B
CN106371540B CN201610730478.9A CN201610730478A CN106371540B CN 106371540 B CN106371540 B CN 106371540B CN 201610730478 A CN201610730478 A CN 201610730478A CN 106371540 B CN106371540 B CN 106371540B
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power
current
regulator
management chip
power supply
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CN106371540A (en
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刘益全
秦世娟
廖宪平
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Lenovo Beijing Ltd
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Lenovo Beijing Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof

Abstract

The embodiment of the invention provides a system power management method, a device and electronic equipment, wherein a system power management chip is respectively connected with each power regulator, so that the system power management chip can uniformly manage each power regulator, in order to enable the system power management chip to identify whether the working state of each power regulator is normal, the corresponding relation between the identifier of the power regulator and a working rated parameter is stored in the system power management chip, each power regulator can upload the current working running state parameter of the power regulator to the system power management chip, and the system power management chip can compare the working rated parameter corresponding to the identifier of the power regulator with the current working running state parameter, so that the working state of the power regulator can be determined, and corresponding operation can be executed. Because the system power management chip is used for replacing the mainboard to monitor each power regulator, the load quantity monitored by the mainboard is greatly reduced.

Description

System power management method, chip and electronic equipment
Technical Field
The present application relates to communication technologies, and in particular, to a system power management method, a chip, and an electronic device.
Background
The electronic device includes system components such as a Central Processing Unit (CPU), a Double Data Rate (DDR), and the like, each of the system components includes a power supply regulator, and when an external power supply supplies power to each of the system components in the computer, the power supply regulator of each of the system components supplies power to each of the system components.
Because only the power supply regulators of the CPU and the DDR in the system components in the computer have the bus function, the power supply regulators of the CPU and the DDR can perform data transmission with a motherboard, a BMC (baseboard management controller), an FPGA (Field-Programmable Gate Array), a CPLD (Complex Programmable Logic Device) are disposed on the motherboard, and the BMC or the FPGA or the CPLD on the motherboard monitors the operating states of the power supply regulators of the CPU and the DDR according to data uploaded by the power supply regulators of the CPU and the DDR. While the power supply regulators of other system components cannot directly transmit data to the motherboard.
In the prior art, in order to monitor the power supply regulators of other system components, an additional communication bus is added in the electronic device, and the electronic device is connected with the power supply regulators of other system components through the communication bus, so that the power supply regulators of the system components can transmit data to the main board, but the monitoring load quantity of the main board is greatly increased.
Disclosure of Invention
In view of this, the present invention provides a system power management method, a chip and an electronic device, so as to overcome the problem in the prior art that the monitoring load quantity of a motherboard is greatly increased.
In order to achieve the purpose, the invention provides the following technical scheme:
a system power management method is applied to a system power management chip in electronic equipment, the electronic equipment further comprises a communication bus and a plurality of power regulators, the system power management chip is respectively connected with the plurality of power regulators through the communication bus, the system power management chip stores the corresponding relation between the identification of the power regulators and working rated parameters, and the system power management method comprises the following steps:
receiving the current working operation state parameters of each power supply regulator;
for each power supply regulator, comparing the current working operation state parameter of the power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator; and executing preset operation according to the comparison result.
Wherein, the current operating state parameter includes a current output voltage, a current input voltage and/or a current operating environment temperature of the power regulator, the rated operating parameter includes a minimum output voltage, a maximum input voltage and/or a maximum operating environment temperature that the power regulator can bear, and the executing preset operation includes:
when the current output voltage is less than or equal to the minimum output voltage, and/or when the current input voltage is greater than or equal to the maximum input voltage, reducing the output power of a system component corresponding to the power supply regulator, or generating an alarm signal;
and/or when the current working environment temperature is greater than or equal to the highest working environment temperature, generating a cooling instruction.
Wherein, the current operating state parameter includes a current power conversion efficiency, a current output power and/or a current operating environment temperature of the power regulator, the operating rating parameter includes a maximum power conversion efficiency of the power regulator, and when the power regulator is a processor or a memory power regulator, the executing the preset operation according to the comparison result includes:
when the current power conversion efficiency is less than or equal to the maximum power conversion efficiency, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is less than or equal to the preset output power and the current working environment temperature is lower than the preset temperature value, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is greater than or equal to the preset output power and the working environment temperature is higher than the preset temperature value, generating a frequency reduction flag signal.
Wherein, the current working operation state parameter includes a current working voltage and/or a current working current of the power regulator, the working rated parameter includes a maximum voltage and/or a maximum current that can be borne by the power regulator, and the executing the preset operation according to the comparison result includes:
when the current working voltage is greater than or equal to the maximum voltage which can be borne by the power supply regulator, generating alarm information;
and/or generating alarm information when the current working current is larger than or equal to the maximum current which can be borne by the power supply regulator.
Wherein, the current working operation state parameter includes a current working current of the power regulator, the working rated parameter includes a maximum current that the power regulator can bear, and when the power regulator is a power regulator of a processor or a memory, the executing a preset operation according to a comparison result includes:
and when the current working current is greater than or equal to the maximum current, generating a frequency reduction instruction.
Wherein the current operating state parameter includes a current output power of the power regulator, the operating rating parameter includes a maximum output power of the power regulator, and the performing the preset operation according to the comparison result includes:
when the current output power is greater than or equal to the maximum output power, generating alarm information;
or, when the current output power is greater than or equal to the maximum output power and the power regulator is a power regulator of the processor or the memory, a frequency reduction instruction is generated.
Preferably, the method further comprises the following steps:
and when the time of the protection instruction generated by the power supply regulator is detected to be less than or equal to a preset time threshold value, forbidding to respond to the protection instruction, wherein the protection instruction comprises an overvoltage protection instruction, an overcurrent protection instruction, an overtemperature protection instruction, a low input voltage locking instruction or a low output voltage protection instruction.
A system power management chip is applied to electronic equipment, the electronic equipment further comprises a communication bus and a plurality of power regulators, the system power management chip is respectively connected with the plurality of power regulators through the communication bus, the system power management chip stores the corresponding relation between the identification of the power regulators and the rated working parameters, and the system power management chip comprises:
the receiving module is used for receiving the current working operation state parameters of each power supply regulator;
the comparison module is used for comparing the current working operation state parameter of each power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator;
and the execution module is used for executing preset operation according to the comparison result.
An electronic device, comprising: the system power supply management chip is respectively connected with the power supply regulators through the communication bus, wherein:
each power supply adjuster is used for sending the current working operation state parameters of the power supply adjuster to the system power supply management chip;
the system power management chip is used for storing the corresponding relation between the identifier of the power regulator and the working rated parameter; receiving the current working operation state parameters of each power supply regulator; for each power supply regulator, comparing the current working operation state parameter of the power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator; and executing preset operation according to the comparison result.
When the power regulator is a processor or a memory power regulator, the system power management chip is specifically configured to, when executing a preset operation according to a comparison result, perform:
when the current power conversion efficiency is smaller than the maximum power conversion efficiency, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is less than or equal to a preset output power and the working environment temperature is lower than a preset temperature value, generating an over-frequency flag signal.
Preferably, the method further comprises the following steps:
the system comprises a mainboard and an operating system, wherein a system power management chip is connected with the mainboard, the mainboard is connected with the operating system through a graphical user interface in the operating system, and the system comprises:
the mainboard is used for receiving the current working operation state parameters of each power supply regulator detected by the system power supply management unit and sending the parameters to an operating system; and the overclocking flag signal;
the operating system is used for receiving the current working operation state parameters of each power supply regulator sent by the mainboard; when receiving that a control processor or a memory enters an over-frequency working mode, detecting whether the over-frequency flag signal is included in the system power management chip; and when the system power management chip comprises the over-frequency flag signal, controlling the processor or the memory to enter an over-frequency working mode.
It can be known from the above technical solutions that, compared with the prior art, the embodiment of the present invention provides a system power management method, in which a system power management chip is provided and is respectively connected to each power regulator, so that the system power management chip manages each power regulator in a unified manner, in order to enable the system power management chip to identify whether the operating state of each power regulator is normal, a corresponding relationship between an identifier of the power regulator and a working rated parameter is stored in the system power management chip, each power regulator can upload a current working operating state parameter of itself to the system power management chip, the system power management chip can compare the working rated parameter corresponding to the identifier of the power regulator with the current working operating state parameter, so as to determine the operating state of the power regulator, so that corresponding operations, such as generating an alarm signal, down-converting instructions, etc., may be performed. Because the system power management chip is used for replacing the mainboard to monitor each power regulator, the load quantity monitored by the mainboard is greatly reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;
fig. 2 is a signaling diagram of a system power management method according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a system power management chip provided by those skilled in the art;
fig. 4 is a detailed internal structural schematic diagram of an electronic device according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present application provides a system power management method, where the system power management method is applied to a system power management chip in an electronic device, and as shown in fig. 1, the system power management method is a schematic structural diagram of the electronic device provided in the embodiment of the present application, where the electronic device includes: system power management chip 11, communication bus 12 and a plurality of power regulators 13, wherein: the system power management chip 11 is respectively connected with the plurality of power regulators 13 through the communication bus 12, and the system power management chip 11 stores the corresponding relationship between the identifier of the power regulator 13 and the working rated parameter.
In fig. 1, 3 power regulators 13 are shown, which may be 2, 4, 5, etc., and preferably, all the power regulators included in the electronic device are connected to the system power management chip, or the power regulators to be monitored by the system power management chip are connected to the system power management chip.
The electronic device may include: system components such as a CPU, a DDR, a BMC (baseboard management Controller), an HDD (Hard Disk Drive), a LAN module (Local area network), a PCH (Platform control center), and the like, where each system component includes one or more power regulators, and the operating rating parameters of each power regulator may be different, so that the corresponding relationship between the identifier of each power regulator 13 and the operating rating parameter needs to be stored in the system power management chip 11.
Since the system power management chip 11 is connected to each power regulator 13 through the communication bus 12, the current operating state parameters of each power regulator 13 can be obtained, so that each power regulator can be monitored.
Based on the structure of the electronic device, a system power management method provided in the embodiment of the present application is described, please refer to fig. 2, which is a signaling diagram of the system power management method provided in the embodiment of the present application, and the method includes:
step S201: each power regulator 13 sends its own current operating state parameters to the system power management chip 11.
Step S202: the system power management chip 11 receives the current operating state parameters of each power regulator, and performs the following operations for each power regulator: comparing the current working operation state parameter of the power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator; and executing preset operation according to the comparison result.
The system power management chip may store a corresponding relationship between the identifier of the power regulator and the working rated parameter, where the corresponding relationship may be implemented by burning a configuration code (configuration code) of each power regulator in the system power management chip, and the configuration code of the power regulator includes its own working rated parameter. Alternatively, the structure of each power regulator may be encoded and recorded in the system power management chip by MD5(Message Digest Algorithm).
The embodiment of the invention provides a system power supply management method, which is characterized in that a system power supply management chip is added in an electronic device and is respectively connected with each power supply regulator, so that the system power supply management chip uniformly manages each power supply regulator, in order to ensure that the system power supply management chip can identify whether the working state of each power supply regulator is normal, the corresponding relation between the identifier of the power supply regulator and the working rated parameter is stored in the system power supply management chip, each power supply regulator can upload the current working running state parameter of the power supply regulator to the system power supply management chip, the system power supply management chip can compare the working rated parameter corresponding to the identifier of the power supply regulator with the current working running state parameter, thereby determining the working state of the power supply regulator and executing corresponding operation, such as generating an alarm signal, a down command, etc. According to the embodiment of the application, the system power management chip added in the electronic equipment is used for replacing the mainboard to monitor each power regulator, so that the monitored load quantity of the mainboard is greatly reduced.
The operational rating parameters of each power regulator may include: the maximum output voltage of the power supply adjuster, the maximum input voltage of the power supply adjuster, the maximum working environment temperature which can be borne by the power supply adjuster, the maximum power conversion efficiency of the power supply adjuster, the maximum voltage which can be borne by the power supply adjuster, the maximum current which can be borne by the power supply adjuster and the maximum output power of the power supply adjuster. Accordingly, the current operating state parameters of the power regulator may include: one or more of the current output voltage of the power regulator, the current input voltage of the power regulator, the current operating environment temperature of the power regulator, the current power conversion efficiency of the power regulator, the current operating voltage of the power regulator, the current operating current of the power regulator, and the current output power of the power regulator.
The specific process of the system power management chip when executing the preset operation according to the comparison result between the various working rated parameters and the working operation state parameters will be described below.
First, if the current operating state parameter includes the current output voltage of the power regulator, and the operating rating parameter includes the minimum output voltage of the power regulator, the system power management chip is specifically configured to:
and if the current output voltage is less than or equal to the minimum output voltage, reducing the load power consumption of the system component corresponding to the power supply regulator or generating an alarm signal.
Second, if the current operating state parameter includes the current input voltage of the power regulator, and the operating rating parameter includes the maximum input voltage of the power regulator, the system power management chip is specifically configured to:
when the current input voltage is greater than or equal to the maximum input voltage, reducing the output power of the system component corresponding to the power supply regulator or generating an alarm signal.
Thirdly, if the current operating state parameter includes the current operating environment temperature of the power regulator, and the rated operating parameter includes the highest operating environment temperature that the power regulator can bear, the system power management chip is specifically configured to:
and when the current working environment temperature is greater than or equal to the highest working environment temperature, generating a cooling instruction.
The cooling command may be generated by controlling an increase in a fan speed in the electronic device.
Fourthly, if the current operating state parameter includes the current power conversion efficiency, the current output power and/or the current operating environment temperature of the power regulator, and the operating rating parameter includes the maximum power conversion efficiency of the power regulator, the system power management chip is specifically configured to:
when the current power conversion efficiency is less than or equal to the maximum power conversion efficiency, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is less than or equal to the preset output power and the current working environment temperature is lower than the preset temperature value, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is greater than or equal to the preset output power and the current working environment temperature is higher than the preset temperature value, generating a frequency reduction flag signal.
The fourth method is only for the case where the power regulator is a processor or memory power regulator, because only the processor or memory can perform the over-clocking or the down-clocking.
Power conversion efficiency is input voltage input current/output voltage output current.
The preset output power may be the maximum output power of the power regulator or the standard output power.
When the system power management chip detects that the current output power of the power regulator of the processor or the memory is less than or equal to the preset output power, the system power management chip can set an over-frequency flag signal so as to enable the operating system to know that the processor or the memory can be operated over-frequency currently.
If the operating system knows that the system power management chip stores the frequency reduction flag signal, the operating system can perform frequency reduction operation on the processor or the memory.
Taking the processor as an example, the overclocking flag signal will be described below, assuming that the standard output power of the power regulator of the processor is 165W and the maximum output power is 300W, the system power management chip detects that the output power of the processor is 70W (but not limited thereto), and the system power management chip may set a flag (flag) signal of the good status of the system component corresponding to the power regulator, i.e. the overclocking flag signal, at a certain position of the register.
Fifth, if the current operating state parameter includes the current operating voltage of the power regulator, and the rated operating parameter includes the maximum voltage that the power regulator can bear, the system power management chip is specifically configured to:
and when the current working voltage is greater than or equal to the maximum voltage which can be borne by the power supply regulator, generating alarm information.
Sixth, if the current operating state parameter includes the current operating current of the power regulator, and the rated operating parameter includes the maximum current that the power regulator can bear, the system power management chip is specifically configured to:
generating an alarm message when the present load current is greater than or equal to the maximum current that the power regulator can withstand.
Seventh, if the current operating state parameter includes the current operating current of the power regulator, and the rated operating parameter includes the maximum current that the power regulator can bear, the system power management chip is specifically configured to:
and when the current working current is greater than or equal to the maximum current, generating a frequency reduction instruction.
The seventh case is only applicable to the application scenario where the power regulator is a processor or a memory.
And eighthly, if the current operating state parameter includes the current output power of the power regulator and the operating rated parameter includes the maximum output power of the power regulator, the system power management chip is specifically configured to:
when the current output power is greater than or equal to the maximum output power, generating alarm information;
or, when the current output power is greater than or equal to the maximum output power and the power regulator is a power regulator of the processor or the memory, a frequency reduction instruction is generated.
It can be understood that each power supply regulator has the functions of overvoltage protection, overcurrent protection, over-temperature protection, low input voltage locking and low output voltage protection, and after each power supply regulator sends a protection instruction, which includes an overvoltage protection instruction, an overcurrent protection instruction, an over-temperature protection instruction, a low input voltage locking instruction or a low output voltage protection instruction, to the system power supply management chip, if the time of detecting the protection instruction generated by the power supply regulator is less than or equal to the preset time threshold, the power supply regulator is prohibited from responding to the protection instruction.
Optionally, the system power management chip may detect whether each power regulator is in an overvoltage state, an overcurrent state, an overtemperature state, a low input voltage state, or a low output voltage state by itself, if so, may perform corresponding protection on each power regulator, and certainly, each power regulator may detect whether it is in the above state by itself, and if so, performs self-protection.
The system power management chip may be further configured to: and sending the current running state parameters of each power supply regulator to an operating system.
The Operating System may be one of DOS (Disk Operating System), OpenSolaris, Windows Server, Unix, Linux, Mac OS, Ubuntu, Android, Chrome OS, steams, and China Operating System.
The electronic equipment can further comprise a mainboard, wherein the mainboard comprises a BMC, an FPGA, a CPLD and a PCH, and the system power management chip can send the current running state parameters of each power regulator to the operating system through the mainboard.
The system power management chip may be further configured to: receiving current load power consumption sent by a power supply regulator of a processor or a memory; and when the current load power consumption is more than or equal to the preset maximum load power consumption, generating a frequency reduction signal.
If the user of the electronic device does not want the electronic device to consume too much power, a maximum value of the load power consumption that the processor or the memory can operate in may be preset, and when the current load power consumption sent by the power regulator of the processor or the memory is greater than or equal to the maximum value of the load power consumption, a down-conversion signal is generated, so as to reduce the processing speed of the processor or the memory, i.e. reduce the operating speed of the processor or the memory.
An embodiment of the present application further provides a system power management chip (as shown in fig. 1), as shown in fig. 3, which is a schematic structural diagram of a system power management chip provided for a person skilled in the art, and the system power management chip includes: a receiving module 31, a comparing module 32 and an executing module 33, wherein:
and the receiving module 31 is configured to receive the current operating state parameters of each of the power regulators.
And the comparison module 32 is configured to compare, for each power regulator, the current operating state parameter of the power regulator with the operating rated parameter corresponding to the identifier of the power regulator.
The execution module 33 is configured to execute a preset operation according to the comparison result.
The embodiment of the invention provides a system power management chip, which is connected with each power regulator respectively by arranging a system power management chip, so that the system power management chip can manage each power regulator uniformly, in order to ensure that the system power management chip can identify whether the working state of each power regulator is normal, the corresponding relation between the identifier of each power regulator and the working rated parameter is stored in the system power management chip, each power regulator can upload the current working running state parameter of the power regulator to the system power management chip, and the system power management chip can compare the working rated parameter corresponding to the identifier of the power regulator with the current working running state parameter so as to determine the working state of the power regulator, thereby being capable of executing corresponding operations, such as generating an alarm signal, generating a warning signal, and the like, A down command, etc. Because the system power management chip is added to replace the mainboard to monitor each power regulator in the embodiment of the application, the monitoring load quantity of the mainboard is greatly reduced.
The embodiment of the present application further provides various implementation structures of the execution module in the system power management chip, which are specifically as follows:
first, if the current operating state parameter includes the current output voltage of the power regulator and the operation rating parameter includes the minimum output voltage of the power regulator, the executing module 33 includes:
and the first execution unit is used for reducing the load power consumption of the system component corresponding to the power supply regulator or generating an alarm signal if the current output voltage is less than or equal to the minimum output voltage.
Second, if the current operating state parameter includes the current input voltage of the power regulator and the operation rating parameter includes the maximum input voltage of the power regulator, the executing module 33 includes:
and the second execution unit is used for reducing the output power of the system component corresponding to the power supply regulator or generating an alarm signal when the current input voltage is greater than or equal to the maximum input voltage.
Thirdly, if the current operating state parameter includes the current operating environment temperature of the power regulator, and the operating rating parameter includes the highest operating environment temperature that the power regulator can bear, the executing module 33 includes:
and the first generating unit is used for generating a cooling instruction when the current working environment temperature is greater than or equal to the highest working environment temperature.
Fourth, if the current operating state parameter includes the current power conversion efficiency, the current output power and/or the current operating environment temperature of the power regulator, and the operating rating parameter includes the maximum power conversion efficiency of the power regulator, the executing module 33 includes:
a second generating unit, configured to generate an over-frequency flag signal when the current power conversion efficiency is less than or equal to the maximum power conversion efficiency;
and/or, a third generating unit, configured to generate an over-frequency flag signal when a current output power of the power regulator is less than or equal to a preset output power and the current operating environment temperature is lower than a preset temperature value;
and/or, a fourth generating unit, configured to generate a down-conversion flag signal when the current output power of the power regulator is greater than or equal to the preset output power and the current operating environment temperature is higher than the preset temperature value.
The fourth method is only for the case where the power regulator is a processor or memory power regulator, because only the processor or memory can perform the over-clocking or the down-clocking.
Power conversion efficiency is input voltage input current/output voltage output current.
The preset output power may be the maximum output power of the power regulator or the standard output power.
When the system power management chip detects that the current output power of the power regulator of the processor or the memory is less than or equal to the preset output power, the system power management chip can set an over-frequency flag signal so as to enable the operating system to know that the processor or the memory can be operated over-frequency currently.
If the operating system knows that the system power management chip stores the frequency reduction flag signal, the operating system can perform frequency reduction operation on the processor or the memory.
Fifth, if the current operating state parameter includes the current operating voltage of the power regulator, and the operation rating parameter includes the maximum voltage that the power regulator can bear, the executing module 33 includes:
and the fifth generating unit is used for generating alarm information when the current working voltage is greater than or equal to the maximum voltage which can be borne by the power supply regulator.
Sixth, if the current operating state parameter includes the current operating current of the power regulator, and the operation rated parameter includes the maximum current that the power regulator can bear, the executing module 33 includes:
and the sixth generating unit is used for generating alarm information when the current bearing current is larger than or equal to the maximum current which can be borne by the power supply regulator.
Seventh, if the current operating state parameter includes the current operating current of the power regulator, and the operation rated parameter includes the maximum current that the power regulator can bear, the executing module 33 includes:
and the seventh generating unit is used for generating a frequency reduction instruction when the current working current is greater than or equal to the maximum current.
The seventh case is only applicable to the application scenario where the power regulator is a processor or a memory.
In an eighth way, if the current operating state parameter includes the current output power of the power regulator and the operation rating parameter includes the maximum output power of the power regulator, the executing module 33 includes:
an eighth generating unit configured to generate alarm information when the current output power is greater than or equal to the maximum output power;
or, the ninth generating unit is configured to generate a frequency reduction instruction when the current output power is greater than or equal to the maximum output power and the power regulator is a power regulator of the processor or the memory.
The system power management chip may further include: and the response forbidding module is used for forbidding to respond to the protection instruction when the time of the protection instruction generated by the power supply regulator is detected to be less than or equal to a preset time threshold, wherein the protection instruction comprises an overvoltage protection instruction, an overcurrent protection instruction, an over-temperature protection instruction, a low input voltage locking instruction or a low output voltage protection instruction.
The system power management chip may further include: and the sending module is used for sending the current running state parameters of each power supply regulator to the operating system.
The Operating System may be one of DOS (Disk Operating System), OpenSolaris, Windows Server, Unix, Linux, Mac OS, Ubuntu, Android, Chrome OS, steams, and China Operating System.
The electronic equipment can further comprise a mainboard, wherein the mainboard comprises a BMC, an FPGA, a CPLD and a PCH, and the system power management chip can send the current running state parameters of each power regulator to the operating system through the mainboard.
The system power management chip may further include: the load power consumption receiving module is used for receiving the current load power consumption sent by a power supply regulator of the processor or the memory; and the frequency reducing signal generating module is used for generating a frequency reducing signal when the current load power consumption is more than or equal to the preset maximum load power consumption.
If the user of the electronic device does not want the electronic device to consume too much power, a maximum value of the load power consumption that the processor or the memory can operate in may be preset, and when the current load power consumption sent by the power regulator of the processor or the memory is greater than or equal to the maximum value of the load power consumption, a down-conversion signal is generated, so as to reduce the processing speed of the processor or the memory, i.e. reduce the operating speed of the processor or the memory.
An embodiment of the present application further provides an electronic device, as shown in fig. 1, the electronic device includes: the system power supply management device comprises a system power supply management chip 11, a communication bus 12 and a plurality of power supply regulators 13, wherein the system power supply management chip 11 is respectively connected with the plurality of power supply regulators 13 through the communication bus 12.
Each power regulator 13 is configured to send its current operating state parameter to the system power management chip.
The system power management chip 11 is used for storing the corresponding relation between the identifier of the power regulator and the working rated parameter; receiving the current working operation state parameters of each power supply regulator; for each power supply regulator, comparing the current working operation state parameter of the power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator; and executing preset operation according to the comparison result.
The communication Bus 12 may be an I2C (Inter-Integrated Circuit) Bus, SMBus (system Management Bus), or PMBus (Power Management Bus).
Optionally, the electronic device may further include:
the system comprises a mainboard and an operating system, wherein a system power management chip is connected with the mainboard, the mainboard is connected with the operating system through a graphical user interface in the operating system, and the system comprises:
the mainboard is used for receiving the current working operation state parameters of each power supply regulator detected by the system power supply management unit and sending the parameters to an operating system; and the overclocking flag signal.
The operating system is used for receiving the current working running state parameters of each power supply regulator sent by the mainboard; when receiving the control of the processor or the memory to enter the overclocking working mode, detecting whether the overclocking flag signal is included in the system power management chip; and when the system power management chip comprises the over-frequency flag signal, controlling the processor or the memory to enter an over-frequency working mode.
Optionally, the operating system may be further configured to: and controlling the processor (or the memory) to enter a frequency reduction working mode when detecting that the system power management chip stores a frequency reduction flag signal corresponding to the processor (or the memory).
Optionally, the operating system may be further configured to: and when a frequency reduction instruction aiming at the processor (or the memory) sent by the system power management chip is detected, controlling the processor (or the memory) to enter a frequency reduction working mode.
The System power management chip may also send the current operating state parameters of each power regulator to me (management) or BIOS (basic input Output System) through SPI (Serial Peripheral Interface).
Please refer to fig. 4, which is a detailed internal structure diagram of an electronic device according to an embodiment of the present disclosure.
In the electronic device shown in fig. 4: CPU 14, DDR 15, BMC 16 (board management Controller), HDD 17(Hard Disk Drive), LAN module 18(local area Network), PCH 19(Platform Controller Hub), PSU 20(Power supply), Efuse 21(Electronic circuit breaker), voltage/current detection sensor 22, fan 23, Backplane 24 (Backplane), FPGA 25 and other system components, wherein each system component includes one or more Power regulators, and the operating parameters of each Power regulator may be different, so that the corresponding relationship between the identifier of each Power regulator 13 and the operating parameters needs to be stored in system Power management chip 11.
When the external power supply supplies power to the electronic device, the 220V high voltage may be converted into 12V dc voltage by the PSU 20 in the electronic device and supplied to the system power management chip 11.
As can be seen from fig. 4, the CPU 14 includes 3 power regulators, namely, a power regulator 141, a power regulator 142, and a power regulator 143. DDR 15 includes 3 power regulators, namely, a power regulator 151, a power regulator 152, and a power regulator 153; PCH 19 includes 3 power regulators, power regulator 191, power regulator 192, and power regulator 193, respectively. BMC 16 includes 4 power regulators, power regulator 161, power regulator 162, power regulator 163, and power regulator 164, respectively. One end of the voltage/current detection sensor 22 is connected to each power supply regulator and the Efuse 21, respectively, and the other end of the voltage/current detection sensor 22 is connected to the fan 23. The PSU 20 is connected to various power regulators via Efuse 21. The HDD 17 and the Backplane 24 share a power regulator 171, and the system power management chip is further connected to the Efuse 21 and the voltage/current detection sensor 22, and connection lines between the system power management chip and the respective components are shown by dotted lines for clearly indicating the connection relationship in fig. 4.
Other components may also be included in the electronic device, and are not described in detail here.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A system power management method is characterized in that the method is applied to a system power management chip in electronic equipment, the electronic equipment further comprises a communication bus and a plurality of power regulators, the system power management chip is respectively connected with the plurality of power regulators through the communication bus, and the system power management chip stores the corresponding relation between the identification of the power regulators and working rated parameters, and the system power management method comprises the following steps:
receiving the current working operation state parameters of each power supply regulator;
for each power supply regulator, comparing the current working operation state parameter of the power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator; executing a preset operation according to the comparison result;
the execution of the preset operation comprises generating an over-frequency flag signal, and detecting whether the over-frequency flag signal is included in the system power management chip or not when the operating system receives the control processor or the memory and enters an over-frequency working mode; and when the system power management chip comprises the over-frequency flag signal, the operating system controls the processor or the memory to enter an over-frequency working mode.
2. The system power management method according to claim 1, wherein the current operating state parameters include a current output voltage, a current input voltage and/or a current operating environment temperature of the power regulator, the operation rating parameters include a minimum output voltage, a maximum input voltage and/or a maximum operating environment temperature of the power regulator, and the performing the preset operation according to the comparison result includes:
when the current output voltage is less than or equal to the minimum output voltage, and/or when the current input voltage is greater than or equal to the maximum input voltage, reducing the output power of a system component corresponding to the power supply regulator, or generating an alarm signal;
and/or when the current working environment temperature is greater than or equal to the highest working environment temperature, generating a cooling instruction.
3. The system power management method according to claim 1, wherein the current operating state parameter includes a current power conversion efficiency, a current output power and/or a current operating environment temperature of the power regulator, the operating rating parameter includes a maximum power conversion efficiency of the power regulator, and when the power regulator is a processor or a memory power regulator, the performing the predetermined operation according to the comparison result includes:
when the current power conversion efficiency is less than or equal to the maximum power conversion efficiency, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is less than or equal to the preset output power and the current working environment temperature is lower than the preset temperature value, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is greater than or equal to the preset output power and the working environment temperature is higher than the preset temperature value, generating a frequency reduction flag signal.
4. The system power management method according to claim 1, wherein the current operating state parameter comprises a current operating voltage and/or a current operating current of the power regulator, the operation rating parameter comprises a maximum voltage and/or a maximum current that the power regulator can withstand, and the performing the preset operation according to the comparison result comprises:
when the current working voltage is greater than or equal to the maximum voltage which can be borne by the power supply regulator, generating alarm information;
and/or generating alarm information when the current working current is larger than or equal to the maximum current which can be borne by the power supply regulator.
5. The system power management method according to claim 1, wherein the current operating state parameter comprises a current operating current of the power regulator, the operation rating parameter comprises a maximum current that the power regulator can withstand, and when the power regulator is a processor or a memory power regulator, the performing the predetermined operation according to the comparison result comprises:
and when the current working current is greater than or equal to the maximum current, generating a frequency reduction instruction.
6. The system power management method of claim 1, wherein the current operating state parameter comprises a current output power of the power regulator, the operational rating parameter comprises a maximum output power of the power regulator, and the performing the predetermined operation according to the comparison result comprises:
when the current output power is greater than or equal to the maximum output power, generating alarm information;
or, when the current output power is greater than or equal to the maximum output power and the power regulator is a power regulator of a processor or a memory, a frequency reduction instruction is generated.
7. The system power management method of claim 1, further comprising:
and when the time of the protection instruction generated by the power supply regulator is detected to be less than or equal to a preset time threshold value, forbidding to respond to the protection instruction, wherein the protection instruction comprises an overvoltage protection instruction, an overcurrent protection instruction, an overtemperature protection instruction, a low input voltage locking instruction or a low output voltage protection instruction.
8. The system power management chip is characterized by being applied to electronic equipment, the electronic equipment further comprises a communication bus and a plurality of power regulators, the system power management chip is respectively connected with the plurality of power regulators through the communication bus, the system power management chip stores the corresponding relation between the identification of the power regulators and the rated working parameters, and the system power management chip comprises:
the receiving module is used for receiving the current working operation state parameters of each power supply regulator;
the comparison module is used for comparing the current working operation state parameter of each power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator;
the execution module is used for executing preset operation according to the comparison result;
the execution of the preset operation comprises generating an over-frequency flag signal, and detecting whether the over-frequency flag signal is included in the system power management chip or not when the operating system receives the control processor or the memory and enters an over-frequency working mode; and when the system power management chip comprises the over-frequency flag signal, the operating system controls the processor or the memory to enter an over-frequency working mode.
9. An electronic device, comprising: the system comprises a system power management chip, a communication bus, a plurality of power regulators, a mainboard and an operating system, wherein the system power management chip is connected with the mainboard, the mainboard is connected with the operating system through a graphical user interface in the operating system, the system power management chip is respectively connected with the plurality of power regulators through the communication bus, and the system power management chip comprises:
each power supply adjuster is used for sending the current working operation state parameters of the power supply adjuster to the system power supply management chip;
the system power management chip is used for storing the corresponding relation between the identifier of the power regulator and the working rated parameter; receiving the current working operation state parameters of each power supply regulator; for each power supply regulator, comparing the current working operation state parameter of the power supply regulator with the working rated parameter corresponding to the identifier of the power supply regulator; executing a preset operation according to the comparison result;
the mainboard is used for receiving the current working operation state parameters of each power supply regulator detected by the system power supply management unit and sending the parameters to an operating system; and an over-frequency flag signal;
the operating system is used for receiving the current working operation state parameters of each power supply regulator sent by the mainboard; when receiving that a control processor or a memory enters an over-frequency working mode, detecting whether an over-frequency flag signal is included in the system power management chip; and when the system power management chip comprises the over-frequency flag signal, controlling the processor or the memory to enter an over-frequency working mode.
10. The electronic device according to claim 9, wherein the current operating state parameter includes a current power conversion efficiency, a current output power and/or an operating environment temperature of the power regulator, the operating rating parameter includes a maximum power conversion efficiency of the power regulator, and when the power regulator is a processor or a memory power regulator, the system power management chip is specifically configured to:
when the current power conversion efficiency is smaller than the maximum power conversion efficiency, generating an over-frequency flag signal;
and/or when the current output power of the power supply regulator is less than or equal to a preset output power and the working environment temperature is lower than a preset temperature value, generating an over-frequency flag signal.
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