CN106355234B - Demodulator circuit suitable for NFC label - Google Patents
Demodulator circuit suitable for NFC label Download PDFInfo
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- CN106355234B CN106355234B CN201610712995.3A CN201610712995A CN106355234B CN 106355234 B CN106355234 B CN 106355234B CN 201610712995 A CN201610712995 A CN 201610712995A CN 106355234 B CN106355234 B CN 106355234B
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- drain electrode
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- grid
- pmos tube
- tube
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07771—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card the record carrier comprising means for minimising adverse effects on the data communication capability of the record carrier, e.g. minimising Eddy currents induced in a proximate metal or otherwise electromagnetically interfering object
Abstract
The present invention relates to a kind of 100% demodulator circuits suitable for NFC label, including high voltage PMOS pipe HVPM1, HVPM2, HVPM3, high pressure NMOS pipe HVNM1, HVNM2, HVNM3, HVNM4, low pressure PMOS tube LVPM1, LVPM2, LVPM3, LVPM4, low pressure NMOS tube LVNM1, LVNM2, LVNM3, LVNM4, resistance R1、R2、R3And capacitor C1, C2.The invention has the advantages that the present invention, which combines to realize using nonlinear circuit and low-pass filter, carries out envelope detection to the NFC modulated signal for reading equipment output, by making full use of the difference of high tension apparatus Yu low-voltage device threshold voltage characteristic, and cooperation RC filter network that can preferably realize 100% demodulation function of modulated signal in circuit design.
Description
Technical field
The present invention relates to a kind of demodulator circuits suitable for NFC label.
Background technique
NFC (Near Field Communication, near-field communication) label chip is the IC chip of storing data, can
It is read by NFC device, is typically used in passive communication mode, have small in size, light weight and cost low and long service life etc.
Advantage, be widely used with product it is anti-fake trace to the source, supply chain management, gate inhibition, major industry such as public transit system.
NFC label chip is mainly made of three rf analog front-end, digitial controller and memory nucleus modules.It penetrates
Frequency AFE(analog front end) is responsible for obtaining RF energy to entire label chip offer power supply, recovery data and generates the signals such as clock, is core
Piece can steady operation key, and 100% demodulator circuit is exactly a part during entire data are restored.Demodulation is the inverse mistake of modulation
Journey is the process that former low-frequency modulation signal is recovered from high frequency modulated wave.Demodulator circuit is exactly to complete to modulate from antenna to carry
Demodulate digital signal in wave signal, and for the NFC label chip major requirement to meeting 106kbit communication speed
ISO14443 TypeA, i.e. 100% modulated signal can be demodulated correctly.
The scheme main body circuit structure that existing 100% demodulator circuit uses is as shown in Figure 1.100% demodulator circuit is main
Including envelope signal demodulation part, demodulated signal shaping unit and high-voltage signal to low-voltage signal conversion portion.And for packet
Network signal demodulation part circuit structure schematic diagram is as shown in Figure 1.Wherein AN1 indicates that chip connect the PAD of external antenna with AN2,
HVNZ1/HVNZ2 is the zero threshold value high pressure NMOS pipe for sampling antenna envelope, and HVPM11/HVPM21, HVNM11/HVNM21 are respectively
The high voltage PMOS pipe and NMOS tube of image current are generated, wherein resistance R1/R2/R3Mirror image biasing is generated with HVPM11 collective effect
Electric current.
Working principle is as follows, when NFC label chip reads equipment close to NFC, label chip internal RF front end rectified current
Road produces the supply voltage AVDD for entire chip operation, while with the generation of supply voltage AVDD, chip interior is to number
Word power supply ldo circuit also works normally the DVDD voltage for producing and powering to low-voltage device.100% tune is sent when NFC reads equipment
When signal processed, in the case where 13.56MHz carrier wave works normally, due to the smaller DM100 of electric current of HVNM21 NMOS tube drop-down
Signal level keep high level state, and in modulation condition due to 100% modulation when, NFC read equipment do not send energy, institute
Can not be coupled to energy on label chip antenna, the end DM100 capacitance is smaller in the design, so the end DM100 voltage can be by
Become low level in the effect of HVNM21 pull-down current, to reach the demodulation to envelope signal.However demodulate at this time
Envelope signal high level and rise and fall by carrier wave along due to being influenced in the presence of very big disturbance, so needing shaping circuit
Shaping is carried out to the waveform, the voltage domain to work by the demodulation waveforms of shaping is larger to be believed as the input of digital circuit
Number, it needs to increase level shifter circuit in demodulator circuit and completes conversion of the demodulated signal from high pressure to low pressure.
For the scheme of this 100% demodulator circuit, although preferably can read what equipment was sent to from NFC
Modulated signal is demodulated, but is needed to increase by zero threshold value NMOS device of high pressure in circuit design and adopted to envelope signal
Sample, and in order to generate the pull-down current to the end DM100, current generating circuit is increased in circuit, and the electric current is chip
The state of work is constantly in after powering on, it is contemplated that the requirement of the low-power consumption of chip, resistance R in circuit1/R2/R3Resistance value is set
Meter needs to reach a megaohm magnitude.So the design of 100% demodulator circuit of the program not only increase the complexity of circuit design and
And can also carry out the increase of area to chip belt, increase the cost of chip.
Summary of the invention
To overcome the shortcomings of existing technologies, the present invention provides a kind of demodulator circuit suitable for NFC label.Skill of the invention
Art scheme is:
A kind of demodulator circuit suitable for NFC label, including high voltage PMOS pipe HVPM1, HVPM2, HVPM3, high pressure NMOS
Pipe HVNM1, HVNM2, HVNM3, HVNM4, low pressure PMOS tube LVPM1, LVPM2, LVPM3, LVPM4, low pressure NMOS tube LVNM1,
LVNM2, LVNM3, LVNM4, resistance R1、R2、R3And capacitor C1, C2；
The substrate and source electrode of PMOS tube HVPM1, PMOS tube HVPM1 meet power supply DVDD, and drain electrode connects the leakage of NMOS tube HVNM1
Pole, grid and NMOS tube HVNM1, HVNM2 grid and with resistance R1One end connection, R1The AN of another termination antenna component PAD
End, NMOS tube HVNM1 source electrode connects the drain electrode of HVNM2, HVNM1 substrate and HVNM2 substrate and source electrode is grounded；
The substrate and source electrode of PMOS tube HVPM2, PMOS tube HVPM2 meet power supply DVDD, and drain electrode connects the leakage of NMOS tube HVNM3
The grid of pole, grid and HVNM3 are commonly connected to the drain electrode of HVPM1 and HVNM1, and the substrate and source electrode of NMOS tube HVNM3 is grounded；
The substrate and source electrode of PMOS tube LVPM1, PMOS tube LVPM1 meet power supply DVDD, and drain connecting resistance R2One end, resistance
R2The other end and R3The grid connection of one end, the one end capacitor C1, the grid of PMOS tube HVPM3 and NMOS tube HVNM4, resistance R3
The drain electrode of another termination NMOS tube LVNM1, LVNM1 substrate and source electrode are grounded, the other end ground connection of capacitor C1；
The substrate and source electrode of PMOS tube HVPM3, PMOS tube HVPM3 meet power supply DVDD, and drain electrode connects the leakage of NMOS tube HVNM4
Pole, one end of capacitor C2, the grid of PMOS tube LVPM2 and NMOS tube LVNM2 grid, the other end ground connection of capacitor C2；
The substrate and source electrode of PMOS tube LVPM2, PMOS tube LVPM2 meet power supply DVDD, and drain electrode connects the leakage of NMOS tube LVNM2
Pole, the substrate and source electrode of LVNM2 are grounded；
The substrate and source electrode of PMOS tube LVPM3, PMOS tube LVPM3 meet power supply DVDD, and drain electrode connects NMOS tube LVNM3's
As the output end RX100 of demodulator circuit after drain electrode, grid is commonly connected to drain electrode and the LVNM2 of LVPM2 with LVNM3 grid
Drain electrode, the substrate of LVNM3 and source electrode are grounded.
NFC is read the invention has the advantages that the present invention combines to realize using nonlinear circuit and low-pass filter
The modulated signal of equipment output carries out envelope detection, by making full use of high tension apparatus and low-voltage device threshold value in circuit design
The difference of voltage characteristic, and cooperation RC filter network can preferably realize 100% demodulation function of modulated signal.
Since supply voltage DVDD of the invention powers using low-tension supply identical with numerical portion, i.e., all by ldo
Circuit generates, so not only improving a lot on the area of the complexity of circuit design and reduction chip, but also effectively
The loss for reducing circuit energy.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the prior art.
Fig. 2 is structural schematic diagram of the invention.
Fig. 3 be when NFC read equipment transmission transmission rate be 106kbit/s ISO14443 TypeA modulated signal when,
The simulating, verifying waveform that 100% demodulator circuit of the invention demodulates the signal after antenna coupling.
Fig. 4 is the partial enlargement figure of the simulating, verifying waveform in Fig. 3.
Specific embodiment
The invention will now be further described with reference to specific embodiments, the advantages and features of the present invention will be with description and
It is apparent.But examples are merely exemplary for these, and it is not intended to limit the scope of the present invention in any way.Those skilled in the art
Member it should be understood that without departing from the spirit and scope of the invention can details to technical solution of the present invention and form into
Row modifications or substitutions, but these modifications and replacement are fallen within the protection scope of the present invention.
Referring to fig. 2, the present invention relates to a kind of demodulator circuit suitable for NFC label, including high voltage PMOS pipe HVPM1,
HVPM2, HVPM3, high pressure NMOS pipe HVNM1, HVNM2, HVNM3, HVNM4, low pressure PMOS tube LVPM1, LVPM2, LVPM3,
LVPM4, low pressure NMOS tube LVNM1, LVNM2, LVNM3, LVNM4, resistance R1, R2, R3 and capacitor C1, C2；
The substrate and source electrode of PMOS tube HVPM1, PMOS tube HVPM1 meet power supply DVDD, and drain electrode connects NMOS tube HVNM1's
Drain electrode, grid are connect with NMOS tube HVNM1, HVNM2 grid and with the one end resistance R1, another termination antenna component PAD's of R1
The end AN, NMOS tube HVNM1 source electrode connects the drain electrode of HVNM2, HVNM1 substrate and HVNM2 substrate and source electrode is grounded；
The substrate and source electrode of PMOS tube HVPM2, PMOS tube HVPM2 meet power supply DVDD, and drain electrode connects the leakage of NMOS tube HVNM3
The grid of pole, grid and HVNM3 are commonly connected to the drain electrode of HVPM1 and HVNM1, and the substrate and source electrode of NMOS tube HVNM3 is grounded；
The substrate and source electrode of PMOS tube LVPM1, PMOS tube LVPM1 meet power supply DVDD, and drain the one end connecting resistance R2, resistance
The R2 other end is connect with the grid of the one end R3, the one end capacitor C1, the grid of PMOS tube HVPM3 and NMOS tube HVNM4, resistance R3
The drain electrode of another termination NMOS tube LVNM1, LVNM1 substrate and source electrode are grounded, the other end ground connection of capacitor C1；
The substrate and source electrode of PMOS tube HVPM3, PMOS tube HVPM3 meet power supply DVDD, and drain electrode connects NMOS tube HVNM4 pipe
Drain electrode, one end of capacitor C2, the grid of PMOS tube LVPM2 and NMOS tube LVNM2 grid, the other end ground connection of capacitor C2；
The substrate and source electrode of PMOS tube LVPM2, PMOS tube LVPM2 meet power supply DVDD, and drain electrode connects the leakage of NMOS tube LVNM2
Pole, the substrate and source electrode of LVNM2 are grounded；
The substrate and source electrode of PMOS tube LVPM3, PMOS tube LVPM3 meet power supply DVDD, and drain electrode connects NMOS tube LVNM3's
As the output end RX100 of demodulator circuit after drain electrode, grid is commonly connected to drain electrode and the LVNM2 of LVPM2 with LVNM3 grid
Drain electrode, the substrate of LVNM3 and source electrode are grounded.
The working principle of the invention is: when NFC, which reads equipment, to be opened simultaneously close to NFC label chip, NFC label antenna coupling
Electromagnetic wave energy is closed, generate DC voltage by rectification circuit module and is powered to entire chip, while ldo module in chip
Work produces DVDD supply voltage to numerical portion, demodulator circuit and the power supply of other circuit modules.It demodulates in the present invention
The input of circuit is connected to the PAD of antenna in chip, resistance R1Purpose is when preventing Electro-static Driven Comb to the grid of circuit internal components
End damages.Most crucial part is resistance R in circuit design2With the low-pass filter of C1 composition, the low-pass filter band
Width requires to be lower than 13.56MHz, so when C point is 13.56MHz square wave, R2Low-pass filter with C1 composition is 13.56MHz
Target signal filter.
Wherein A point is the grid and resistance R of the grid of pipe HVPM1, the grid of HVNM1, NMOS tube HVNM21The company of one end
Contact；B point is the grid of the tie point of the drain electrode of pipe HVPM1 and the drain electrode of pipe HVNM1 and the grid of pipe HVPM2 and pipe HVNM3
The tie point of pole；C point is the tie point of the drain electrode of pipe HVPM2 and the drain electrode of pipe HVNM3 and the grid and pipe of pipe LVPM1
The tie point of the grid of LVNM1；D point is resistance R2、R3Common end and capacitor C1 top crown and high-voltage MOS pipe HVPM3 grid
Pole, HVNM4 grid tie point；When not having modulation data to be transmitted, circuit A point is the carrier signal of 13.56MHz, and C point is
The square wave of 13.56MHz, and when the signal square wave passes through the low-pass filter of R2, C1, it exports as low level, exports RX100
It is always high level.
When there is modulation data to be transmitted, due to there is no energy transmission when modulating, so A point signal is low level,
That is C point is also low level when modulating.Because transmission rate is 106kbit/s, it is much smaller than 13.56MHz, then D point
It is high level when NFC device conveys modulated signal.Output is low electricity when occurring by the final RX100 modulation of the effect of phase inverter
Flat, i.e., the modulation data that 100% demodulator circuit output signal sends NFC device is demodulated.
Wherein it should be noted that the following aspects, high pressure NMOS the pipe HVNM1 and HVNM2 of the driving of A point in circuit design
Need to be designed to down that the form than pipe, purpose are when A point signal is coupled to modulated signal generation, in order to improve the driving of A point
Threshold voltage.Make raising of the circuit to modulated signal response speed by accelerating the time that circuit demodulates to reach.And
Still use the purpose of high tension apparatus for the Cgd capacitor coupling due to high-voltage MOS pipe HVPM1 and HVNM1 HVPM2 and HVNM3
Reason is closed, when 13.56MHz carrier wave is reduced from ceiling voltage to minimum voltage, the B point voltage meeting before being not connected HVPM1
The variation of carrier signal is followed, so that B point voltage is lower than zero level hereinafter, obtaining Vgs Vgd voltage has exceeded low-voltage device
Pressure-resistant degree, so using high tension apparatus.Phase inverter HVPM3, HVNM4 use the purpose of high tension apparatus to demodulate when D is exported
When signal is low level, in order to improve the response speed of demodulated signal, D point signal can be higher than zero potential value in low level, be
It prevents from NMOS tube HVNM4 conducting from using high tension apparatus in the design to be designed instead of low-voltage device.
The demodulator circuit supports NFC Forum Type2 agreement and ISO14443 TypeA transport protocol completely, it is required that
The rate of data communication is 106kbit/s, i.e., the pause time of envelope is about 9.44us in modulation carrier wave.
As shown in figure 3, seen from the simulation results demodulator circuit can be good at realizing the envelope signal to being superimposed upon in carrier wave
It is demodulated, and demodulated signal is about 210ns relative to the delay of modulated signal, meets design objective and engineer application
Demand.
Fig. 4 provides the partial enlargement figure of simulating, verifying waveform, the modulation that demodulator circuit couples antenna from figure
Signal response speed is very fast.
Claims (1)
1. a kind of demodulator circuit suitable for NFC label, which is characterized in that including high voltage PMOS pipe HVPM1, HVPM2, HVPM3,
High pressure NMOS pipe HVNM1, HVNM2, HVNM3, HVNM4, low pressure PMOS tube LVPM1, LVPM2, LVPM3, LVPM4, low pressure NMOS
Pipe LVNM1, LVNM2, LVNM3, LVNM4, resistance R1、R2、R3And capacitor C1, C2；
The substrate and source electrode of PMOS tube HVPM1, PMOS tube HVPM1 meet power supply DVDD, and drain electrode connects the drain electrode of NMOS tube HVNM1,
Grid and NMOS tube HVNM1, HVNM2 grid and with resistance R1One end connection, R1The end AN of another termination antenna component PAD,
NMOS tube HVNM1 source electrode connects the drain electrode of HVNM2, HVNM1 substrate and HVNM2 substrate and source electrode is grounded；
The substrate and source electrode of PMOS tube HVPM2, PMOS tube HVPM2 meet power supply DVDD, and drain electrode connects the drain electrode of NMOS tube HVNM3,
The grid of grid and HVNM3 are commonly connected to the drain electrode of HVPM1 and HVNM1, and the substrate and source electrode of NMOS tube HVNM3 is grounded；
The substrate and source electrode of PMOS tube LVPM1, PMOS tube LVPM1 meet power supply DVDD, and drain connecting resistance R2One end, resistance R2Separately
One end and R3The grid connection of one end, the one end capacitor C1, the grid of PMOS tube HVPM3 and NMOS tube HVNM4, resistance R3 are another
The drain electrode of NMOS tube LVNM1 is terminated, LVNM1 substrate and source electrode are grounded, the other end ground connection of capacitor C1；
The substrate of PMOS tube HVPM3, PMOS tube HVPM3 and source electrode meet power supply DVDD, drain electrode connect NMOS tube HVNM4 drain electrode,
The grid of one end of capacitor C2, the grid of PMOS tube LVPM2 and NMOS tube LVNM2, the other end ground connection of capacitor C2；
The substrate and source electrode of PMOS tube LVPM2, PMOS tube LVPM2 meet power supply DVDD, and drain electrode connects the drain electrode of NMOS tube LVNM2,
The substrate and source electrode of LVNM2 is grounded；
The substrate and source electrode of PMOS tube LVPM3, PMOS tube LVPM3 meet power supply DVDD, and drain electrode connects the drain electrode of NMOS tube LVNM3
The drain electrode of LVPM2 and the leakage of LVNM2 are commonly connected to as the output end RX100 of demodulator circuit, grid and LVNM3 grid afterwards
Pole, the substrate and source electrode of LVNM3 are grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610712995.3A CN106355234B (en) | 2016-08-24 | 2016-08-24 | Demodulator circuit suitable for NFC label |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610712995.3A CN106355234B (en) | 2016-08-24 | 2016-08-24 | Demodulator circuit suitable for NFC label |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106355234A CN106355234A (en) | 2017-01-25 |
| CN106355234B true CN106355234B (en) | 2019-03-12 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610712995.3A Active CN106355234B (en) | 2016-08-24 | 2016-08-24 | Demodulator circuit suitable for NFC label |
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| CN (1) | CN106355234B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109993243A (en) * | 2019-03-05 | 2019-07-09 | 浙江大学 | A kind of commodity counterfeit prevention traceability system based on transparent membrane RFID chip |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101236453A (en) * | 2008-01-30 | 2008-08-06 | 上海华虹集成电路有限责任公司 | Connection structure and communicating method between NFC control chip and SIM card chip |
| CN102456144A (en) * | 2010-10-21 | 2012-05-16 | 上海华虹Nec电子有限公司 | Demodulator circuit of radio frequency identification (RFID) reader |
| CN104901431A (en) * | 2014-03-04 | 2015-09-09 | 美国博通公司 | Resonant tuning through rectifier time shifting |
-
2016
- 2016-08-24 CN CN201610712995.3A patent/CN106355234B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101236453A (en) * | 2008-01-30 | 2008-08-06 | 上海华虹集成电路有限责任公司 | Connection structure and communicating method between NFC control chip and SIM card chip |
| CN102456144A (en) * | 2010-10-21 | 2012-05-16 | 上海华虹Nec电子有限公司 | Demodulator circuit of radio frequency identification (RFID) reader |
| CN104901431A (en) * | 2014-03-04 | 2015-09-09 | 美国博通公司 | Resonant tuning through rectifier time shifting |
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| Publication number | Publication date |
|---|---|
| CN106355234A (en) | 2017-01-25 |
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Effective date of registration: 20201217 Address after: 100036 room a467, 4th floor, building 14, Cuiwei Zhongli, Haidian District, Beijing Patentee after: Zhongshu (Beijing) Biotechnology Co.,Ltd. Address before: 100036 Boya Hotel, Laodao, 2 Wanshou Road West Street, Haidian District, Beijing, 7th Floor 701 Patentee before: E-LAND (BEIJING) IOT TECHNOLOGY Co.,Ltd. |
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