CN106339515B

CN106339515B - The generation method and generation system of difference channel and its parameterized units

Info

Publication number: CN106339515B
Application number: CN201510394211.2A
Authority: CN
Inventors: 尹明会; 陈岚; 赵浙业
Original assignee: Institute of Microelectronics of CAS
Current assignee: Institute of Microelectronics of CAS
Priority date: 2015-07-07
Filing date: 2015-07-07
Publication date: 2019-07-16
Anticipated expiration: 2035-07-07
Also published as: CN106339515A

Abstract

The embodiment of the present application discloses the generation method and generation system of a kind of difference channel parameterized units, it can be according to the preset parameter value in the difference channel sample of selection, generate difference channel schematic diagram and domain, and carry out corresponding storage, generate difference channel parameterized units, in order to can be according to the preset parameter value of the difference channel to be formed of acquisition when later period concrete application, call directly the difference channel parameterized units, generate the schematic diagram and domain of difference channel to be formed, to solve in the prior art due to manual drawing, the low problem of formation efficiency caused by the schematic diagram and domain of modification difference channel, significantly improve the formation efficiency of difference channel.

Description

The generation method and generation system of difference channel and its parameterized units

Technical field

The present invention relates to IC design fields, particularly belong to IC design automatic field, and in particular to one The generation method of kind difference channel parameterized units and generation method and the generation system for generating system and a kind of difference channel System.

Background technique

Difference channel is circuit structure more common in analog circuit, in the analog circuits such as operational amplifier and comparator Input stage can all use difference channel structure.As shown in Figure 1, the generation method of difference channel includes: S01 in the prior art: By the size of each device in circuit designer designs' difference channel, the schematic diagram of difference channel is drawn；S02: the differential electrical is relied on The schematic diagram on road carries out circuit function emulation, determines each device size in difference channel；S03: to device each in difference channel into Row splits and checks whether the device after splitting meets the parameter request of circuit design rule, if the device satisfaction after splitting is wanted It asks, then carries out subsequent step；Device after splitting is unsatisfactory for return step S02 if requiring；S04: by layout design person's craft Schematic diagram according to the difference channel draws domain；S05: regular inspection is designed to the domain of drafting；S06: if drawing Domain be unsatisfactory for layout design rules, then need layout design person to modify domain；If the domain drawn meets domain Design rule, then the design work of the domain of entire difference channel is completed.

It can be seen that being all made of the side of manual drawing when generating the schematic diagram and domain of difference channel in the prior art Formula, and schematic diagram in difference channel and in the generating process of domain, need multiple checks and modification, and every layer of modification is adopted It modifies by hand, seriously reduces the formation efficiency of difference channel.

Summary of the invention

In order to solve the above technical problems, the embodiment of the invention provides a kind of generation methods of difference channel parameterized units And generate the generation method of system and a kind of difference channel and generate system, to overcome prior art Analog Circuit Design to imitate The low defect of rate, to improve the formation efficiency of difference channel.

To solve the above problems, the embodiment of the invention provides following technical solutions:

A kind of generation method of difference channel parameterized units, the difference channel are made of metal-oxide-semiconductor, comprising:

Step 1: choosing difference channel sample, obtain the preset parameter value of the difference channel sample, the parameter preset Include: in the difference channel sample quantity, the length of metal-oxide-semiconductor of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid fold Quantity；

Step 2: the quantity folded according to the width of metal-oxide-semiconductor in the difference channel sample and metal-oxide-semiconductor grid calculates The width of every section of grid in metal-oxide-semiconductor；

Step 3: being generated according to the width of the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample The schematic diagram and netlist of the difference channel sample；

Step 4: according to the number that the quantity of metal-oxide-semiconductor, the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid fold in the difference channel sample The width of every section of grid, generates the domain of the difference channel sample in amount and metal-oxide-semiconductor；

Step 5: corresponding storage being carried out to schematic diagram, netlist and the domain of the difference channel sample of generation, forms differential electrical Road parameterized units template generates difference channel parameterized units, to be integrated into Process design kit (PDK) for circuit designers It calls, generates difference channel using the difference channel parameterized units.

Preferably, step 1 further include: step 11: after the preset parameter value for obtaining the difference channel sample, judge institute Whether the preset parameter value of the difference channel sample obtained meets preset condition, when the acquired difference channel sample Preset parameter value when being unsatisfactory for preset condition, the preset parameter value of the acquired difference channel sample is adjusted.

Preferably, whether the preset parameter value for judging the difference channel sample obtained meets preset condition packet Include: whether the quantity for judging metal-oxide-semiconductor in the acquired difference channel sample is 1 or 2；

When the preset parameter value of the acquired difference channel sample is unsatisfactory for preset condition, described in acquired It includes: device when metal-oxide-semiconductor in the acquired difference channel sample that the preset parameter value of difference channel sample, which is adjusted, When quantity is not 1 or 2, then 1 or 2 is adjusted to.

Preferably, whether the preset parameter value for judging the difference channel sample obtained meets preset condition and also wraps It includes: judging the length of metal-oxide-semiconductor in the acquired difference channel sample whether within the scope of preset length；

When the preset parameter value of the acquired difference channel sample is unsatisfactory for preset condition, described in acquired The preset parameter value of difference channel sample is adjusted further include: the metal-oxide-semiconductor described in the acquired difference channel sample Length be less than the preset length range minimum value when, be adjusted to the minimum value of the preset length range；Work as institute When the length of metal-oxide-semiconductor described in the difference channel sample obtained is greater than the maximum value of the preset length range, adjusted The whole maximum value for the preset length range.

Preferably, whether the preset parameter value for judging the difference channel sample obtained meets preset condition and also wraps It includes: judging the width of metal-oxide-semiconductor in the acquired difference channel sample whether within the scope of the first predetermined width；

When the preset parameter value of the acquired difference channel sample is unsatisfactory for preset condition, described in acquired The preset parameter value of difference channel sample is adjusted further include: the metal-oxide-semiconductor described in the acquired difference channel sample Width be less than the first predetermined width range minimum value when, be adjusted to the minimum of the first predetermined width range Value；The width of the metal-oxide-semiconductor described in the acquired difference channel sample is greater than the maximum of the first predetermined width range When value, it is adjusted to the maximum value of the first predetermined width range.

Preferably, whether the preset parameter value for judging the difference channel sample obtained meets preset condition and also wraps It includes: judging the quantity of metal-oxide-semiconductor grid folding in the acquired difference channel sample whether within the scope of preset quantity；

When the preset parameter value of the acquired difference channel sample is unsatisfactory for preset condition, described in acquired The preset parameter value of difference channel sample is adjusted further include: the metal-oxide-semiconductor described in the acquired difference channel sample When the quantity that grid folds is less than the minimum value of the preset quantity range, it is adjusted to the minimum of the preset quantity range Value；The quantity that the metal-oxide-semiconductor grid described in the acquired difference channel sample folds is greater than the preset quantity range When maximum value, it is adjusted to the maximum value of the preset quantity range.

Preferably, in the metal-oxide-semiconductor width of every section of grid calculation formula are as follows:

Wherein, floor indicates to be rounded；W indicates that the width of the metal-oxide-semiconductor, nf indicate the quantity that metal-oxide-semiconductor grid folds, Grid indicates the minimum lattice point of the difference channel sample manufacture craft.

Preferably, it step 2 further include: step 21: obtains in the metal-oxide-semiconductor after the width of every section of grid, judges the MOS Whether the width of every section of grid is within the scope of the second predetermined width in pipe, when the width of every section of grid in the metal-oxide-semiconductor is pre- not second If when in width range, being adjusted to the width of every section of grid in the metal-oxide-semiconductor.

Preferably, when the width of every section of grid in the metal-oxide-semiconductor is not within the scope of the second predetermined width, to the metal-oxide-semiconductor In if the width of every section of grid be adjusted include: every section of grid in the metal-oxide-semiconductor width less than the second predetermined width range Minimum value is then adjusted to the minimum value of the second predetermined width range；If the width of every section of grid is big in the metal-oxide-semiconductor In the maximum value of the second predetermined width range, then the maximum value of the second predetermined width range is adjusted to.

Preferably, in step 2 after step 21 further include: step 22: according to the width of every section of grid in the metal-oxide-semiconductor, weight The width for newly calculating the metal-oxide-semiconductor is denoted as the amendment width of the metal-oxide-semiconductor；

Step 3 includes: the amendment according to the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample The schematic diagram and netlist of width generation difference channel sample；

Step 4 includes: according to the quantity of metal-oxide-semiconductor, the amendment width of metal-oxide-semiconductor, metal-oxide-semiconductor grid in the difference channel sample The width of every section of grid in the quantity and metal-oxide-semiconductor of folding generates the domain of difference channel sample.

Preferably, step 4 includes:

Step 41: the structure class of the difference channel sample is selected according to the quantity of metal-oxide-semiconductor in the difference channel sample Type；

Step 42: according to the structure type of the difference channel sample, determining the grid of metal-oxide-semiconductor in the difference channel sample Polar coordinates, and the one-point or multi-point in the grid coordinates are chosen as reference coordinate point；

Step 43: being rolled over according to the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid in the reference coordinate point and the difference channel sample The width of every section of grid in folded quantity and metal-oxide-semiconductor, determines active area in the metal-oxide-semiconductor, source electrode and drain electrode position；

Step 44: the position put according to the reference coordinate point and the difference channel sample metal-oxide-semiconductor determines the difference The position of source electrode, drain electrode and gate electrode in parallel circuit sample；

Step 45: according to position and the institute of the reference coordinate point, the source electrode, drain electrode and gate electrode The schematic diagram and netlist for stating difference channel sample determine the electrical connection of each device in the difference channel sample, generate institute State the domain of difference channel sample.

A kind of generation method of difference channel, the difference channel are made of metal-oxide-semiconductor, which includes:

Step 100: obtaining the preset parameter value in difference channel to be formed, the parameter preset includes: difference to be formed The quantity that the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid fold in circuit；

Step 200: default difference channel parameterized units are inquired according to the preset parameter value of the difference channel to be formed, Judge the difference channel to be formed preset parameter value whether in the default difference channel parameterized units parameter preset Value range in；

Step 300: if the preset parameter value of the difference channel to be formed is single in the default difference channel parametrization In member in the value range of parameter preset, then the difference channel template to match with the preset parameter value is called directly；

Step 400: if the preset parameter value of the difference channel to be formed is not parameterized in the default difference channel In unit in the value range of parameter preset, then the preset parameter value of the difference channel to be formed is adjusted, is made at its In the default difference channel parameterized units in the value range of parameter preset, recall and preset parameter value adjusted The difference channel template to match；

Wherein, the default difference channel parameterized units are difference channel parameterized units described in any of the above embodiments.

A kind of generation system of difference channel parameterized units is applied to difference channel described in any of the above embodiments and parameterizes The generation method of unit, comprising:

Parameter acquiring unit obtains the preset parameter value in difference channel sample for choosing difference channel sample, described Parameter preset includes: the quantity, the length of metal-oxide-semiconductor of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid in the difference channel sample The quantity that pole folds；

Computing unit, for the number according to the width of metal-oxide-semiconductor in the difference channel sample and the folding of metal-oxide-semiconductor grid Amount calculates the width of every section of grid in metal-oxide-semiconductor；

First generation unit, for according to the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample Width generate the schematic diagram and netlist of the difference channel sample；

Second generation unit, for according to the quantity of metal-oxide-semiconductor, the width of metal-oxide-semiconductor, metal-oxide-semiconductor in the difference channel sample The width of every section of grid, generates the domain of the difference channel sample in the quantity and metal-oxide-semiconductor that grid folds；

Storage unit, schematic diagram, netlist and domain for the difference channel sample to generation carry out corresponding storage, are formed Difference channel parameterized units template generates difference channel parameterized units, to be integrated into Process design kit (PDK) for circuit Designer calls, and generates difference channel using the difference channel parameterized units.

Preferably, the parameter acquiring unit further include:

First parameter adjustment unit judges to be obtained after obtaining the preset parameter value in the difference channel sample Whether the preset parameter value of the difference channel sample taken meets preset condition, when the acquired difference channel sample When preset parameter value is unsatisfactory for preset condition, the preset parameter value of the acquired difference channel sample is adjusted.

Preferably, the computing unit further include:

Second parameter adjustment unit judges the metal-oxide-semiconductor after the width of every section of grid in obtaining the metal-oxide-semiconductor In every section of grid width whether within the scope of the second predetermined width, when the width of every section of grid in the metal-oxide-semiconductor is default not second When in width range, the width of every section of grid in the metal-oxide-semiconductor is adjusted.

Preferably, the computing unit further include:

Parameters revision unit recalculates the width of the metal-oxide-semiconductor for the width according to every section of grid in the metal-oxide-semiconductor, It is denoted as the amendment width of the metal-oxide-semiconductor.

Preferably, second generation unit includes:

Selecting unit, for selecting the difference channel sample according to the quantity of metal-oxide-semiconductor in the difference channel sample Structure type；

Selection of datum unit determines the difference channel sample for the structure type according to the difference channel sample The grid coordinates of middle metal-oxide-semiconductor, and the one-point or multi-point in the grid coordinates are chosen as reference coordinate point；

First position determination unit, for the width according to metal-oxide-semiconductor in the reference coordinate point and the difference channel sample The width of every section of grid, determines active area, source electrode and leakage in the metal-oxide-semiconductor in the quantity and metal-oxide-semiconductor that degree, metal-oxide-semiconductor grid fold Pole position；

Second position determination unit, for being put according to metal-oxide-semiconductor in the reference coordinate point and the difference channel sample Position, determine the position of source electrode, drain electrode and gate electrode in the difference channel sample；

Domain generation unit, for according to the reference coordinate point, the source electrode, drain electrode and gate electrode The schematic diagram and netlist of position and the difference channel sample determine that the electrical connection of each device in the difference channel sample is closed System, generates the domain of the difference channel sample.

A kind of generation system of difference channel, the difference channel are made of metal-oxide-semiconductor, which includes:

Parameter acquisition module, for obtaining the preset parameter value in difference channel to be formed, the parameter preset include: to Form the quantity that the quantity, the length of metal-oxide-semiconductor of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid fold in difference channel；

Enquiry module, for inquiring default difference channel parametrization according to the preset parameter value of the difference channel to be formed Unit, judges whether the preset parameter value of the difference channel to be formed is preset in the default difference channel parameterized units In the value range of parameter；

Module is adjusted, for the preset parameter value when the difference channel to be formed not in the default difference channel parameter When changing in unit in the value range of parameter preset, the preset parameter value of the difference channel to be formed is adjusted, it is made In value range in parameter preset in the default difference channel parameterized units；

Calling module is parameterized for the preset parameter value when the difference channel to be formed in the default difference channel In the case that the value range of parameter preset is interior in unit, the difference channel mould to match with the preset parameter value is called directly Plate；

Compared with prior art, above-mentioned technical proposal has the advantage that

The generation method of difference channel parameterized units provided by the embodiment of the present invention and generation system, can be according to choosing The preset parameter value in difference channel sample taken generates difference channel schematic diagram and domain, and carries out corresponding storage, and it is poor to generate Parallel circuit parameterized units, in order to can be according to the parameter preset of the difference channel to be formed of acquisition when later period concrete application Value, calls directly the difference channel parameterized units, generates the schematic diagram and domain of difference channel to be formed, to solve existing There is in technology due to manual drawing, modify the low problem of formation efficiency caused by the schematic diagram and domain of difference channel, shows Write the formation efficiency for improving difference channel.

Detailed description of the invention

In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis The attached drawing of offer obtains other attached drawings.

Fig. 1 is the flow diagram of difference channel method for drafting in the prior art；

Fig. 2 is the flow diagram of difference channel parameterized units generation method provided by one embodiment of the invention；

Fig. 3 is the schematic illustration of difference channel sample provided by one embodiment of the invention；

Fig. 4 is the schematic diagram of bilateral symmetry mirror-image structure in difference channel sample provided by one embodiment of the invention；

Fig. 5 is the schematic diagram of cubic intersection construction in difference channel sample provided by one embodiment of the invention；

Fig. 6 is difference channel sample provided by one embodiment of the invention when being cubic intersection construction, and domain grid are sat Mark the selection schematic diagram of benchmark；

Fig. 7 is difference channel sample provided by one embodiment of the invention when being cubic intersection construction, source and drain in domain The schematic diagram of connection and grid link position；

Fig. 8 is difference channel sample provided by one embodiment of the invention when being cubic intersection construction, each device in domain The connection relationship diagram of part；

Fig. 9 is structural schematic diagram when difference channel sample layout drawing provided by one embodiment of the invention is completed；

Figure 10 is the flow diagram of the generation method of difference channel provided by one embodiment of the invention；

Figure 11 is the structural schematic diagram that difference channel parameterized units provided by one embodiment of the invention generate system；

Figure 12 is the structure chart that difference channel provided by one embodiment of the invention generates system.

Specific embodiment

Just as described in the background section, it is all made of in the prior art when generating the schematic diagram and domain of difference channel The mode of manual drawing, and schematic diagram in difference channel and in the generating process of domain, need multiple checks and modification, and Every layer of modification is all made of manual modification, seriously reduces the formation efficiency of difference channel.

In view of this, the embodiment of the invention provides a kind of generation methods of difference channel parameterized units, comprising:

Step 4: according to the number that the quantity of metal-oxide-semiconductor, the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid fold in the difference channel sample The width of every section of grid, generates the domain of the difference channel sample in amount and metal-oxide-semiconductor.

On the basis of the above embodiments, the embodiment of the invention also provides a kind of generation methods of difference channel, comprising:

Step 400: if the preset parameter value of the difference channel to be formed is not parameterized in the default difference channel In unit in the value range of parameter preset, then the preset parameter value of the difference channel to be formed is adjusted, is made at its In the default difference channel parameterized units in the value range of parameter preset, recall and preset parameter value adjusted The difference channel template to match.

Correspondingly, the embodiment of the invention also provides a kind of generation systems of difference channel parameterized units, comprising:

On the basis of the above embodiments, the embodiment of the invention also provides a kind of generation systems of difference channel, comprising:

Wherein, the default difference channel parameterized units are above-mentioned difference channel parameterized units.

Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.

In the following description, numerous specific details are set forth in order to facilitate a full understanding of the present invention, but the present invention can be with Implemented using other than the one described here other way, those skilled in the art can be without prejudice to intension of the present invention In the case of do similar popularization, therefore the present invention is not limited by the specific embodiments disclosed below.

The embodiment of the invention provides a kind of generation methods of difference channel parameterized units, and the difference channel is by MOS Pipe is constituted, as shown in Fig. 2, the generation method includes:

Step 1: choosing difference channel sample, obtain the preset parameter value of the difference channel sample.Of the invention one In a preferred embodiment, the parameter preset includes: the quantity, the length of metal-oxide-semiconductor, MOS of metal-oxide-semiconductor in the difference channel sample The quantity that the width and metal-oxide-semiconductor grid of pipe fold.In other embodiments of the invention, the preset parameter value can also be The other parameters value of difference channel sample, the present invention to this and without limitation, specifically depend on the circumstances.

On the basis of the above embodiments, in one embodiment of the invention, step 1 further include:

Step 11: after obtaining the preset parameter value in difference channel sample, judging the acquired difference channel sample Whether this preset parameter value meets preset condition, when the preset parameter value of the acquired difference channel sample be unsatisfactory for it is pre- If when condition, being adjusted to the preset parameter value of the acquired difference channel sample, to reduce the difference channel ginseng After numberization unit generates, its each parameter preset is not inconsistent in the domain of the difference channel generated using the difference channel parameterized units The probability for closing design rule etc. and the domain of the difference channel being caused to be modified repeatedly, to improve described to difference channel domain Formation efficiency.

Specifically, on the basis of the above embodiments, in one embodiment of the invention, the judgement obtains described It includes: in the acquired difference channel sample of judgement that whether the preset parameter value of difference channel sample, which meets preset condition, Whether the quantity of metal-oxide-semiconductor is 1 or 2.Correspondingly, the preset parameter value when the acquired difference channel sample is unsatisfactory for presetting When condition, being adjusted to the preset parameter value of the acquired difference channel includes: when the acquired difference channel When the number of devices of metal-oxide-semiconductor is not 1 or 2 in sample, it is adjusted to 1 or 2.Specifically, in one embodiment of the invention, When the number of devices of metal-oxide-semiconductor in the acquired difference channel sample is not 1 or 2, include: if being adjusted to 1 or 2 The number of devices of metal-oxide-semiconductor is adjusted to 1 less than 1 in the difference channel sample；If MOS in the difference channel sample The number of devices of pipe is greater than 2, is adjusted to 2；Remaining situation is adjusted to 1.

Based on any of the above embodiments, in another embodiment of the present invention, the judgement obtains described Whether the preset parameter value of difference channel sample meets preset condition further include: judges in the acquired difference channel sample Whether the length of metal-oxide-semiconductor is within the scope of preset length.Correspondingly, working as the preset parameter value of the acquired difference channel sample When being unsatisfactory for preset condition, the preset parameter value of the acquired difference channel is adjusted further include: when acquired When the length of metal-oxide-semiconductor described in the difference channel sample is less than the minimum value of the preset length range, it is adjusted to institute State the minimum value of preset length range；The length of the metal-oxide-semiconductor described in the acquired difference channel sample is greater than described pre- If when the maximum value of length range, being adjusted to the maximum value of the preset length range.

Based on any of the above embodiments, in yet another embodiment of the present invention, the judgement obtains described Whether the preset parameter value of difference channel sample meets preset condition further include: judges in the acquired difference channel sample Whether the width of metal-oxide-semiconductor is within the scope of the first predetermined width.Correspondingly, working as the default ginseng of the acquired difference channel sample When numerical value is unsatisfactory for preset condition, the preset parameter value of the acquired difference channel is adjusted further include: when being obtained When the width of metal-oxide-semiconductor described in the difference channel sample taken is less than the minimum value of the first predetermined width range, by it It is adjusted to the minimum value of the first predetermined width range；The width of the metal-oxide-semiconductor described in the acquired difference channel sample When degree is greater than the maximum value of the first predetermined width range, it is adjusted to the maximum value of the first predetermined width range.

Based on any of the above embodiments, in yet another embodiment of the present invention, the judgement obtains described Whether the preset parameter value of difference channel sample meets preset condition further include: judges in the acquired difference channel sample Whether the quantity that metal-oxide-semiconductor grid folds is within the scope of preset quantity.Correspondingly, working as the pre- of the acquired difference channel sample When setting parameter value is unsatisfactory for preset condition, the preset parameter value of the acquired difference channel is adjusted further include: when The quantity that metal-oxide-semiconductor grid described in the acquired difference channel sample folds is less than the minimum value of the preset quantity range When, it is adjusted to the minimum value of the preset quantity range；The metal-oxide-semiconductor grid described in the acquired difference channel sample When the quantity that pole folds is greater than the maximum value of the preset quantity range, it is adjusted to the maximum of the preset quantity range Value.

It should be noted that in the above-described embodiments, the preset length range, the first predetermined width range and The preset quantity range can be depending on the design rule of MOS transistor device geometric dimension, can also be according to the tool of foundries Depending on body production technology, the present invention to this and without limitation, specifically depends on the circumstances.

Step 2: the quantity folded according to the width of metal-oxide-semiconductor in the difference channel sample and metal-oxide-semiconductor grid calculates The width of every section of grid in metal-oxide-semiconductor.

Specifically, in an embodiment of the invention, the calculation formula of the width of every section of grid in the metal-oxide-semiconductor are as follows:

Wherein, floor indicates to be rounded；W indicates that the width of the metal-oxide-semiconductor, nf indicate the quantity that metal-oxide-semiconductor grid folds, Grid indicates the minimum lattice point of the difference channel sample manufacture craft.Such as in a specific embodiment of the invention, the difference The manufacture craft of parallel circuit sample is 40nm technique, and minimum lattice point is 0.001um (i.e. 1nm), but the present invention does not do this It limits, specifically depends on the circumstances.

As shown from the above formula, in difference channel generation method provided by the embodiment of the present invention by pairIt takes downwards The width for every section of grid that the integral multiple of lattice point obtains, presets so as to can satisfy the width of every section of grid in metal-oxide-semiconductor Lattice point range, the phenomenon that violating design rule to avoid the width of every section of grid in metal-oxide-semiconductor.

It should be noted that based on any of the above embodiments, in a preferred embodiment of the invention, step 2 further include:

Step 21: obtain metal-oxide-semiconductor in every section of grid width after, judge every section of grid in the metal-oxide-semiconductor width whether Within the scope of the second predetermined width, when the width of every section of grid in the metal-oxide-semiconductor is not within the scope of the second predetermined width, to described The width of every section of grid is adjusted in metal-oxide-semiconductor, after reducing the difference channel sample parameter unit generation, utilizes the difference The width of every section of grid does not meet design rule etc. in metal-oxide-semiconductor described in the domain for the difference channel that circuit parameter unit generates, And the probability for causing the difference channel domain to be modified repeatedly, to further increase the difference channel version map generalization effect Rate.

On the basis of the above embodiments, in one particular embodiment of the present invention, when every section of grid in the metal-oxide-semiconductor When width is not within the scope of the second predetermined width, if it includes: described for being adjusted to the width of every section of grid in the metal-oxide-semiconductor The width of every section of grid is then adjusted to second predetermined width less than the minimum value of the second predetermined width range in metal-oxide-semiconductor The minimum value of range；It, will if the width of every section of grid is greater than the maximum value of the second predetermined width range in the metal-oxide-semiconductor Its maximum value for being adjusted to the second predetermined width range.

It should be noted that the second predetermined width range can be according to the design rule of MOS transistor device geometric dimension Depending on, it can also be depending on the specific production technology of foundries, the present invention to this and without limitation, specifically depends on the circumstances.

It should also be noted that, have passed through rounding in the metal-oxide-semiconductor in the calculating process of the width of every section of grid and calculate, So that in the generation method of the difference channel parameterized units, the width of every section of grid and acquisition is described in the metal-oxide-semiconductor The width of metal-oxide-semiconductor does not match strictly, therefore in a preferred embodiment of the invention, in step 2 after step 21 further include: Step 22: according to the width of every section of grid in the metal-oxide-semiconductor, recalculating the width of the metal-oxide-semiconductor, be denoted as repairing for the metal-oxide-semiconductor Positive width.Correspondingly, in embodiments of the present invention, step 3 include: according to the quantity of metal-oxide-semiconductor in the difference channel sample, The length of metal-oxide-semiconductor and the amendment width of metal-oxide-semiconductor generate the schematic diagram and netlist of difference channel sample；Step 4 includes: according to In difference channel sample every section in the quantity of metal-oxide-semiconductor, the amendment width of metal-oxide-semiconductor, the quantity of metal-oxide-semiconductor grid folding and metal-oxide-semiconductor The width of grid generates the domain of difference channel sample, so that the parametrization of difference channel provided by the embodiment of the present invention is single In first generation method, the width of every section of grid and the width of the metal-oxide-semiconductor match in the metal-oxide-semiconductor.

Specifically, in an embodiment of the invention, the calculation formula of the amendment width of the metal-oxide-semiconductor are as follows:

W'=fw × nf

Wherein, w' indicates that the amendment width of the metal-oxide-semiconductor, fw indicate that the width of every section of grid in the metal-oxide-semiconductor, nf indicate institute State the quantity that grid folds in metal-oxide-semiconductor.

It is described from the above mentioned it is found that in the generation method of difference channel parameterized units provided by the embodiment of the present invention Parameter employed in the generating process of difference channel sampling theorem figure and domain is strict conformance, be thereby may be ensured that described The parameter matching performance of MOS transistor device is good in difference channel sample, so that generated using the difference channel parameterized units Parameter matching performance in difference channel domain during metal-oxide-semiconductor is good, solves manual drawing difference channel principle in the prior art Figure and domain, and caused by being drawn respectively by different designers matching difference problem.

Step 3: being generated according to the width of the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample The schematic diagram and netlist of difference channel sample.Preferably, in an embodiment of the invention, step 3 includes: according to the difference The amendment width of the quantity of metal-oxide-semiconductor in circuit sample, the length of metal-oxide-semiconductor and metal-oxide-semiconductor generate difference channel sample schematic diagram and Netlist.

Specifically, in one embodiment of the invention, the MOS symbol in the difference channel sampling theorem figure is to pass through What the MOS device in calling technological design packet (PDK) was realized, metal-oxide-semiconductor parameter value foundation in the difference channel sampling theorem figure Number of devices, metal-oxide-semiconductor length and the metal-oxide-semiconductor amendment width setting of metal-oxide-semiconductor.As shown in figure 3, obtaining the difference channel sample After the symbol of middle metal-oxide-semiconductor, the number of devices of metal-oxide-semiconductor, metal-oxide-semiconductor length and metal-oxide-semiconductor amendment width, the differential electrical is directly generated The schematic diagram of road sample.Wherein, 301 (M:multiplier)) indicate metal-oxide-semiconductor number of devices, 302 (L:length)) indicate The length of metal-oxide-semiconductor, 303 (W:width) indicate that the amendment width of metal-oxide-semiconductor, 304 (NF:number) indicate the number that metal-oxide-semiconductor grid fold Amount.

The netlist of the difference channel sample passes through Subcircuits module (.subckt) realization, the difference channel sample net Number of devices, metal-oxide-semiconductor length and metal-oxide-semiconductor amendment width setting of the metal-oxide-semiconductor parameter value according to metal-oxide-semiconductor in table.With the difference For parallel circuit sample is including two N-type metal-oxide-semiconductors, netlist is as follows:

.subckt diff_match_pair VD1VD2VG1VG2VS

MN2VD2VG2VS VS@model w=@width l=@length m=@multiplier

MN1VD1VG1VS VS@model w=@width l=@length m=@multiplier

.ENDS

Wherein, diff_match_pair indicates Subcircuits module name；VD1, VD2, VG1, VG2 and VS indicate the difference The port of circuit sample；@model indicates MOS transistor device model name in difference channel sample；@width@length,@ Multiplier respectively indicates the number of devices of metal-oxide-semiconductor length in difference channel sample, metal-oxide-semiconductor amendment width and metal-oxide-semiconductor.By Yu Qiyi is known to those skilled in the art, this is no longer described in detail in the present invention.

Step 4: according to the number that the quantity of metal-oxide-semiconductor, the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid fold in the difference channel sample The width of every section of grid in amount and metal-oxide-semiconductor, generates the domain of difference channel sample.Preferably, in an embodiment of the invention, Step 4 includes: the number folded according to amendment width, the metal-oxide-semiconductor grid of the quantity of metal-oxide-semiconductor in the difference channel sample, metal-oxide-semiconductor The width of every section of grid in amount and metal-oxide-semiconductor, generates the domain of difference channel sample.

On the basis of the above embodiments, in a preferred embodiment of the invention, step 4 specifically includes:

Step 41: the structure class of the difference channel sample is selected according to the quantity of metal-oxide-semiconductor in the difference channel sample Type.Specifically, in embodiments of the present invention, selecting the difference channel according to the quantity of metal-oxide-semiconductor in the difference channel sample If the structure type of sample includes: that the quantity of metal-oxide-semiconductor in the difference channel sample is 1, the difference channel sample Structure type is bilateral symmetry mirror-image structure, as shown in Figure 4；If the quantity of metal-oxide-semiconductor is 2 in the difference channel sample, The structure type of the difference channel sample is cubic intersection construction, as shown in Figure 5.

It should be noted that no matter difference channel domain uses bilateral symmetry mirror-image structure or cubic intersection construction, The implementation method of domain is consistent, and carries out Unify legislation herein.Below with the structure type of the difference channel sample for four It is illustrated for square intersection construction.

Step 42: according to the structure type of the difference channel sample, determining the grid of metal-oxide-semiconductor in the difference channel sample Polar coordinates, and the one-point or multi-point in the grid coordinates are chosen as reference coordinate point.

It should be noted that in embodiments of the present invention, the coordinate bit of each figure layer in the domain of the difference channel sample It sets and is determined by the preset parameter value of metal-oxide-semiconductor in reference coordinate point, design rule and difference channel sample, specifically, the MOS The parameter preset of pipe may include: the width of every section of grid of metal-oxide-semiconductor, the quantity that the length and grid of grid fold, but the present invention is to this And without limitation, it specifically depends on the circumstances.

Step 43: being rolled over according to the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid in the reference coordinate point and the difference channel sample The width of every section of grid in folded quantity and metal-oxide-semiconductor, determines active area in the metal-oxide-semiconductor, source electrode and drain electrode position.

As shown in fig. 6, being the selection schematic diagram of four directions of embodiment of the present invention intersection construction domain grid coordinate basis.Wherein, It (0,0) is the grid coordinate of metal-oxide-semiconductor in the difference channel sample, i.e. reference coordinate point, GT is MOS in the difference channel sample The grid of pipe, AA are the active area of metal-oxide-semiconductor in the difference channel sample, and A/2 and B/2 represent the MOS transistor device after segmentation, fw For the width of every section of grid of metal-oxide-semiconductor in the difference channel sample, the length of the grid of metal-oxide-semiconductor, nf in difference channel sample described in L The quantity folded for the grid of metal-oxide-semiconductor in the difference channel sample.

Step 44: according to the position that metal-oxide-semiconductor is put in the reference coordinate point and the difference channel sample, determine described in The position of source electrode, drain electrode and gate electrode in difference channel sample.

As shown in fig. 7, being the signal of source and drain connection and grid link position in the intersection construction domain of four directions of the embodiment of the present invention Figure.Wherein, 701 metal-oxide-semiconductor source electrode in the difference channel sample is indicated, 702 indicate metal-oxide-semiconductor in the difference channel sample Drain electrode, 703 indicate metal-oxide-semiconductor gate electrode in the difference channel sample.

Step 45: according to position and the institute of the reference coordinate point, the source electrode, drain electrode and gate electrode The schematic diagram and netlist for stating difference channel sample determine the electrical connection of each device in the difference channel sample, generate institute The domain of difference channel sample is stated,

Specifically, in embodiments of the present invention, according to the reference coordinate point, the source electrode, drain electrode and grid The schematic diagram and netlist of the position of pole electrode and the difference channel sample determine each device in the difference channel sample Electrical connection includes: position and the difference according to the reference coordinate point, the source electrode, drain electrode and gate electrode The connection relationship of each device in parallel circuit sampling theorem figure, generates the electrical connection of each device in the difference channel sample；According to Design rule and metal-oxide-semiconductor schematic diagram generate other figure layers of metal-oxide-semiconductor in the difference channel sample, such as implanted layer.

As shown in figure 8, Fig. 8 is the connection relationship diagram of four directions of embodiment of the present invention intersection construction domain.Wherein, VD1, VD2, VG1, VG2 and VS are the circuit ports finally drawn.

Specifically, generating other figures of metal-oxide-semiconductor in the difference channel sample according to design rule and metal-oxide-semiconductor schematic diagram Layer includes: to generate hydrazine contact and substrate contact around metal-oxide-semiconductor in the difference channel sample according to design rule, will be described Difference channel sample is surrounded.As shown in figure 9, Fig. 9 is other figures of difference channel sample provided by the embodiment of the present invention Schematic diagram after layer generation.Wherein, 901 metal-oxide-semiconductor implanted layer SN in the difference channel sample is indicated, 902 indicate the difference Substrate contact in circuit sample.

It should be noted that in embodiments of the present invention, the substrate contact not only has anti-bolt-lock effect, it also while will Difference channel is effectively isolated with ambient enviroment, so that ambient noise be prevented to improve the influence of difference channel input matching The matching of the difference channel sample.

Specifically, by the difference channel parameterized units be integrated into including diode, triode, metal-oxide-semiconductor, resistance and In the Process design kit of the parameterized units such as capacitor (PCell).The application method of Process design kit is the biography of analog IC layout System method, so method provided by the invention is easily received and grasped by circuit designers and layout design person.Circuit designers The difference channel parameterized units in packet can be designed with calling technological with layout design person, fill in corresponding ginseng according to the design needs Numerical value, quick high matched realization difference channel.

Correspondingly, the embodiment of the invention also provides one kind based on difference channel parameter provided by any of the above-described embodiment Change the difference channel generation method of unit generation method, the difference channel is made of metal-oxide-semiconductor, as shown in Figure 10, the differential electrical Road generation method includes:

From the above mentioned it is found that the generation method of difference channel parameterized units provided by the embodiment of the present invention, Ke Yigen According to the preset parameter value in the difference channel sample of selection, difference channel schematic diagram and domain are generated, and carries out corresponding storage, it is raw At difference channel parameterized units, in order to can be according to the default ginseng of the difference channel to be formed of acquisition when later period concrete application Numerical value calls directly the difference channel parameterized units, the schematic diagram and domain of difference channel to be formed is generated, to solve In the prior art due to manual drawing, modify the low problem of formation efficiency caused by the schematic diagram and domain of difference channel, Significantly improve the formation efficiency of difference channel.

Moreover, generating the difference in the generation method of difference channel parameterized units provided by the embodiment of the present invention Before the schematic diagram and domain of parallel circuit sample, carried out to whether each parameter value in the difference channel sample meets preset condition Judgement, the schematic diagram and domain of the difference channel sample is regenerated when it meets preset condition, when it is unsatisfactory for presetting When condition, each parameter value in the difference channel sample is adjusted, until to each ginseng in the difference channel sample Numerical value regenerates the schematic diagram and domain of the difference channel sample when meeting preset condition, and is calling the difference channel parameter When changing unit generation difference channel, also the preset parameter value of acquired difference channel to be formed is judged, until its When preset parameter value is in the value range of the parameter preset of the difference channel parameterized units, the difference channel is just called to join Numberization unit generates the domain of difference channel to be formed, thus emulated after reducing the difference channel generation to be formed, The probability modified when inspection saves a large amount of time and workload, to further improve the difference channel Formation efficiency.

In addition, in the generation method of difference channel parameterized units provided in an embodiment of the present invention, the difference channel sample Metal-oxide-semiconductor length, MOS transistor device quantity are completely the same based on present principles figure and domain generation, and metal-oxide-semiconductor corrects drawing for width Enter, so that the width of metal-oxide-semiconductor amendment every section of grid of width and metal-oxide-semiconductor fits like a glove after calculating, so that utilizing the difference In the schematic diagram and domain of the difference channel that circuit parameter unit generates, the difference channel schematic diagram and domain to be formed Matching between middle difference metal-oxide-semiconductor parameter is preferable, solves difference MOS in difference channel schematic diagram in the prior art and domain The matching problem of pipe parameter, improves the matching of entire difference channel, while improving the core of the difference channel application The yields and performance of piece.

In addition, the embodiment of the invention also provides a kind of generation system of difference channel parameterized units, the differential electrical It routes metal-oxide-semiconductor to constitute, as shown in figure 11, the generation system includes:

Parameter acquiring unit 1101 obtains the preset parameter value in difference channel sample for choosing difference channel sample. In a preferred embodiment of the invention, the parameter preset of the difference channel sample includes: metal-oxide-semiconductor in difference channel sample Quantity, the quantity that folds of the length of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid.In other embodiments of the invention, The preset parameter value can also be the other parameters value of difference channel sample, and the present invention to this and without limitation, specifically regards feelings Depending on condition.

On the basis of the above embodiments, in one embodiment of the invention, the parameter acquiring unit further include:

First parameter adjustment unit judges acquired after obtaining the preset parameter value in difference channel sample Whether the preset parameter value of the difference channel sample meets preset condition, when presetting for the acquired difference channel sample When parameter value is unsatisfactory for preset condition, the preset parameter value of the acquired difference channel is adjusted, described in reducing It is each pre- using its in the domain of the difference channel of difference channel parameterized units generation after difference channel parameterized units generate Setting parameter does not meet design rule etc. and the probability that causes the domain of the difference channel to be modified repeatedly, to improve described to difference The formation efficiency of parallel circuit domain.

Specifically, on the basis of the above embodiments, in one embodiment of the invention, the judgement obtains described It includes: in the acquired difference channel sample of judgement that whether the preset parameter value of difference channel sample, which meets preset condition, Whether the quantity of metal-oxide-semiconductor is 1 or 2.Correspondingly, the preset parameter value when the acquired difference channel sample is unsatisfactory for presetting When condition, being adjusted to the preset parameter value of the acquired difference channel sample includes: when the acquired difference When the number of devices of metal-oxide-semiconductor is not 1 or 2 in circuit sample, it is adjusted to 1 or 2.Specifically, in an implementation of the invention In example, when the number of devices of metal-oxide-semiconductor in the acquired difference channel sample is not 1 or 2, it is adjusted to 1 or 2 packets It includes: if the number of devices of metal-oxide-semiconductor is adjusted to 1 less than 1 in the difference channel sample；If the number of devices of metal-oxide-semiconductor Greater than 2, it is adjusted to 2；Remaining situation is adjusted to 1.

Based on any of the above embodiments, in another embodiment of the present invention, the judgement obtains described Whether the preset parameter value of difference channel sample meets preset condition further include: judges in the acquired difference channel sample Whether the length of metal-oxide-semiconductor is within the scope of preset length.Correspondingly, working as the preset parameter value of the acquired difference channel sample When being unsatisfactory for preset condition, the preset parameter value of the acquired difference channel sample is adjusted further include: when being obtained When the length of metal-oxide-semiconductor described in the difference channel sample taken is less than the minimum value of the preset length range, adjusted For the minimum value of the preset length range；The length of the metal-oxide-semiconductor described in the acquired difference channel sample is greater than institute When stating the maximum value of preset length range, it is adjusted to the maximum value of the preset length range.

Computing unit 1102, for what is folded according to the width of metal-oxide-semiconductor in the difference channel sample and metal-oxide-semiconductor grid Quantity calculates the width of every section of grid in metal-oxide-semiconductor；

Wherein, floor indicates to be rounded；W indicates that the width of the metal-oxide-semiconductor, nf indicate the quantity that metal-oxide-semiconductor grid folds, Grid indicates the minimum lattice point of the difference channel sample manufacture craft.Such as in an embodiment of the invention, the differential electrical The manufacture craft of road sample is 40nm technique, and minimum lattice point is 0.001um (i.e. 1nm), but the present invention is to this and without limitation, Specifically depend on the circumstances.

As the formula it is found that in difference channel parameterized units generation system provided by the embodiment of the present invention by pairThe width for every section of grid for taking the integral multiple of lattice point to obtain downwards, so as to expire the width of every section of grid in metal-oxide-semiconductor The preset lattice point range of foot, the phenomenon that violating design rule to avoid the width of every section of grid in metal-oxide-semiconductor.

It should be noted that based on any of the above embodiments, in a preferred embodiment of the invention, calculating Unit 1102 further include:

Second parameter adjustment unit judges every in the metal-oxide-semiconductor after the width of every section of grid in obtaining metal-oxide-semiconductor Whether the width of section grid is within the scope of the second predetermined width, when the width of every section of grid in the metal-oxide-semiconductor is not in the second predetermined width When in range, the width of every section of grid in the metal-oxide-semiconductor is adjusted, it is raw to reduce the difference channel sample parameter unit Cheng Hou, the width of every section of grid is not in metal-oxide-semiconductor described in the domain of the difference channel generated using the difference channel parameterized units Meet design rule etc., and the probability for causing the difference channel domain to be modified repeatedly, to further increase described to difference The formation efficiency of circuit layout.

It should also be noted that, have passed through rounding in the metal-oxide-semiconductor in the calculating process of the width of every section of grid and calculate, So that in the generation system of the difference channel parameterized units, the width of every section of grid and acquisition is described in the metal-oxide-semiconductor The width of metal-oxide-semiconductor does not match strictly, therefore in a preferred embodiment of the invention, the second parameter in computing unit 1102 After adjustment unit further include:

Parameters revision unit recalculates the width of the metal-oxide-semiconductor for the width according to every section of grid in the metal-oxide-semiconductor, It is denoted as the amendment width of the metal-oxide-semiconductor, so that difference channel parameterized units provided by the embodiment of the present invention generate system In system, the width of every section of grid and the width of the metal-oxide-semiconductor match in the metal-oxide-semiconductor.

W'=fw × nf

It is described from the above mentioned it is found that in the generation system of difference channel parameterized units provided by the embodiment of the present invention Parameter employed in the generating process of difference channel sampling theorem figure and domain is strict conformance, be thereby may be ensured that described The parameter matching performance of MOS transistor device is good in difference channel sample, so that generated using the difference channel parameterized units Parameter matching performance in difference channel domain during metal-oxide-semiconductor is good, solves manual drawing difference channel principle in the prior art Figure and domain, and caused by being drawn respectively by different designers matching difference problem.

First generation unit 1103, for according to the quantity of metal-oxide-semiconductor in the difference channel sample, the length of metal-oxide-semiconductor and The width of metal-oxide-semiconductor generates the schematic diagram and netlist of difference channel sample.Preferably, in an embodiment of the invention, described One generation unit 1103 is used for the amendment according to the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample The schematic diagram and netlist of width generation difference channel sample.

Specifically, in one embodiment of the invention, the MOS symbol in the difference channel sampling theorem figure is to pass through What the MOS device in calling technological design packet (PDK) was realized, metal-oxide-semiconductor parameter value foundation in the difference channel sampling theorem figure Number of devices, metal-oxide-semiconductor length and the metal-oxide-semiconductor amendment width setting of metal-oxide-semiconductor.Obtain metal-oxide-semiconductor in the difference channel sample After symbol, the number of devices of metal-oxide-semiconductor, metal-oxide-semiconductor length and metal-oxide-semiconductor amendment width, the difference channel sample is directly generated Schematic diagram.

.subckt diff_match_pair VD1VD2VG1VG2VS

MN2VD2VG2VS VS@model w=@width l=@length m=@multiplier

MN1VD1VG1VS VS@model w=@width l=@length m=@multiplier

.ENDS

Second generation unit 1104, for according to the width of the quantity of metal-oxide-semiconductor in the difference channel sample, metal-oxide-semiconductor, The width of every section of grid, generates the domain of difference channel sample in the quantity and metal-oxide-semiconductor that metal-oxide-semiconductor grid folds.Preferably, at this In one embodiment of invention, second generation unit 1104 be used for according to the quantity of metal-oxide-semiconductor in the difference channel sample, The width of every section of grid, generates difference channel sample in the quantity and metal-oxide-semiconductor that amendment width, the metal-oxide-semiconductor grid of metal-oxide-semiconductor fold Domain.

On the basis of the above embodiments, in a preferred embodiment of the invention, second generation unit 1104 Include:

Selecting unit, for selecting the difference channel sample according to the quantity of metal-oxide-semiconductor in the difference channel sample Structure type.Specifically, in embodiments of the present invention, selecting the difference according to the quantity of metal-oxide-semiconductor in the difference channel sample If the structure type of parallel circuit sample includes: that the quantity of metal-oxide-semiconductor in the difference channel sample is 1, the difference channel The structure type of sample is bilateral symmetry mirror-image structure；It is described if the quantity of metal-oxide-semiconductor is 2 in the difference channel sample The structure type of difference channel sample is cubic intersection construction.

Selection of datum unit determines the difference channel sample for the structure type according to the difference channel sample The grid coordinates of middle metal-oxide-semiconductor, and the one-point or multi-point in the grid coordinates are chosen as reference coordinate point.

It should be noted that in embodiments of the present invention, the coordinate bit of each figure layer in the domain of the difference channel sample It sets and is determined by the parameter value of metal-oxide-semiconductor in reference coordinate point, design rule and difference channel sample, specifically, the metal-oxide-semiconductor Parameter may include: the width of every section of grid of metal-oxide-semiconductor, the quantity that the length and grid of grid fold, but the present invention does not limit this It is fixed, specifically depend on the circumstances.

First position determination unit, for the width according to metal-oxide-semiconductor in the reference coordinate point and the difference channel sample The width of every section of grid, determines active area, source electrode and leakage in the metal-oxide-semiconductor in the quantity and metal-oxide-semiconductor that degree, metal-oxide-semiconductor grid fold Pole position.

Second position determination unit, for being put according to metal-oxide-semiconductor in the reference coordinate point and the difference channel sample Position, determine the position of source electrode, drain electrode and gate electrode in the difference channel sample.

Domain generation unit, for according to the reference coordinate point, the source electrode, drain electrode and gate electrode The schematic diagram and netlist of position and the difference channel sample determine that the electrical connection of each device in the difference channel sample is closed System, generates the domain of the difference channel sample,

Specifically, generating other figures of metal-oxide-semiconductor in the difference channel sample according to design rule and metal-oxide-semiconductor schematic diagram Layer includes: to generate hydrazine contact and substrate contact around metal-oxide-semiconductor in the difference channel sample according to design rule, will be described Difference channel sample is surrounded.It should be noted that in embodiments of the present invention, the described substrate contact not only has anti-bolt Difference channel and ambient enviroment, are also effectively isolated, to prevent ambient noise to Differential Input to matching by lock effect simultaneously The influence of property, improves the matching of the difference channel sample.

Storage unit 1105, schematic diagram, netlist and domain for the difference channel sample to generation carry out corresponding storage, Difference channel parameterized units template is formed, difference channel parameterized units are generated, is supplied with being integrated into Process design kit (PDK) Circuit designers are called, and generate difference channel using the difference channel parameterized units.

On the basis of the above embodiments, the embodiment of the invention also provides a kind of generation system of difference channel, institutes It states difference channel to be made of metal-oxide-semiconductor, as shown in figure 12, which includes:

Parameter acquisition module 1201, for obtaining the preset parameter value in difference channel to be formed, the parameter preset packet It includes: the number that the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid fold in difference channel to be formed Amount；

Enquiry module 1202, for inquiring default difference channel ginseng according to the preset parameter value of the difference channel to be formed Whether numberization unit judges the preset parameter value of the difference channel to be formed in the default difference channel parameterized units In the value range of parameter preset；

Module 1203 is adjusted, for the preset parameter value when the difference channel to be formed not in the default difference channel When in parameterized units in the value range of parameter preset, the preset parameter value of the difference channel to be formed is adjusted, It is in the default difference channel parameterized units in the value range of parameter preset；

Calling module 1204 is joined for the preset parameter value when the difference channel to be formed in the default difference channel In the case that the value range of parameter preset is interior in numberization unit, the difference channel to match with the preset parameter value is called directly Template；

Wherein, the default difference channel parameterized units are the parametrization of difference channel provided by any of the above-described embodiment Unit.

From the above mentioned it is found that the generation system of difference channel parameterized units provided by the embodiment of the present invention, Ke Yigen According to the preset parameter value in the difference channel sample of selection, difference channel schematic diagram and domain are generated, and carries out corresponding storage, it is raw At difference channel parameterized units, in order to can be according to the default ginseng of the difference channel to be formed of acquisition when later period concrete application Numerical value calls directly the difference channel parameterized units, the schematic diagram and domain of difference channel to be formed is generated, to solve In the prior art due to manual drawing, modify the low problem of formation efficiency caused by the schematic diagram and domain of difference channel, Significantly improve the formation efficiency of difference channel.

Moreover, generating the difference in the generation system of difference channel parameterized units provided by the embodiment of the present invention Before the schematic diagram and domain of parallel circuit sample, carried out to whether each parameter value in the difference channel sample meets preset condition Judgement, the schematic diagram and domain of the difference channel sample is regenerated when it meets preset condition, when it is unsatisfactory for presetting When the time, each parameter value in the difference channel sample is adjusted, until to each ginseng in the difference channel sample Numerical value regenerates the schematic diagram and domain of the difference channel sample when meeting preset condition, and is calling the difference channel parameter When changing unit generation difference channel, also the preset parameter value of acquired difference channel to be formed is judged, until its When preset parameter value is in the value range of the parameter preset of the difference channel parameterized units, the difference channel is just called to join Numberization unit generates the domain of difference channel to be formed, thus emulated after reducing the difference channel generation to be formed, The probability modified when inspection saves a large amount of time and workload, to further improve the difference channel Formation efficiency.

In addition, in the generation system of difference channel parameterized units provided in an embodiment of the present invention, the difference channel sample Metal-oxide-semiconductor length, MOS transistor device quantity are completely the same based on present principles figure and domain generation, and metal-oxide-semiconductor corrects drawing for width Enter, so that the width of metal-oxide-semiconductor amendment every section of grid of width and metal-oxide-semiconductor fits like a glove after calculating, so that utilizing the difference In the schematic diagram and domain of the difference channel that circuit parameter unit generates, the difference channel schematic diagram and domain to be formed Matching between middle difference metal-oxide-semiconductor parameter is preferable, solves difference MOS in difference channel schematic diagram in the prior art and domain The matching problem of pipe parameter, improves the matching of entire difference channel, while improving the core of the difference channel application The yields and performance of piece.

For the various method embodiments described above, for simple description, therefore, it is stated as a series of action combinations, but Be those skilled in the art should understand that, the application is not limited by the described action sequence because according to the application, certain A little steps can be performed in other orders or simultaneously.Secondly, those skilled in the art should also know that, it is retouched in specification The embodiment stated belongs to preferred embodiment, necessary to related actions and modules not necessarily the application.

Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other The difference of embodiment, the same or similar parts in each embodiment may refer to each other.For device disclosed in embodiment For, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is said referring to method part It is bright.

It should be noted that, in this document, relational terms such as first and second and the like are used merely to a reality Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that There is also other identical elements in process, method, article or equipment including the element.

For convenience of description, it is divided into various units when description apparatus above with function to describe respectively.Certainly, implementing this The function of each unit can be realized in the same or multiple software and or hardware when application.Pass through above embodiment Description it is found that those skilled in the art can be understood that the application can add required common hardware flat by software The mode of platform is realized.Based on this understanding, the technical solution of the application substantially in other words contributes to the prior art Part can be embodied in the form of software products, which can store in storage medium, such as ROM/RAM, magnetic disk, CD etc., including some instructions are used so that a computer equipment (can be personal computer, service Device or the network equipment etc.) execute method described in certain parts of each embodiment of the application or embodiment.

The foregoing description of the disclosed embodiments makes professional and technical personnel in the field can be realized or use the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein General Principle can be realized in other embodiments without departing from the spirit or scope of the application.Therefore, the application It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one The widest scope of cause.

Claims

1. a kind of generation method of difference channel parameterized units, the difference channel are made of metal-oxide-semiconductor, which is characterized in that packet It includes:

Step 1: choosing difference channel sample, obtain the preset parameter value of the difference channel sample, the parameter preset includes: The quantity that the quantity, the length of metal-oxide-semiconductor of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid fold in the difference channel sample；

Step 2: the quantity folded according to the width of metal-oxide-semiconductor in the difference channel sample and metal-oxide-semiconductor grid calculates metal-oxide-semiconductor In every section of grid width；

Step 3: according to the width generation of the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample The schematic diagram and netlist of difference channel sample；

Step 4: according to the quantity that the quantity of metal-oxide-semiconductor in the difference channel sample, the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid fold with And in metal-oxide-semiconductor every section of grid width, generate the domain of the difference channel sample；

Step 5: corresponding storage being carried out to schematic diagram, netlist and the domain of the difference channel sample of generation, forms difference channel ginseng Numberization unit template generates difference channel parameterized units, is called with being integrated into Process design kit for circuit designers, utilizes The difference channel parameterized units generate difference channel.

2. generation method according to claim 1, which is characterized in that step 1 further include:

Step 11: after the preset parameter value for obtaining the difference channel sample, judging the acquired difference channel sample Preset parameter value whether meet preset condition, when the preset parameter value of the acquired difference channel sample is unsatisfactory for presetting When condition, the preset parameter value of the acquired difference channel sample is adjusted.

3. generation method according to claim 2, which is characterized in that the difference channel sample that the judgement obtains Whether preset parameter value meets preset condition

Whether the quantity of metal-oxide-semiconductor is 1 or 2 in the acquired difference channel sample of judgement；

When the preset parameter value of the acquired difference channel sample is unsatisfactory for preset condition, to the acquired difference The preset parameter value of circuit sample, which is adjusted, includes:

When the number of devices of metal-oxide-semiconductor in the acquired difference channel sample is not 1 or 2, then 1 or 2 is adjusted to.

4. generation method according to claim 2, which is characterized in that the difference channel sample that the judgement obtains Whether preset parameter value meets preset condition further include:

Whether the length of metal-oxide-semiconductor is within the scope of preset length in the acquired difference channel sample of judgement；

When the preset parameter value of the acquired difference channel sample is unsatisfactory for preset condition, to the acquired difference The preset parameter value of circuit sample is adjusted further include:

The length of the metal-oxide-semiconductor described in the acquired difference channel sample is less than the minimum value of the preset length range When, it is adjusted to the minimum value of the preset length range；

The length of the metal-oxide-semiconductor described in the acquired difference channel sample is greater than the maximum value of the preset length range When, it is adjusted to the maximum value of the preset length range.

5. generation method according to claim 2, which is characterized in that the difference channel sample that the judgement obtains Whether preset parameter value meets preset condition further include:

Whether the width of metal-oxide-semiconductor is within the scope of the first predetermined width in the acquired difference channel sample of judgement；

The width of the metal-oxide-semiconductor described in the acquired difference channel sample is less than the minimum of the first predetermined width range When value, it is adjusted to the minimum value of the first predetermined width range；

The width of the metal-oxide-semiconductor described in the acquired difference channel sample is greater than the maximum of the first predetermined width range When value, it is adjusted to the maximum value of the first predetermined width range.

6. generation method according to claim 2, which is characterized in that the difference channel sample that the judgement obtains Whether preset parameter value meets preset condition further include:

Whether the quantity that metal-oxide-semiconductor grid folds in the acquired difference channel sample of judgement is within the scope of preset quantity；

The quantity that the metal-oxide-semiconductor grid described in the acquired difference channel sample folds is less than the preset quantity range When minimum value, it is adjusted to the minimum value of the preset quantity range；

The quantity that the metal-oxide-semiconductor grid described in the acquired difference channel sample folds is greater than the preset quantity range When maximum value, it is adjusted to the maximum value of the preset quantity range.

7. generation method according to claim 1, which is characterized in that the calculating of the width of every section of grid is public in the metal-oxide-semiconductor Formula are as follows:

Wherein, floor indicates to be rounded；W indicates that the width of the metal-oxide-semiconductor, nf indicate the quantity that metal-oxide-semiconductor grid folds, grid table Show the minimum lattice point of the difference channel sample manufacture craft.

8. generation method according to claim 1, which is characterized in that step 2 further include:

Step 21: obtain after the width of every section of grid, judge in the metal-oxide-semiconductor every section of grid in the metal-oxide-semiconductor width whether Within the scope of second predetermined width, when the width of every section of grid in the metal-oxide-semiconductor is not within the scope of the second predetermined width, to described The width of every section of grid is adjusted in metal-oxide-semiconductor.

9. generation method according to claim 8, which is characterized in that when the width of every section of grid in the metal-oxide-semiconductor is not When within the scope of two predetermined widths, the width of every section of grid in the metal-oxide-semiconductor is adjusted includes:

If the width of every section of grid is less than the minimum value of the second predetermined width range in the metal-oxide-semiconductor, it is adjusted to described The minimum value of second predetermined width range；

If the width of every section of grid is greater than the maximum value of the second predetermined width range in the metal-oxide-semiconductor, it is adjusted to The maximum value of the second predetermined width range.

10. generation method according to claim 8 or claim 9, which is characterized in that in step 2 after step 21 further include:

Step 22: according to the width of every section of grid in the metal-oxide-semiconductor, recalculating the width of the metal-oxide-semiconductor, be denoted as the metal-oxide-semiconductor Amendment width；

Step 3 includes: the amendment width according to the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample Generate the schematic diagram and netlist of difference channel sample；

Step 4 includes: to be folded according to the quantity of metal-oxide-semiconductor, the amendment width of metal-oxide-semiconductor, metal-oxide-semiconductor grid in the difference channel sample Quantity and metal-oxide-semiconductor in every section of grid width, generate difference channel sample domain.

11. generation method according to claim 10, which is characterized in that step 4 includes:

Step 41: the structure type of the difference channel sample is selected according to the quantity of metal-oxide-semiconductor in the difference channel sample；

Step 42: according to the structure type of the difference channel sample, determining that the grid of metal-oxide-semiconductor in the difference channel sample is sat Mark, and the one-point or multi-point in the grid coordinates are chosen as reference coordinate point；

Step 43: being folded according to the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid in the reference coordinate point and the difference channel sample The width of every section of grid in quantity and metal-oxide-semiconductor determines active area in the metal-oxide-semiconductor, source electrode and drain electrode position；

Step 44: the position put according to the reference coordinate point and the difference channel sample metal-oxide-semiconductor determines the differential electrical The position of source electrode, drain electrode and gate electrode in the sample of road；

Step 45: according to position and the difference of the reference coordinate point, the source electrode, drain electrode and gate electrode The schematic diagram and netlist of parallel circuit sample determine the electrical connection of each device in the difference channel sample, generate the difference The domain of parallel circuit sample.

12. a kind of generation method of difference channel, the difference channel are made of metal-oxide-semiconductor, which is characterized in that the generation method packet It includes:

Step 100: obtaining the preset parameter value in difference channel to be formed, the parameter preset includes: difference channel to be formed The quantity that quantity, the length of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and the metal-oxide-semiconductor grid of middle metal-oxide-semiconductor fold；

Step 200: default difference channel parameterized units, judgement are inquired according to the preset parameter value of the difference channel to be formed The preset parameter value of the difference channel to be formed whether in the default difference channel parameterized units parameter preset takes It is worth in range；

Step 300: if the preset parameter value of the difference channel to be formed is in the default difference channel parameterized units In the value range of parameter preset, then the difference channel template to match with the preset parameter value is called directly；

Step 400: if the preset parameter value of the difference channel to be formed is not in the default difference channel parameterized units In the value range of middle parameter preset, then the preset parameter value of the difference channel to be formed is adjusted, is at institute It states in default difference channel parameterized units in the value range of parameter preset, recalls and preset parameter value phase adjusted The difference channel template matched；

Wherein, the default difference channel parameterized units are that the described in any item difference channel parametrizations of claim 1-11 are single Member.

13. a kind of generation system of difference channel parameterized units is applied to the described in any item differential electricals of claim 1-11 The generation method of road parameterized units characterized by comprising

Parameter acquiring unit obtains the preset parameter value in difference channel sample for choosing difference channel sample, described default Parameter includes: the quantity, the length of metal-oxide-semiconductor of metal-oxide-semiconductor in the difference channel sample, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid folding Folded quantity；

Computing unit, for the quantity according to the width of metal-oxide-semiconductor in the difference channel sample and the folding of metal-oxide-semiconductor grid, meter Calculate the width of every section of grid in metal-oxide-semiconductor；

First generation unit, for the width according to the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor and metal-oxide-semiconductor in the difference channel sample Degree generates the schematic diagram and netlist of the difference channel sample；

Second generation unit, for according to the quantity of metal-oxide-semiconductor, the width of metal-oxide-semiconductor, metal-oxide-semiconductor grid in the difference channel sample The width of every section of grid in the quantity and metal-oxide-semiconductor of folding, generates the domain of the difference channel sample；

Storage unit, schematic diagram, netlist and domain for the difference channel sample to generation carry out corresponding storage, form difference Circuit parameter unit template generates difference channel parameterized units, to be integrated into Process design kit for circuit designers tune With, utilize the difference channel parameterized units generate difference channel.

14. generating system as claimed in claim 13, which is characterized in that the parameter acquiring unit further include:

First parameter adjustment unit judges acquired after obtaining the preset parameter value in the difference channel sample Whether the preset parameter value of the difference channel sample meets preset condition, when presetting for the acquired difference channel sample When parameter value is unsatisfactory for preset condition, the preset parameter value of the acquired difference channel sample is adjusted.

15. generation system according to claim 13, which is characterized in that the computing unit further include:

Second parameter adjustment unit judges every in the metal-oxide-semiconductor after the width of every section of grid in obtaining the metal-oxide-semiconductor Whether the width of section grid is within the scope of the second predetermined width, when the width of every section of grid in the metal-oxide-semiconductor is not in the second predetermined width When in range, the width of every section of grid in the metal-oxide-semiconductor is adjusted.

16. generation system according to claim 15, which is characterized in that the computing unit further include:

Parameters revision unit recalculates the width of the metal-oxide-semiconductor, is denoted as the width according to every section of grid in the metal-oxide-semiconductor The amendment width of the metal-oxide-semiconductor.

17. generation system according to claim 16, which is characterized in that second generation unit includes:

Selecting unit, for selecting the structure of the difference channel sample according to the quantity of metal-oxide-semiconductor in the difference channel sample Type；

Selection of datum unit determines MOS in the difference channel sample for the structure type according to the difference channel sample The grid coordinates of pipe, and the one-point or multi-point in the grid coordinates are chosen as reference coordinate point；

First position determination unit, for according to the width of metal-oxide-semiconductor in the reference coordinate point and the difference channel sample, The width of every section of grid, determines active area in the metal-oxide-semiconductor, source electrode and drain electrode position in the quantity and metal-oxide-semiconductor that metal-oxide-semiconductor grid folds It sets；

Second position determination unit, for according to the position that metal-oxide-semiconductor is put in the reference coordinate point and the difference channel sample It sets, determines the position of source electrode, drain electrode and gate electrode in the difference channel sample；

Domain generation unit, for the position according to the reference coordinate point, the source electrode, drain electrode and gate electrode And the schematic diagram and netlist of the difference channel sample, determine the electrical connection of each device in the difference channel sample, Generate the domain of the difference channel sample.

18. a kind of generation system of difference channel, the difference channel are made of metal-oxide-semiconductor, which is characterized in that the generation system packet It includes:

Parameter acquisition module, for obtaining the preset parameter value in difference channel to be formed, the parameter preset includes: to be formed The quantity that the quantity of metal-oxide-semiconductor, the length of metal-oxide-semiconductor, the width of metal-oxide-semiconductor and metal-oxide-semiconductor grid fold in difference channel；

Enquiry module, it is single for inquiring default difference channel parametrization according to the preset parameter value of the difference channel to be formed Member, judges whether the preset parameter value of the difference channel to be formed presets ginseng in the default difference channel parameterized units In several value ranges；

Module is adjusted, it is single not in the default difference channel parametrization for the preset parameter value when the difference channel to be formed When in member in the value range of parameter preset, the preset parameter value of the difference channel to be formed is adjusted, is at In the default difference channel parameterized units in the value range of parameter preset；

Calling module, for the preset parameter value when the difference channel to be formed in the default difference channel parameterized units In the case where in the value range of middle parameter preset, the difference channel template to match with the preset parameter value is called directly；

Wherein, the default difference channel parameterized units are the described in any item difference channel parametrizations of claim 13-17 Unit.