CN106339270B - Data verification method and device - Google Patents
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- CN106339270B CN106339270B CN201610741777.2A CN201610741777A CN106339270B CN 106339270 B CN106339270 B CN 106339270B CN 201610741777 A CN201610741777 A CN 201610741777A CN 106339270 B CN106339270 B CN 106339270B
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1064—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in cache or content addressable memories
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Abstract
The present invention relates to the field of data storage technologies, and in particular, to a data verification method and apparatus. The method includes receiving a write request; the writing request carries a first key; calculating the first key to obtain a first check value; storing the first key to a first address; inserting the mapping of the first check value and the first address in a mapping relation; receiving a first read request; the first read request carries the first key; calculating a first check value of the first key carried by the first read request; inquiring the mapping relation according to the first check value to obtain the first address; reading a key in the first address; and determining that the read request carries the first key and the key in the first address is the same, and determining that the key in the first address is the first key. The data verification method and the data verification device of the embodiment of the invention save the storage resources occupied during data storage on the premise of realizing data verification.
Description
Technical Field
The present invention relates to the field of data storage technologies, and in particular, to a data verification method and apparatus.
Background
In the data storage technology, the storage medium inevitably has faults such as damage, jump and the like, and the accuracy of the data stored in the storage medium is influenced. In order to correctly retrieve the data in the storage medium, the processing means checks the data before reading it.
In Key-Value (KV) storage, it is necessary to calculate Key and Value respectively to obtain check values, and store the check values of Key and Value. When reading the Key, the Key carried in the read request needs to be calculated to obtain a check value, the stored Key check value is obtained, and the check value of the Key carried in the read request is compared with the stored Key check value to determine whether the stored Key is accurate.
In the above Key-Value storage manner, since the check values of Key and Value need to be stored separately, a relatively large amount of storage resources are occupied.
Disclosure of Invention
The invention aims to provide a data verification method and a data verification device, which are used for saving storage resources occupied during data storage on the premise of realizing data verification.
In a first aspect, an embodiment of the present invention provides a data verification method, including:
receiving a write request; the writing request carries a first key;
calculating the first key to obtain a first check value;
storing the first key to a first address;
inserting the mapping of the first check value and the first address in a mapping relation;
receiving a first read request; the first read request carries the first key;
calculating a first check value of the first key carried by the first read request;
inquiring the mapping relation according to the first check value to obtain the first address;
reading a key in the first address;
and when the read request is determined to carry the first key and the key in the first address is the same, determining the key in the first address as the first key.
By adopting the method of the embodiment of the invention, only the key value, the value and the check value of the value are stored when the data is stored, the storage resource is saved, and the key is searched according to the check value of the key when the data is read, so that the key is logically checked.
In a possible design, the calculating the first key obtains a first check value, specifically, the calculating the first key obtains the first check value by using a hash algorithm.
In one possible design, the write request further carries a value, and the method further includes:
calculating the value to obtain a second check value;
storing the value with the second check value.
In one possible design, the method further includes:
receiving a second read request; the second read request carries the first key;
calculating a first check value of the first key carried by the second read request;
inquiring the mapping relation according to the first check value to obtain a second address;
reading a key in the second address;
determining that the key in the second address is not the first key when it is determined that the second read request carries the first key and the key in the second address are different.
The key check value and the key are in one-to-many relation, and when the key inquired according to the key check value carried by the read request is inconsistent with the key in the read request, the key at the corresponding storage position is not the key carried by the read request. At this time, a key storage error may occur, and a collision (also referred to as a collision) of key check values may also occur.
In one possible design, when it is determined that the second read request carries the first key and a key in the second address that are different, the method further includes:
calculating a key in the second address to obtain a third check value;
determining that a check value of a key in the second address conflicts with the first check value when the first check value is the same as the third check value.
By adopting the method of the embodiment of the invention, the third check value is obtained by calculating the key in the second address, if the third check value is the same as the first check value, the plurality of keys correspond to the same key check value, otherwise, the key storage is wrong.
In a second aspect, in order to implement the data verification method of the first aspect, an embodiment of the present invention provides a data verification apparatus, where the apparatus has a function of implementing the data verification method. The functions can be realized by hardware, and the functions can also be realized by executing corresponding software by hardware. The hardware or software includes one or more modules corresponding to the above-described functions.
In a possible design, the data verification apparatus includes a plurality of functional modules, configured to implement any one of the data verification methods in the first aspect, so that data storage resources can be saved on the premise of implementing key verification.
In one possible design, the data verification apparatus includes:
a first receiving unit configured to receive a write request; the writing request carries a first key;
the first calculation unit is used for calculating the first key to obtain a first check value;
a storage unit for storing the first key to a first address;
the mapping unit is used for inserting the mapping between the first check value and the first address in a mapping relation;
a second receiving unit for receiving the first read request; the first read request carries the first key;
the second calculation unit is used for calculating a first check value of the first key carried by the first reading request;
the query unit is used for querying the mapping relation according to the first check value to obtain the first address;
a reading unit configured to read a key in the first address;
and the determining unit is used for determining that the key in the first address is the first key when the reading request is determined to carry the first key and the key in the first address is the same.
In a third aspect, an embodiment of the present invention provides a computer storage medium for storing computer software instructions for the data verification apparatus, which includes a program designed to execute the above aspects.
In a fourth aspect, an embodiment of the present invention provides a storage device, where the storage device includes a processor, a memory, and a communication interface, where the memory is connected to the processor, the processor is connected to the communication interface through a bus, the interface is configured to receive an operation request, such as a write request or a read request described in the embodiments of the first aspect, and the processor executes computer operation instructions in the memory to implement the solution described in the embodiments of the first aspect.
Compared with the prior art, the scheme of the embodiment of the invention can save the storage resources occupied during data storage on the premise of realizing data verification.
Drawings
In order to more clearly illustrate the technical solution in the embodiments of the present invention, the drawings required to be used in the embodiments will be briefly described below.
FIG. 1 is a schematic diagram of a possible memory device of the present invention;
FIG. 2 is a diagram illustrating an effect of storing data in the prior art;
FIG. 3 is a flow chart of a data verification method according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a data storage structure obtained according to the method of FIG. 3;
FIG. 5 is a schematic diagram of the effect of data access based on the data storage structure shown in FIG. 4;
fig. 6 is a schematic structural diagram of a data verification apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention.
FIG. 1 is a schematic diagram of a possible memory device of the present invention. As shown in fig. 1, the apparatus for executing the data verification method according to the embodiment of the present invention includes: the system comprises a processor, a memory and a communication interface, wherein the memory is connected with the processor, the processor is connected with the communication interface through a bus, and an external storage medium is connected with the processor through the communication interface. The communication bus may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. For ease of illustration, only one bi-directional arrow line is shown in FIG. 1, but that does not indicate only one bus or one type of bus.
The memory is composed of a set of chips and can be used for storing programs, and particularly, the programs can include program codes which comprise computer operation instructions. The memory may include a Random Access Memory (RAM), and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory. The storage medium may be an external storage device such as a hard disk, a magnetic disk, etc., and is connected to the processor through the communication interface to support the storage and access of data by the processor. Further, only one processor is shown in fig. 1, but the processor may be a plurality of processors as needed. The processor executes the data storage and data verification method of the embodiment of the invention by executing the relevant program codes in the memory.
Fig. 2 is a schematic diagram illustrating an effect of storing data in the prior art. As shown in fig. 2, in the conventional Key-Value data storage method, in order to verify a Key Value and a Value of data, a storage medium stores the Key, the Key verification Value, and the Value verification Value, respectively, and therefore, a relatively large amount of storage resources are required.
In order to save occupied storage medium resources as much as possible and realize the verification of Key and Value when storing data, the embodiment of the invention provides a data verification method, in the data verification method, when a processor receives a write request, the write request carries keys and values of data, and the processor allocates a storage address for the data; the processor stores the key carried by the write request, the value carried by the write request and the check value of the value carried by the write request in a corresponding storage area according to the storage address allocated to the data, and a part of storage resources can be saved because the check value of the key is not stored.
In the embodiment of the present invention, although the processor does not store the check value of the write request carrying key, the processor still can logically check the data key when accessing data, specifically, when the processor receives a read request, the read request carries a key; the processor calculates a check value of the read request carrying key; the processor determines the data storage address according to the calculated check value of the key, and if the key inquired in the storage address by the processor is the same as the key carried by the read request, the processor determines that the key is checked correctly.
The data verification method according to the embodiment of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 3 is a flowchart of a data verification method according to an embodiment of the present invention. As shown in fig. 3, the method includes:
s101, a processor receives a write request, wherein a key of data to be stored is carried in the write request, and the key carried in the write request is called a first key.
Optionally, the write request may also carry a value of data to be stored.
S102, the processor calculates the first key to obtain a first check value.
When the write request carries a value, the processor also calculates a second check value for the value carried by the write request.
The processor calculates the first key by using a check algorithm to obtain a first check value, and optionally, the check algorithm used by the processor is a hash algorithm. Similarly, the processor calculates a second check value of the value carried by the write request by adopting a hash algorithm.
S103, the processor stores the first key to the first address.
When the write request carries a value and the processor calculates a second check value of the value, the processor also stores the value and the second check value in the write request.
S104, the processor inserts the mapping between the first check value and the first address in the mapping relation.
Optionally, after the processor stores the value in the write request and the second parity value, the processor further inserts a mapping between the value, the second parity value, and the storage address in the mapping relationship.
Optionally, since the value and the second parity value in the write request both correspond to the first key, the processor may insert a mapping between the first parity value and the first address only in the mapping relationship, where the mapping between the value, the second parity value, and the storage address is calculated according to the mapping between the first parity value and the first address, and after determining the first address of the first key, move the storage address with the first offset as the value based on the first address, and move the storage address with the second offset as the second parity value. In this case, a first offset of the first address and the value storage address and a second offset of the first address and the value check value may be added to the mapping of the first check value and the first address to facilitate reading of the value and the check value.
S105, the processor receives a first reading request; the first read request carries the first key;
s106, the processor calculates a first check value of the first key carried by the first reading request;
s107, the processor queries the mapping relation according to the first check value to obtain the first address;
s108, the processor reads the key in the first address;
s109, when the read request is determined to carry the first key and the key in the first address is the same, the processor determines that the key in the first address is the first key.
In the embodiment of the invention, when the processor receives the write request and the write request carries the first key and the value, the processor allocates the storage address for the first key, the value carried by the write request and the check value of the value, and does not store the check value of the first key.
When the processor allocates the storage addresses for the first key, the value and the check value of the value, the storage addresses of the first key, the value and the check value of the value may be explicitly indicated, or only one storage area may be indicated, instead of explicitly indicating the storage location of each part of the target data, at this time, the processor may sequentially store each part according to a preset rule, for example, first store the first key, then the value carried by the write request, and finally the check value of the value, and the specific storage manner is not specifically limited. In this manner, the processor determines a mapping of the first check value to the first address and a mapping of the check value of the value sum to the storage address based on the result of storing portions of the final data.
In a possible design, the checking method further includes that the processor establishes a data index table, where the data index table is used to carry a mapping relationship between the first check value and the first address, and optionally, is also used to carry mappings between the check values of the value and respective storage addresses.
Optionally, the data index table includes a plurality of data index entries, where each data index entry may be a mapping relationship of one data.
For example, in one data index entry, a mapping of the first check value to the first address, a mapping of a value and a check value of the value to respective storage addresses are stored.
Optionally, each data index entry is further provided with a data index to facilitate data lookup.
In the solution of the present application, since the processor allocates a storage address that does not include the check value of the first key (i.e., the first check value), the first check value is not stored. However, when reading the first key or the value corresponding to the first key, if the first key is not verified, an access error may occur, so that on the premise that the first key verification value is not stored, in order to still achieve the logic verification effect on the first key when reading data, the processor does not directly use the first key as an index but uses the first verification value as an index when establishing the data index entry. Therefore, when the processor receives the read request and the read request carries the first key, the processor calculates the first key to obtain the first check value. The processor searches the matched data index item from the data index table according to the first check value, and further determines a first address to be accessed according to the mapping between the first check value in the data index item and the first address. If the processor reads the same key as the first key at the first address, verification of the data key is achieved.
In one possible implementation, the processor stores the created data index table in a memory or other storage medium.
Fig. 4 is a schematic diagram of a data storage structure obtained according to the method shown in fig. 3. As shown in fig. 4, the data index table is stored in a memory structure. As shown in FIG. 4, a plurality of data index entries of data are included in the data index table, each data index entry including a check value of the data key and a mapping of portions of the data to storage addresses. For example, the stored data includes first data and second data, the key of the first data is key1, the key of the second data is key2, and the check algorithm adopted by the processor is a Hash (Hash) algorithm, so that the data index entry of the first data includes Hash (key1) and the physical storage address (PBA) of each part of the first data (check values of key1, value1, and value 1) in the storage medium; similarly, the data index entry of the second data includes Hash (key2) and the physical storage address (PBA) of each portion of the second data (check values of key2, value2, and value 2) in the storage medium. Wherein, Hash (Key1) represents the check value of Key1 calculated by using Hash algorithm.
In the storage medium, in the storage location indicated by the data index entry PBA of the first data, the check values of key1, value1, and value1 are stored; in the storage location indicated by the data index entry PBA of the second data, the check values of key2, value2, and value2 are stored, and since the data index entry is based on the check value index of the data key, although the check value of the data key is not stored in the storage medium, the process of finding the target data key in the storage medium according to the data index entry is essentially equivalent to checking the key.
Fig. 5 is a diagram illustrating the effect of data access based on the data storage structure shown in fig. 4. As shown in fig. 5, assuming that the data to be read by the processor is the first data, the processor searches the key1 and/or the value1 of the first data from the storage medium according to the key1 of the first data. To read key1 and/or value1, the processor calculates a Hash value-Hash (key1) of key1, and the processor finds a data index entry corresponding to the first data from the Hash (key1) and finds a PBA corresponding to the first data from the corresponding data index entry. And the processor finds the key' to be checked according to the PBA in the data index entry corresponding to the first number. The processor determines whether the key' found to be verified is consistent with the key1 of the first data. If the key' to be verified is consistent with the key1 of the first data, it indicates that the key verification of the first data passes. If the processor's access operation is a key for only the first data, the processor may operate on the key region, and if the processor's access operation is for the first data key and value, the processor performs operations further comprising:
the processor searches the index item where the first key check value is located for the storage address of the value and the check value of the value, reads the value of the storage address of the value, calculates the check value of the value read from the storage address of the value, compares the calculated check value of the value with the check value of the value stored in the corresponding storage address, and if the calculated check value of the value is the same as the check value of the value stored in the corresponding storage address, the data is verified correctly.
It should be noted that the check value of a key and the key are in a one-to-many relationship, that is, different keys may be calculated to obtain the same key check value, and when a situation that one key check value corresponds to multiple keys occurs, it indicates that a collision of the key check values occurs. The probability of a key check value collision is extremely low, typically less than one ten thousandth.
In the embodiment of the invention, when the key found by using the check value of the read request carrying key is consistent with the read request carrying key, the key check of the data can be determined to pass, if the key found by using the check value of the read request carrying key is inconsistent with the read request carrying key, one may be that the stored data has an error, and the other may be that the key check value collides.
On the basis of the verification method shown in fig. 3, if the processor further receives a second read request, and the second read request carries the first key; the processor calculates a first check value of the first key carried by the first request; the processor queries the mapping relation according to the first check value, and reads a key in the second address if the second address is obtained; the processor compares a key in a second address to a key in a second read request carrying the first key, and determines that the key in the second address is not the first key when it is determined that the second read request carrying the first key is different from the key in the second address.
The processor reads a key different from the first key at the second address according to the first key carried by the read request, and may be that the stored key has an error or that a key check value has a conflict, and the determining method includes: the processor calculates a key in the second address to obtain a third check value; if the first check value is the same as the third check value, the processor determines that the check value of the key in the second address conflicts with the first check value; if the first check value is different from the third check value, the processor determines that an error has occurred with the key in the second address.
The above-mentioned scheme provided by the embodiment of the present invention is introduced mainly from the perspective of reading and writing data from and to the processor. It will be appreciated that the processor, in order to implement the above-described functions, may comprise corresponding hardware structures and/or software modules for performing the respective functions. Those of skill in the art will readily appreciate that the present invention can be implemented in hardware or a combination of hardware and computer software, with the exemplary elements and algorithm steps described in connection with the embodiments disclosed herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
Fig. 6 is a schematic structural diagram of a data verification apparatus according to an embodiment of the present invention. As shown in fig. 6, the apparatus includes:
a first receiving unit 301 configured to receive a write request; the writing request carries a first key;
a first calculating unit 302, configured to calculate the first key to obtain a first check value;
a storage unit 303, configured to store the first key to a first address;
a mapping unit 304, configured to insert a mapping between the first check value and the first address in a mapping relationship;
a second receiving unit 305 for receiving the first read request; the first read request carries the first key;
a second calculating unit 306, configured to calculate a first check value of the first key carried by the first read request;
a query unit 307, configured to query the mapping relationship according to the first check value to obtain the first address;
a reading unit 308 for reading the key in the first address;
a determining unit 309, configured to determine that the key in the first address is the first key when it is determined that the read request carries the first key and the key in the first address is the same.
Optionally, the calculating the first key obtains a first check value, specifically, the calculating the first key by using a hash algorithm obtains the first check value.
Optionally, the write request further carries a value;
the first calculating unit 302 is further configured to calculate the value to obtain a second check value;
the storage unit 303 is further configured to store the value and the second check value.
Optionally, the second receiving unit 305 is further configured to receive a second read request; the second read request carries the first key;
the second calculating unit 306 is further configured to calculate that the second read request carries the first check value of the first key;
the querying unit 307 is further configured to query the mapping relationship according to the first check value to obtain a second address;
the reading unit 308 is further configured to read a key in the second address;
the determining unit 309 is further configured to determine that the key in the second address is not the first key when it is determined that the second read request carries the first key and the key in the second address is different.
Optionally, when the determining unit 309 determines that the second read request carries the first key and the key in the second address are different:
the second calculating unit 306 is further configured to calculate a key in the second address to obtain a third check value;
when the first check value is the same as the third check value, the determining unit 309 is further configured to determine that the check value of the key in the second address conflicts with the first check value.
By adopting the scheme of the embodiment of the invention, only the key value, the value and the check value of the value are stored when the data is stored, so that the storage resource is saved, and when the data is read, the key is searched according to the check value of the key, so that the key is logically checked.
In another embodiment of the present invention, in a hardware implementation, the functions of the first receiving unit 301, the second receiving unit 305, and the reading unit 308 may be performed by a communication interface, and the functions of the first calculating unit 302, the storing unit 303, the mapping unit 304, the querying unit 307, and the determining unit 309 may be performed by a processor or a processor in combination with a memory, wherein a medium for storing data may be an external storage medium.
It is understood that the processor used in the apparatus of the embodiments of the present invention may be a Central Processing Unit (CPU), a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. The processor may also be a combination of computing functions, e.g., comprising one or more microprocessors, DSPs, and microprocessors, among others.
It is clear to a person skilled in the art that the descriptions of the embodiments of the present invention may be referred to each other, and for convenience and brevity of description, for example, the functions and steps of the apparatuses and the devices provided by the embodiments of the present invention may be referred to the relevant description of the method embodiments of the present invention.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied in hardware or in software instructions executed by a processor. The software instructions may consist of corresponding software modules that may be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. Of course, the storage medium may also be integral to the processor. The processor and the storage medium may reside in an ASIC. Additionally, the ASIC may reside in user equipment. Of course, the processor and the storage medium may reside as discrete components in user equipment.
In the several embodiments provided in this application, it should be understood that the disclosed system, apparatus, and method may be implemented in other ways without departing from the scope of the application. For example, the above-described embodiments are merely illustrative, and for example, the division of the modules or units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Additionally, the systems, devices, and methods described, as well as the illustrations of various embodiments, may be combined or integrated with other systems, modules, techniques, or methods without departing from the scope of the present application. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some interfaces, and may be in an electronic, mechanical or other form.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (15)
1. A method for data verification, comprising:
receiving a write request; the writing request carries a first key;
calculating the first key to obtain a first check value;
storing the first key to a first address without storing the first check value, the first address storing only one key;
inserting the mapping of the first check value and the first address in a mapping relation;
receiving a first read request; the first read request carries the first key;
calculating a first check value of the first key carried by the first read request;
inquiring the mapping relation according to the first check value to obtain the first address;
reading a key in the first address;
determining that the first push-to-talk has passed the check of the first check value when the direct comparison of the read request carrying the first key is the same as the key in the first address;
determining that the verification of the first key by the first check value fails when the direct comparison that the read request carries the first key is different from the key in the first address.
2. The method according to claim 1, wherein the calculating the first key yields a first check value, in particular using a hash algorithm to calculate the first key yields the first check value.
3. The method of claim 1 or 2, wherein the write request further carries a value, the method further comprising:
calculating the value to obtain a second check value;
storing the value with the second check value.
4. The method of claim 1, further comprising:
receiving a second read request; the second read request carries the first key;
calculating a first check value of the first key carried by the second read request;
inquiring the mapping relation according to the first check value to obtain a second address;
reading a key in the second address;
determining that the key in the second address is not the first key when the direct comparison that the second read request carries the first key is different from the key in the second address.
5. The method of claim 4, when it is determined that the second read request carries the first key different from a key in the second address, the method further comprising:
calculating a key in the second address to obtain a third check value;
determining that a check value of a key in the second address conflicts with the first check value when the first check value is the same as the third check value.
6. A data verification apparatus, comprising:
a first receiving unit configured to receive a write request; the writing request carries a first key;
the first calculation unit is used for calculating the first key to obtain a first check value;
a storage unit configured to store the first key to a first address without storing the first check value, the first address storing only one key;
the mapping unit is used for inserting the mapping between the first check value and the first address in a mapping relation;
a second receiving unit for receiving the first read request; the first read request carries the first key;
the second calculation unit is used for calculating a first check value of the first key carried by the first reading request;
the query unit is used for querying the mapping relation according to the first check value to obtain the first address;
a reading unit configured to read a key in the first address;
a determining unit, configured to determine that the first key has been checked by the first check value when the direct comparison indicates that the read request carries the same first key as the key in the first address;
the determining unit is further configured to determine that verification of the first key by the first verification value fails when the direct comparison indicates that the read request carries the first key and the key in the first address is different.
7. The apparatus according to claim 6, wherein the calculating the first key yields a first check value, in particular using a hash algorithm to calculate the first key yields the first check value.
8. The apparatus of claim 6 or 7, wherein the write request further carries a value;
the first calculating unit is further used for calculating the value to obtain a second check value;
the storage unit is further configured to store the value and the second check value.
9. The apparatus of claim 6,
the second receiving unit is further configured to receive a second read request; the second read request carries the first key;
the second calculating unit is further configured to calculate that the second read request carries the first check value of the first key;
the query unit is further configured to query the mapping relationship according to the first check value to obtain a second address;
the reading unit is further used for reading the key in the second address;
the determining unit is further configured to determine that the key in the second address is not the first key when the direct comparison indicates that the second read request carries the first key and the key in the second address is different.
10. The apparatus of claim 9, wherein when the determining unit determines that the second read request carries the first key and a key in the second address that are different:
the second calculating unit is further configured to calculate a key in the second address to obtain a third check value;
the determining unit is further configured to determine that the check value of the key in the second address conflicts with the first check value when the first check value is the same as the third check value.
11. A storage device is characterized in that the storage device comprises a communication interface, a processor and a memory, wherein the memory is connected with the processor, and the processor is connected with the communication interface through a bus;
the communication interface is used for receiving a write request; the writing request carries a first key;
the processor executes a computer execution instruction in the memory to calculate the first key to obtain a first check value, stores the first key to a first address without storing the first check value, the first address only stores one key, and inserts the mapping between the first check value and the first address in a mapping relation;
the communication interface is further configured to receive a first read request; the first read request carries the first key;
the processor executes the computer execution instruction in the memory and is further configured to calculate a first check value of the first key carried by the first read request, query the mapping relation according to the first check value to obtain the first address, read the key in the first address, determine that the first key passes the check of the first check value when the first key carried by the read request is directly compared with the key in the first address, and determine that the first key fails to be checked by the first check value when the first key carried by the read request is directly compared with the key in the first address.
12. The storage device according to claim 11, wherein the calculating the first key obtains a first check value, specifically, the calculating the first key obtains the first check value by using a hash algorithm.
13. The storage device of claim 11 or 12, wherein the write request further carries a value, and wherein the processor executing the computer-executable instructions in the memory is further configured to compute the value to obtain a second parity value, and store the value and the second parity value.
14. The memory device of claim 11, wherein the communication interface is further configured to receive a second read request; the second read request carries the first key;
the processor executes the computer execution instruction in the memory and is further configured to calculate a first check value that the second read request carries the first key, query the mapping relation according to the first check value to obtain a second address, read a key in the second address, and determine that the key in the second address is not the first key when directly comparing that the second read request carries the first key and that the key in the second address is different.
15. The storage device of claim 14, wherein when the processor determines that the second read request carries a different key than the first key, the processor executes the computer-executable instructions in the memory to calculate a key at the second address to obtain a third check value, and when the first check value is the same as the third check value, the processor determines that the check value at the key at the second address conflicts with the first check value.
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