CN106338682B - The test device of driving plate - Google Patents
The test device of driving plate Download PDFInfo
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- CN106338682B CN106338682B CN201510394646.7A CN201510394646A CN106338682B CN 106338682 B CN106338682 B CN 106338682B CN 201510394646 A CN201510394646 A CN 201510394646A CN 106338682 B CN106338682 B CN 106338682B
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Abstract
The invention discloses a kind of test devices of driving plate, including：Digital signal processor DSP chip, the dsp chip include enhancing pulsewidth modulation EPWM module and enhancing capture ECAP module；The EPWM module is connected with tested driving plate, for generating and exporting test pulse to the tested driving plate, so that the tested driving plate exports corresponding pulse signal according to the test pulse；The ECAP module is connected with the tested driving plate, for the pulse signal according to the tested driving plate output, obtain the dead time of the tested driving plate, scheme to be tested the tested driving plate, without being tested by artificial means driving plate, test is fast and simple, and can be avoided influence of the artifact to test result, testing efficiency and precision are improved, the driving plate test request of high standard is met.
Description
Technical field
The present invention relates to circuit test fields, more particularly to the test device of driving plate.
Background technique
Driving plate is commonly used in driving insulated gate bipolar transistor (Insulated Gate Bipolar
Transistor, IGBT), it is widely used in the components such as inverter.
In practical application, usually require to test the basic performance of driving plate using preceding, it is existing to driving plate
Test process is usually to access input pulse in pin PWMA and PWMB, believed by the output of artificial observation driving plate pin
It number compares with the default dead time of hardware, to realize the test to driving plate.
This test method complexity is cumbersome, inefficient, and the generation that will lead to error causes measuring accuracy lower, nothing
Method meets the driving plate test request of high standard.
Summary of the invention
The present invention provides a kind of test device of driving plate, to solve test method complexity in the prior art it is cumbersome,
It is inefficient, measuring accuracy is lower, the problem of being unable to satisfy the driving plate test request of high standard.
The test device of driving plate provided by the invention, including：Digital signal processor DSP chip,
The dsp chip includes enhancing pulsewidth modulation EPWM module and enhancing capture ECAP module；
The EPWM module is connected with tested driving plate, for generating and testing arteries and veins to the tested driving plate output
Punching, so that the tested driving plate exports corresponding pulse signal according to the test pulse；
The ECAP module is connected with the tested driving plate, for the arteries and veins according to the tested driving plate output
Signal is rushed, the dead time of the tested driving plate is obtained, to test the tested driving plate.
The test device of driving plate provided by the invention is generated by the EPWM module in dsp chip and is tested to described
Driving plate exports test pulse, and the tested driving plate is made to export corresponding pulse signal, ECAP mould according to the test pulse
Root tuber obtains the dead time of the tested driving plate, thus to institute according to the pulse signal of the tested driving plate output
The scheme that tested driving plate is tested is stated, without being tested by artificial means driving plate, test is fast and simple, and
It can be avoided influence of the artifact to test result, improve testing efficiency and precision, the driving plate test for meeting high standard is wanted
It asks.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the test device for the driving plate that the embodiment of the present invention one provides；
Fig. 2 is the structural schematic diagram of the test device of driving plate provided by Embodiment 2 of the present invention；
Fig. 3 is the structural schematic diagram of the test device for the driving plate that the embodiment of the present invention three provides；
Fig. 4 is the structural schematic diagram of the test device for the driving plate that the embodiment of the present invention four provides.
Specific embodiment
Embodiment one
Fig. 1 is the structural schematic diagram of the test device for the driving plate that the embodiment of the present invention one provides.As shown in Figure 1, this hair
A kind of bright test device for providing driving plate includes：Digital signal processor (Digital Signal Processing, DSP)
Chip 1,
The dsp chip 1 includes enhancing pulsewidth modulation EPWM (Enhance Pulse Width Modulator) module 11
Enhance trapping module 12 with ECAP (Enhance Capture Module)；
The EPWM module 11 is connected with tested driving plate 2, for generating and testing to the tested output of driving plate 2
Pulse, so that the tested driving plate 2 exports corresponding pulse signal according to the test pulse；
The ECAP module 12 is connected with the tested driving plate 2, the institute for being exported according to the tested driving plate 2
Pulse signal is stated, the dead time of the tested driving plate 2 is obtained, to test the tested driving plate 2.
Specifically, the test pulse that the EPWM module 11 generates that the duty ratio of two-way complementation is 50% is input to tested drive
The input pin of movable plate 2, for example, PWMA the and PWMB pin of tested driving plate 2, the output pin for being tested driving plate 2 will be described
Output of pulse signal is tested driving plate 2 according to the test pulse and exports corresponding pulse signal, according to quilt to ECAP module 12
The pulse signal that driving plate 2 exports is surveyed, tested driving plate 2 can be tested.Specifically, EPWM module 11 is to tested driving
Plate 2 inputs two-way test pulse, correspondingly, the tested driving plate 2 exports two pulse signals.
In the present embodiment, is generated by the EPWM module in dsp chip and exports test pulse to the tested driving plate,
The tested driving plate is set to export corresponding pulse signal according to the test pulse, ECAP module is according to the tested driving plate
The pulse signal of output obtains the dead time of the tested driving plate, so that the tested driving plate is tested
Scheme, without being tested by artificial means driving plate, test is fast and simple, and can be avoided artifact to test
As a result influence improves testing efficiency and precision, meets the driving plate test request of high standard.
Preferably, it on the basis of shown in Fig. 1, for the applicability of the test device of driving plate, is connect in tested driving plate
Before receiving test pulse, first the test pulse of EPWM module output can be handled, correspondingly, described device is also wrapped
It includes：First level conversion unit, the input terminal of first level conversion unit are connected with the EPWM module, output end with
The input pin of the tested driving plate is connected；The pulse that first level conversion unit is used to export EPWM module is believed
Number carry out level conversion, and export to the tested driving plate.
Specifically, EPWM module 11 exports the test pulse of generation to the first level conversion unit, the first level conversion
Unit carries out level conversion to the test pulse that EPWM module 11 exports, test pulse and tested driving plate after making level conversion
Input request signal matching, and the test pulse after level conversion is exported to tested driving plate.
By the way that the first level conversion unit is arranged, the pulse signal that EPWM module exports can be subjected to level conversion, with
A variety of tested driving plate matchings, keep the applicability of the test device of driving plate stronger.
Embodiment two
Fig. 2 is the structural schematic diagram of the test device of driving plate provided by Embodiment 2 of the present invention, and the present embodiment is being implemented
On the basis of example one, short-circuit fault simulation circuit is increased, to realize the test to driving plate failed shorted state.Such as Fig. 2 institute
Show, the test device that the present invention provides a kind of driving plate further includes short-circuit fault simulation circuit 31；The dsp chip 1 further includes：
First universal input and output module (General Purpose Input Output, GPIO) the 13, the 2nd GPIO module 14 and master
Control module 15；
The first GPIO module 13 is connect with the main control module 15, under the control of the main control module 15,
Control signal is exported to the short-circuit fault simulation circuit 31；
The input terminal of the short-circuit fault simulation circuit 31 is connected with the first GPIO module 13, output end with it is described
Tested driving plate 2 is connected, the control signal for being exported according to the first GPIO module 13, to the tested driving plate 2
Fault simulation signal is provided；
The 2nd GPIO module 14 is connect with the output port of the tested driving plate 2 and feedback output port respectively,
For receiving the pulse letter of the output port output of the feedback signal and the tested driving plate 2 of the feedback output port output
Number；
The main control module 15 is connect with the 2nd GPIO module 14 and the ECAP module 12 respectively, is used for basis
The pulse signal of the output port output of the feedback signal and the tested driving plate 2 of the feedback output port output, monitoring
Whether output of the tested driving plate 2 under fault simulation signal and feedback signal are correct, if correctly, indicating the ECAP
Module 12 tests the tested driving plate 2.
In practical applications, the first GPIO module 13 and the 2nd GPIO module 14 can be arranged in it is same on dsp chip
The different port group or identical port set of one GPIO module.
Control process is specifically, the first GPIO module 13 is electric to short-circuit fault simulation under the control of the main control module 15
The output of road 31 control signal；The control signal that short-circuit fault simulation circuit 31 is exported according to the first GPIO module 13, to quilt
It surveys driving plate 2 and fault simulation signal is provided；The feedback signal and output port that tested driving plate 2 exports feedback output port are defeated
Pulse signal transmission out gives the 2nd GPIO module 14；The feedback output that main control module 15 is received according to the 2nd GPIO module 14
The feedback signal of port output and the pulse signal of output port output, monitor tested driving plate 2 under fault simulation signal
Whether output is correct with feedback signal, and when result is correct, instruction ECAP module 12 tests tested driving plate 2.ECAP
The process that module 12 tests the tested driving plate 2 is referring in particular to one content of embodiment, and this embodiment is not repeated.
Certainly, in normal work, being tested the output of 2 output port of driving plate is pulse signal；When a failure occurs, defeated
Out be level signal.For example, when working normally, when the output of tested 2 output port of driving plate is pulse signal, feedback output
The feedback signal of port output is high level signal；When failure, it is tested 2 output port of driving plate and exports low level signal, instead
Feedback output port also exports low level signal.
In embodiment, by the way that short-circuit fault simulation circuit is arranged, the first GPIO module 13, second is provided in dsp chip
GPIO module 14 and main control module 15, to realize before carrying out the test of driving plate dead time, to driving plate in short trouble
Under output whether correctly tested with feedback, improve the test function of the test device of driving plate, and then ensure subsequent
When being broken down using driving plate driving IGBT, the safety of IGBT.
Embodiment three
Fig. 3 is the structural schematic diagram of the test device for the driving plate that the embodiment of the present invention three provides, and the present embodiment is being implemented
On the basis of example two, the test device of driving plate is further described.As shown in Figure 3, it is preferred that short-circuit fault simulation electricity
Road 31 may include：Relay group 310 and the 4th level conversion unit 311；
The first GPIO module 13 is connected with the input terminal of the 4th level conversion unit 311, the relay
Group 310 includes the first relay 3101 and the second relay 3102；The output end of 4th level conversion unit 311 respectively and
First relay 3101 is connected with the input terminal of the second relay 3102；
The first output end 231 and third output end 221 of the tested driving plate 2 respectively with first relay 3101
The first contact c1 and the second contact c2 be connected；The second output terminal 232 and the 4th output end 222 of the tested driving plate 2
It is connected respectively with the first contact c3 of second relay 3102 and the second contact c4.
Specifically, the first GPIO module 13 passes through the 4th level conversion unit under the control of the main control module 15
311, the contact for exporting control signal control relay group to relay group 310 is attracted or disconnects, to realize to driving plate short circuit
Whether the output under failure is correctly tested with feedback.Wherein, control signal is for controlling the first of the first relay 3101
Contact c1 and the second contact c2 is attracted or disconnects, to control the first output end 231 and third output end of tested driving plate 2
221 short circuits or open circuit；The the first contact c3 and the second contact c4 that control signal is also used to control the second relay 3102 are attracted
Perhaps it disconnects to control the second output terminal 232 and 222 short circuit or breaking of the 4th output end of tested driving plate 2.
For example, when the first GPIO module 13 exports high level, the first contact c1 of the first relay 3101 and the
Two contact c2 are attracted, and the first contact c3 and the second contact c4 of the second relay 3102 are attracted, correspondingly, tested driving plate 2
First output end 231 and the short circuit of third output end 221, second output terminal 232 and the 4th output end 222 short circuit are simulated with this
The normal condition of IGBT.It is opposite, when the first GPIO module 13 exports low level, the first contact c1 of the first relay 3101 and
Second contact c2 is disconnected, and the first contact c3 and the second contact c4 of the second relay 3102 are disconnected, correspondingly, tested driving plate 2
The first output end 231 and third output end 221 disconnect, second output terminal 232 and the 4th output end 222 disconnect, and carry out mould with this
The malfunction of quasi- IGBT.
Certainly, the feedback signal for the feedback output port output that main control module 15 is received also according to the 2nd GPIO module 14
The pulse signal exported with output port 22, monitoring tested output of the driving plate 2 under fault simulation signal with feedback signal is
It is no correct.
In embodiment, by the way that relay group 310 and the 4th level conversion unit are arranged in short-circuit fault simulation circuit
311, under the control of the main control module 15, by the 4th level conversion unit 311, control letter is exported to relay group 310
The contact of number control relay group is attracted or disconnects, by simulating the normal condition and malfunction of IGBT, to test tested drive
Whether output of the movable plate 2 under short trouble is correctly tested with feedback, improves the test function of the test device of driving plate,
And then it ensures when subsequent use driving plate driving IGBT breaks down, the safety of IGBT.
Example IV
Fig. 4 is the structural schematic diagram of the test device for the driving plate that the embodiment of the present invention four provides, and the present embodiment is above-mentioned
On the basis of embodiment, the test device of driving plate is further described.As shown in figure 4, the test device of driving plate is also
Including：Second electrical level converting unit 41, XOR gate, NOT gate and third level conversion unit 42；
The input terminal of the third level conversion unit 42 is connected with the tested driving plate 2, and the third level turns
The output end for changing unit 42 is connected with the first input end of the input terminal of the NOT gate and the XOR gate respectively, the NOT gate
Output end be connected with the second input terminal of the XOR gate；The output end of the XOR gate and second electrical level conversion are single
The input terminal of member 41 is connected；The output end of the second electrical level converting unit 41 is connected with the ECAP module 12.
Specifically, the input terminal of the third level conversion unit 42 is connected with the output port of the tested driving plate 2
It connects, the tested driving plate 2 has two groups of output ports, and first group of output port is third output port 221 and the 5th output
Port 223, second group of output port are the 4th output port 222 and the 6th output port 224, first group of output port output
One group of output pulse signal corresponding with test pulse all the way, the output of second group of output port with another way test pulse phase
Corresponding one group of output pulse signal.Third level conversion unit 42 is used to export two groups of output pins of tested driving plate 2
Pulse signal carry out level conversion.
The first output end e1 output of the third level conversion unit 42 is that first group after level translation is defeated
The second output terminal e2 output of the pulse signal of exit port output, the third level conversion unit 42 is by level translation
The pulse signal of second group of output port output afterwards, the letter of the third output end e3 output of the third level conversion unit 42
It is number identical as the output signal of the first output end e1, the 4th output end e4 output signal of the third level conversion unit 42 with
The output signal of second output terminal e2 is identical.
More specifically, any output end in third level conversion unit 42 first output end e1 and second output terminal e2
It is connect with the input terminal of the NOT gate, another output end is connected with the first input end of the XOR gate.The NOT gate it is defeated
Outlet is connected with the second input terminal of the XOR gate；The output end of the XOR gate and the second electrical level converting unit 41
Input terminal be connected；The output end of the second electrical level converting unit 41 is connected with the ECAP module 12.
Detailed process is, in the case where removing short trouble, by third level conversion unit 42 by tested driving plate 2
Third output port 221 and the 5th output port 223 and the 4th output port 222 and the output of the 6th output port 224
Two pulse signals are converted into the pulse signal to match with logic circuit, and will be in the two pulse signals after level conversion
Any road pulse signal is negated by NOT gate, and another way pulse signal and negated pulse signal are inputed to exclusive or
Door carries out XOR operation, obtains the output pulse of XOR gate.It is single that the output pulse of XOR gate is transferred to second electrical level conversion again
Member 41 carries out level conversion, and the pulse after level conversion is transferred to ECAP module, and ECAP module is according to the pulse received
Pulse width is measured, the dead time of the tested driving plate 2 is obtained, to test the tested driving plate 2.
In embodiment, by the way that second electrical level converting unit 41, XOR gate, NOT gate and third level conversion unit 42 is arranged,
The input terminal of third level conversion unit 42 is set to be connected with the tested driving plate 2, output end is defeated with the NOT gate respectively
Enter end to be connected with the first input end of the XOR gate, the second input terminal phase of the output end of the NOT gate and the XOR gate
Connection；The output end of the XOR gate is connected with the input terminal of the second electrical level converting unit 41；The second electrical level turns
The output end for changing unit 41 is connected with the ECAP module 12.Logic fortune is carried out to the output pulse signal of tested driving plate 2
It calculates, obtains one group of pulse signal corresponding with dead time and be input in ECAP module, the arteries and veins measured by ECAP module
It rushes width and obtains the dead time of the tested driving plate 2, to test the tested driving plate 2.
Further, the test device of driving plate can also include：5th level conversion unit 51 and the 6th level conversion
Unit 52；The input terminal of 5th level conversion unit 51 and the third output end e3 of the third level conversion unit 42 and
4th output end e4 is connected, and the output end of the 5th level conversion unit 51 is connected with the 2nd GPIO module 14；
The input terminal of 6th level conversion unit 52 is connected with the feedback output port of the tested driving plate 2
It connects, the output end of the 6th level conversion unit 52 is connected with the 2nd GPIO module 14.
Wherein, feedback output port includes feedback port 241 and feedback port 242, is used to export opposite with test pulse
The one group of feedback level signal answered.
Specifically, the feedback port 241 and feedback port 242 are by the 6th level conversion unit 52, to feedback level
Signal carries out level conversion and is input to the 2nd GPIO module 14 then by the feedback level signal after level conversion.Third
The third output end e3 and the 4th output end e4 of level conversion unit 42 believe the output of the tested driving plate Jing Guo level conversion
Number it being transferred to the 5th level conversion unit 51, the 5th level conversion unit 51 carries out level conversion to the signal received again,
And the signal after level conversion is transmitted to the 2nd GPIO module 14.
Certainly, the two-way test pulse that the EPWM module 11 generates is inputted by input port 211 and input port 212
Into tested driving plate 2.
In embodiment, by the 5th level conversion unit 51 of setting and the 6th level conversion unit 52, feedback level is believed
Number, the output signal of the third output end e3 of third level conversion unit 42 and the 4th output end e4 carry out level conversion, make to lead
Control module preferably monitors output of the tested driving plate 2 under fault simulation signal and whether feedback signal is correct, perfect
The test function of the test device of driving plate, and then ensure when subsequent use driving plate driving IGBT breaks down, IGBT's
Safety.Preferably, on the basis of the above embodiments, the test device of the driving plate can also include：
First display unit is connect with the dsp chip, for exporting the dead time of the tested driving plate；
The main control module is connect with first display unit, is also used to the dead time in the tested driving plate
When in preset time range, controls first display unit and export the tested normal test result of driving plate.
In practical application, the output of test result can be realized by numerous embodiments, for example, the tested driving plate
Normal test result can be lighted or be made a sound signal by LED light or the output of other indication signals, concrete example come
It says, the first display unit can be a LED light, when the dead time of the tested driving plate is in preset time range,
Main control module control LED light lights, and to indicate that tested driving plate test result is normal, the present embodiment is it is not limited here.
By the way that the first display unit is arranged, the test result of the test device of driving plate can be made to be shown in the first display list
It in member, is easier to observe, be easy to use.
More preferred, on the basis of the above embodiments, the test device of the driving plate can also include：Second is aobvious
Show that unit, second display unit are connected with the dsp chip, is used to indicate the output and feedback of the tested driving plate
It is whether correct.
In practical application, the output of test result can be realized by numerous embodiments, for example, the tested driving plate
Output and feedback whether can correctly be lighted or be extinguished or other indication signals are exported by LED light, for concrete example,
Second display unit can be a LED light, and when the output of tested driving plate and normal feedback, LED light is lighted；When tested driving
When the output and abnormal feedback of plate, LED light is extinguished, and the present embodiment is it is not limited here.
By the way that the second display unit is arranged, can intuitively judge whether the output of tested driving plate and feedback are correct, just
In use.
It should be noted that above two embodiment both can individually be implemented, can also exist in conjunction with implementation, the present embodiment
This is not limited.
Finally it should be noted that：The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that：It still may be used
To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features；
And these are modified or replaceed, technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution spirit and
Range.
Claims (7)
1. a kind of test device of driving plate, which is characterized in that including：Digital signal processor DSP chip and short trouble mould
Quasi- circuit,
The dsp chip includes enhancing pulsewidth modulation EPWM module, enhancing capture ECAP module, the first GPIO module, second
GPIO module and main control module；
The EPWM module is connected with tested driving plate, for generating and exporting test pulse to the tested driving plate, with
The tested driving plate is set to export corresponding pulse signal according to the test pulse；
The ECAP module is connected with the tested driving plate, for being believed according to the pulse of the tested driving plate output
Number, the dead time of the tested driving plate is obtained, to test the tested driving plate；
The first GPIO module is connected to the main control module, under the control of the main control module, to the short circuit
Fault simulation circuit output controls signal；
The input terminal of the short-circuit fault simulation circuit is connected with the first GPIO module, output end and the tested driving
Plate is connected, the control signal for being exported according to the first GPIO module, provides fault simulation to the tested driving plate
Signal；
The 2nd GPIO module is connect with the output port of the tested driving plate and feedback output port respectively, for receiving
The pulse signal of the output port output of the feedback signal and the tested driving plate of the feedback output port output；
The main control module is connect with the 2nd GPIO module and the ECAP module respectively, for defeated according to the feedback
The pulse signal of the output port output of the feedback signal and the tested driving plate of exit port output, monitors the tested driving
Whether output of the plate under fault simulation signal and feedback signal are correct, if correctly, indicating the ECAP module to the quilt
Driving plate is surveyed to be tested.
2. the test device of driving plate according to claim 1, which is characterized in that described device further includes：
First level conversion unit, the input terminal of first level conversion unit are connected with the EPWM module, output end
It is connected with the input pin of the tested driving plate；First level conversion unit is used for the pulse for exporting EPWM module
Signal carries out level conversion, and exports to the tested driving plate.
3. the test device of driving plate according to claim 1, which is characterized in that described device further includes：
Second electrical level converting unit, XOR gate, NOT gate and third level conversion unit；
The input terminal of the third level conversion unit is connected with the tested driving plate, the third level conversion unit
Output end is connected with the first input end of the input terminal of the NOT gate and the XOR gate respectively, the output end of the NOT gate with
Second input terminal of the XOR gate is connected；The input terminal of the output end of the XOR gate and the second electrical level converting unit
It is connected；The output end of the second electrical level converting unit is connected with the ECAP module.
4. the test device of driving plate according to claim 2, which is characterized in that the short-circuit fault simulation circuit packet
It includes：
Relay group and the 4th level conversion unit；
The first GPIO module is connected with the input terminal of the 4th level conversion unit, and the relay group includes first
Relay and the second relay；The output end of 4th level conversion unit respectively with first relay and the second relay
The input terminal of device is connected；
The first output end and third output end of the tested driving plate respectively with the first contact of first relay and
Two contacts are connected；The second output terminal of the tested driving plate and the 4th output end respectively with second relay first
Contact is connected with the second contact.
5. the test device of driving plate according to claim 3, which is characterized in that described device further includes：
5th level conversion unit and the 6th level conversion unit；The input terminal of 5th level conversion unit and the third
The third output end and the 4th output end of level conversion unit are connected, the output end of the 5th level conversion unit with it is described
2nd GPIO module is connected；
The input terminal of 6th level conversion unit is connected with the feedback output port of the tested driving plate, described
The output end of 6th level conversion unit is connected with the 2nd GPIO module.
6. the test device of driving plate according to any one of claims 1-5, which is characterized in that described device is also wrapped
It includes：
First display unit is connected with the dsp chip, for exporting the dead time of the tested driving plate；
The main control module is connect with first display unit, is also used to the dead time in the tested driving plate pre-
If time range in when, control first display unit and export the tested normal test result of driving plate.
7. the test device of driving plate according to any one of claims 1-5, which is characterized in that described device is also wrapped
It includes：
Second display unit, second display unit are connected with the dsp chip, are used to indicate the tested driving plate
Whether output and feedback are correct.
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