CN106324483B - A kind of reset circuit detection system and detection method - Google Patents
A kind of reset circuit detection system and detection method Download PDFInfo
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- CN106324483B CN106324483B CN201610761161.1A CN201610761161A CN106324483B CN 106324483 B CN106324483 B CN 106324483B CN 201610761161 A CN201610761161 A CN 201610761161A CN 106324483 B CN106324483 B CN 106324483B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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Abstract
The present invention provides a kind of reset circuit detection system, comprising: receiving unit, for receiving test instruction；At least one reset signal input unit, for inputting reset signal；Storage unit, for storing at least one detection setting value and storing test value after reset circuit reset；Comparing unit, for after reset circuit reset, the test value in storage unit to be compared at least one detection setting value；When the test value in the storage unit is matched with detection setting value, output resets pass signal.Present invention simultaneously provides a kind of reset circuit detection methods.The present invention is for different chip and subsystem, reset signal can be easily adjusted by computer, detect setting value and preset value, to guarantee that reset circuit detection method can be applied to different detection environment, it is not only restricted to the hardware limitation of highly integrated reset circuit, intelligence degree is high, and testing result is accurate.
Description
Technical field
The present invention relates to technical field of electronic communication more particularly to a kind of reset circuit detection systems and detection method.
Background technique
The effect of reset circuit in hardware chip refers under conditions of power supply is connected, by the memory in chip, deposit
Device or overall work state are restored to a kind of determination, controllable mode, to carry out the operation of next step.Mostly
In hardware chip, reset circuit is all essential a part.It is each of these for the electronic system complicated for one
A chip or each subsystem, should also be both provided with reset circuit, it is ensured that can answer by the way that one or more is additional
Position signal, so that whole system, either wherein some subsystem or chip can be with normal initializations.
Since in the prior art, the mode of manual testing is also continued to use in the detection of the reset circuit of hardware chip, usually exist
Chip exterior increases additional circuit, output signal and whether detect reset circuit normal.This mode has the following problems: a side
Face must increase a detection station and an at least testing staff, the omission factor of another aspect artificial detection on assembly line
Height, it is difficult to ensure that detection accuracy.In fact, reset circuit be integrated into chip be a comparative maturity technology, for
The considerations of saving cost, many producers all have ignored the test of the factory to reset circuit in the prior art.But reset circuit
Reliability determines restoring one's working ability in extreme external environment in the case that product is in unstable, if without factory
Detection is difficult to discover in time when Measuring error, is easy to cause electronic system overall failure, seriously affects once going wrong
User experience.
Therefore, in conclusion reset circuit in hardware chip can effectively, quickly be detected by lacking one kind in the prior art
System and a kind of detection method.
Summary of the invention
The present invention provides a kind of intelligence system, can effectively, in fast automatic detecting hardware chip or electronic system integrate
Reset circuit detection system.
A kind of reset circuit detection system, comprising:
Receiving unit, for receiving test instruction；
At least one reset signal input unit, for inputting reset signal；
Storage unit, for storing at least one detection setting value and storing test value after reset circuit reset；
Comparing unit, for after reset circuit reset, the test value in storage unit to be set at least one detection
Value is compared；
When the test value in the storage unit is matched with detection setting value, output resets pass signal.
It further, further include setup unit, the setup unit is used for after receiving test instruction, will be in storage unit
Default settings be detection setting value.
In order to accurately screen chip reset fault, after reset circuit reset, if the test value in storage unit
It is mismatched with detection setting value, then by test value compared with preset value, when the test value and preset value mismatch, output is multiple
Position failure signal.
For accurate recording testing result, statistical report form is exported automatically, further includes at least one recording unit, the record
Unit resets pass signal and/or reset failure signal for recording.
Using reset circuit detection system disclosed in this invention, by receiving test instruction automatically, Software Create is answered
Position signal, and carried out the default operating condition of the actual working state of reset circuit pair by storage unit and comparing unit
Than, so that the hardware reset circuit of chip or electronic equipment can be realized whole automatic tests and output test result automatically,
While improving product quality and stability, increase human cost is avoided, is a kind of high efficient test of intelligence degree
System.
The present invention discloses a kind of reset circuit detection methods, comprising the following steps:
Receive test instruction；
Setting detection setting value simultaneously stores；
Generate reset signal；
After reset circuit resets, test value is generated；
By test value compared with detecting setting value, when test value is matched with detection setting value, output resets pass signal.
Further, further include before reset circuit homing action, be detection setting value by the default settings of storage.
Further, after reset circuit resets, if test value and preset value mismatch, by test value and preset value ratio
Compared with when test value and preset value mismatch, output resets failure signal.
Further, record resets pass signal and resets failure signal.
Further, after output resets pass signal or resets failure signal, erasure detection setting value.
Further, reset signal is by Software Create.
Reset circuit detection method proposed by the invention, for different chip and subsystem, no for chip itself
Same reset circuit, the different function of reset circuit and different trigger conditions can easily be adjusted multiple by computer
Position signal, detects setting value and preset value, to guarantee that reset circuit detection method can be applied to different chips, not homology
System, and setting multiple subsystems within the same electronic device reset circuit detection, be not only restricted to highly integrated
The hardware limitation of reset circuit, intelligence degree is high, and testing result is accurate.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this hair
Bright some embodiments for those of ordinary skill in the art without any creative labor, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of structural schematic block diagram of embodiment of reset circuit detection system disclosed in this invention；
Fig. 2 is the structural schematic block diagram of reset circuit detection system another kind embodiment disclosed in this invention；
Fig. 3 is a kind of flow chart of embodiment of reset circuit detection method disclosed in this invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without creative efforts, shall fall within the protection scope of the present invention.
The purpose of the present invention is to propose to a kind of reset circuit detection systems, before chip or electronic equipment factory, to it
The highly integrated reset circuit of body or reseting module are tested, and guarantee reset circuit or reseting module reliable operation.Entirely
Reset circuit detection system mainly passes through software and multiple function such as automatic detection, result statistics, sorting are realized in digital circuit cooperation
Can, it is operated without additional circuit without hand fit, intelligence degree is obviously improved compared to the prior art.Such as Fig. 1
It show the structural schematic block diagram of the first embodiment of reset circuit detection system disclosed in this invention.The reset of the present embodiment
Checking system for PCB is at least made of following unit, i.e. receiving unit 1, reset signal input unit 3,2 and of storage unit
Comparing unit 4.The technical solution of above-mentioned core cell is described in detail one by one below.
Specifically, receiving unit 1 is for receiving test instruction.Here test instruction refers to the finger issued by computer
Order or signal, so that entire reset circuit detection system enters test mode.Therefore, corresponding, a certain interface can be used
The function of communication mode realization receiving unit 1.Usually, preferably pass through string between computer and test board or test chip
The mode of row communication carries out data transmitting, that is to say, that step-by-step receives computer to receiving unit 1 i.e. by way of serial communication
The test of output instructs.After receiving unit 1 receives test instruction, chip to be measured or in particular it is integrated in be measured
Reset circuit on chip enters test mode.
The triggering of reset circuit may have electrification reset, manual reset, under-voltage reset, watchdog reset etc. a variety of, but simultaneously
It triggers and resets under conditions of multiple trigger sources that the reset circuit for being not necessarily each chip can be above-mentioned.So corresponding
The reset circuit of chip to be measured is provided at least one and the matched reset signal input unit of reset circuit in the detection system
3.In the present embodiment, the form simulation simulated by one or more reset signal input unit 3 with software is a kind of or more
Kind trigger source, to form reset signal.By taking manual reset as an example, since manual reset usually occurs in chip since the external world is dry
Disturb or in the case that abnormal conditions cause confusion or crash, by manually touch reset switch realize chip is locked in it is multiple
In the state of position, it is made to carry out the operation of next step.Therefore, it is carried out in manual reset of the present embodiment to chip reset circuit to be measured
When detection, the jump signal of an analog reset switch motion can be inputted by reset signal input unit, it is also possible to can simulate
Reset switch forms certain delay, and the reset signal of simulation is input to the input terminal of reset circuit, and reset circuit receives
After reset signal, if successfully resetted, a controllable stable state would operate in.
Whether reset circuit resets successfully as a result, being provided with storage unit 2 in chip to be measured and comparing in order to obtain
Unit 4.The major function of storage unit 2 is to store the working condition of reset circuit, can be by one group of register, that is, one group
The function of flag register realization storage unit 2.Before reset circuit receives reset signal and carries out homing action, storage
At least one detection setting value is stored in unit 2, indicate to present after estimated reset circuit resets it is normal, controllable,
Stable working condition.And after reset circuit reset, what is stored in storage unit 2 is test value, indicates that reset circuit is multiple
Actual working state behind position.
And it is further, the effect of comparing unit 4 is exactly that will correspond to after the completion of the homing action of the reset circuit of setting
The test value and at least one detection setting value for indicating the actual working state after reset circuit resets are compared.Work as test value
When being matched with detection setting value, that is, illustrates the working condition after reset circuit resets and preset the steady operation after its reset before
State be it is identical, this illustrate reset circuit homing action success, output reset pass signal.
Using reset circuit detection system disclosed in above-described embodiment, by receiving test instruction automatically, software is simulated
The reset signal of generation, and pass through storage unit 2 and comparing unit 4 for the actual working state of reset circuit and preset stabilization
Working condition compares, so that the hardware reset circuit of chip or electronic equipment can be realized whole automatic tests and automatic
Output test result, while improving product quality and stability, avoid increase human cost, therefore is a kind of intelligence
The high efficient test macro of change degree.
Structural representation frame shown in Figure 2 for second of embodiment of reset circuit detection system disclosed in this invention
Figure.For a chip, usually reset circuit is highly integrated, if it is decided that reset circuit failure exists
Abnormal conditions may determine that entire chip goes wrong substantially, as a result will have a direct impact on the yield rate of chip.Therefore, judge
Whether problematic the reset circuit of chip needs are more prudent.In the present embodiment, in addition to four disclosed in first embodiment
It further include setting module 5 except a nucleus module and its specific function.In fact, being deposited before chip enters test mode
One group of preset value is stored in the flag register of storage unit.If preset value is for recording normal boot-strap or in normal operation
In the state of when, working condition that reset circuit is shown.And the effect of setting module 5 is then exactly receiving test instruction,
After chip enters test mode, the preset value in storage unit 2 is reset to detection setting value, that is to say, that storage is single
The flag states that reset circuit normal work is represented in member 2 change into the flag states after resetting successfully.
After reset circuit resets, if the test value and detection setting value in storage unit 2 mismatch, it is understood that there may be two kinds
Situation.The problem of one is reset circuits itself, alternatively possible is triggering failure.If caused by cannot exclude triggering failure
It mismatches, then may cause erroneous judgement, the fraction defective of chip is significantly increased.Reset circuit inspection disclosed in the present embodiment
It,, will test if the test value and detection setting value in storage unit 2 mismatch after reset circuit reset in examining system
Value is compared with preset value.If test value is matched with preset value, illustrate chip operation in normal condition, it is understood that there may be to reset letter
Number triggering failure rather than the failure of reset circuit reset function itself.If test value is also mismatched with preset value, can
It is reset circuit hardware itself there are problem to be further accurately obtained, detection system output resets failure signal.It resets and loses
Lose on the manipulator or other similar executive devices that signal can also be directly output on production line, after judging failure and
When realization automatic sorting, the chip sorting that problem will be present comes out.
For the timely automated statistics for realizing testing result, a note is also set up in the detection system disclosed in the present embodiment
Unit is recorded, recording unit will reset pass signal and reset failure signal to be recorded respectively, realizes the programming count of testing result.
Reset circuit detection system disclosed in second embodiment of the invention can be further improved the detection knot of detection system
Fruit accuracy rate, while realizing the programming count and automatic report generation of testing result.
As shown in figure 3, the invention also discloses a kind of reset circuit detection methods, as shown in the figure, comprising the following steps:
Computer issues test instruction to chip to be measured by way of serial communication, and reset circuit enters test mode,
One or more preset value modifications, which are set as representing, in a group mark register in chip to be measured resets successfully
Detection setting value simultaneously stores；
Software simulation generates reset signal identical with trigger source；
Chip to be measured receives reset signal, is reset to the stable original operating state of setting, will be in flag register
Test value and detection setting value are matched；
If test value and detection setting value matching, wipe the detection setting value in flag register；
Output resets pass signal；
If test value and detection setting value mismatch, by flag register test value and preset value carry out
Match；
If test value and preset value mismatch, the detection setting value in flag register is wiped；
Output resets failure signal；
Statistics resets pass signal and resets failure signal and reset circuit testing time respectively, automatically generates chip
The accurate report of fraction defective and testing result；
It can also will reset failure signal and be directly transferred to manipulator or other similar execution equipment on production line, it is real
Now to the automatic sorting of chip.
Disclosed in the present embodiment in reset circuit detection method, preferably preset value and detection setting value are arranged to 0x and added
The form of flag bit, in this way can be to avoid shape between the register self character value of statistical indicant formed and test value or detection setting value
At the correlativity of mistake.For example, if setting complete " 1 " or complete " 0 " for preset value and detection setting value, certain
In the case of, just cannot exclude hardware fault causes multiple flag bits of register it is possible that the feelings of complete " 0 " or complete " 1 "
Condition, at this moment if the fault flag accidentally occurred and detection setting value matched, the detection knot of possible output error
Fruit.A kind of preferred embodiment is that setting preset value is 0xFF, and setting detection setting value is 0x CC.
Reset circuit detection method disclosed in the present embodiment, for different chip and subsystem, for chip itself
Different reset circuits, the different function of reset circuit and different trigger conditions can easily be adjusted by computer
Reset signal detects setting value and preset value, thus guarantee that reset circuit detection method can be applied to different chips, it is different
System, and setting multiple subsystems within the same electronic device reset circuit detection, be not only restricted to highly integrated
Reset circuit hardware limitation, intelligence degree is high, and testing result is accurate.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used
To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features；
And these are modified or replaceed, technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution spirit and
Range.
Claims (6)
1. a kind of reset circuit detection system characterized by comprising
Receiving unit, for receiving test instruction；
At least one reset signal input unit, for inputting reset signal；
Storage unit, for storing preset value, at least one detection setting value and storing test value after reset circuit reset,
Described in detection setting value indicate normal, controllable, the stable working condition that can be presented after estimated reset circuit resets；
If the preset value is for recording normal boot-strap or when in the state of operating normally, work that reset circuit is shown
Make state；
Comparing unit, for reset circuit reset after, by storage unit test value and at least one detection setting value into
Row compares；
When the test value in the storage unit is matched with detection setting value, output resets pass signal；The comparing unit
Be also used to, after reset circuit reset, if test value in storage unit and detection setting value mismatch, by test value with
Preset value compares, and when the test value and preset value mismatch, output resets failure signal.
2. reset circuit detection system according to claim 1, which is characterized in that it further include at least one recording unit,
The recording unit resets pass signal and/or reset failure signal for recording.
3. a kind of reset circuit detection method, which comprises the following steps:
Receive test instruction；
Setting detection setting value simultaneously stores, wherein the detection setting value indicates to present just after estimated reset circuit resets
Normal, controllable, stable working condition；
Generate reset signal；
After reset circuit resets, test value is generated；
By test value compared with detecting setting value, when test value is matched with detection setting value, output resets pass signal；
After reset circuit reset, if test value and detection setting value mismatch, by test value compared with preset value, work as survey
When examination value and preset value mismatch, output resets failure signal;If wherein the preset value for record normal boot-strap or
When in the state of normal operation, working condition that reset circuit is shown.
4. reset circuit detection method according to claim 3, which is characterized in that further comprising the steps of, record resets
Pass signal and reset failure signal.
5. reset circuit detection method according to claim 4, which is characterized in that reset pass signal or reset in output
After failure signal, erasure detection setting value.
6. reset circuit detection method according to claim 5, which is characterized in that reset signal is by Software Create.
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| CN110749812A (en) * | 2018-07-24 | 2020-02-04 | 上海斐讯数据通信技术有限公司 | Automatic testing method, system and device for hardware circuit |
| CN109540268B (en) * | 2018-12-18 | 2020-06-30 | 成都前锋电子仪器有限责任公司 | Detection method of intelligent gas meter mainboard capable of being automatically initialized |
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| US9362904B2 (en) * | 2014-02-28 | 2016-06-07 | Freescale Semiconductor, Inc. | Devices and method for testing power-on reset voltage |
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| CN1443310A (en) * | 2000-12-22 | 2003-09-17 | Arm有限公司 | Asynchronous reset circuit testing |
| CN1866160A (en) * | 2005-05-19 | 2006-11-22 | 美国博通公司 | Digital power-on reset circuit and power-on reset method |
| CN1900731A (en) * | 2006-07-27 | 2007-01-24 | 华为技术有限公司 | Logic module detecting system and method |
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