CN106300585A - Power frequency inversion and charged integrated - Google Patents
Power frequency inversion and charged integrated Download PDFInfo
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- CN106300585A CN106300585A CN201610792359.6A CN201610792359A CN106300585A CN 106300585 A CN106300585 A CN 106300585A CN 201610792359 A CN201610792359 A CN 201610792359A CN 106300585 A CN106300585 A CN 106300585A
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- 238000005070 sampling Methods 0.000 claims description 11
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- 238000010586 diagram Methods 0.000 description 18
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Classifications
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- H02J7/022—
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0068—Battery or charger load switching, e.g. concurrent charging and load supply
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
- H02J7/04—Regulation of charging current or voltage
- H02J7/06—Regulation of charging current or voltage using discharge tubes or semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
- H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
- H02M7/72—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/79—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/797—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H02J2007/10—
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- Power Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses a kind of power frequency inversion and charged integrated, including inversion/full wave rectifying unit, power frequency step-up/down unit, LC filter unit, micro-processing and control element (PCE), data acquisition unit, protected location, power tube driver element, mode of operation indicating member, fan control unit, LCD display unit and peripheral auxiliary power unit, during inverter mode, micro-processing and control element (PCE) output pwm control signal, full-bridge copped wave is carried out by power tube drive unit drives inversion/full wave rectifying unit, high-frequency impulse is delivered to power frequency step-up/down unit and is boosted by inversion/full wave rectifying unit, by LC filtering unit filters output AC electricity；During charge mode, micro-processing and control element (PCE) output pwm control signal, carry out all wave rectification by power tube drive unit drives inversion/full wave rectifying unit, inversion/full wave rectifying unit output unidirectional current is accumulator charging.The circuit structure of the present invention is simple, reliability is higher, cost is relatively low.
Description
Technical field
The present invention relates to inversion charging field, particularly to a kind of power frequency inversion and charged integrated.
Background technology
In the integrated machine system of inverter and charger, inverter and charger are used in conjunction with each other, inverter
The electric energy of accumulator is changed into alternating current, for load supplying；When the electricity ratio of accumulator is relatively low, charger enters to accumulator
Row charging.Current existing inverter and the integrated machine system of charger, be that inverter and charger are integrated in a shell
Internal, by two different circuit realiration inversions and charge function, its circuit structure is complicated, and reliability is low, and cost is high.
Summary of the invention
The technical problem to be solved in the present invention is, complicated for the foregoing circuit structure of prior art, reliability is low, become
This high defect, it is provided that a kind of circuit structure is simple, reliability is higher, the power frequency inversion of lower-cost various auto heterodyne effects and
Charged integrated.
The technical solution adopted for the present invention to solve the technical problems is: a kind of power frequency inversion of structure and charged integrated,
Including inversion/full wave rectifying unit, power frequency step-up/down unit, LC filter unit, micro-processing and control element (PCE), data acquisition list
Unit, protected location, power tube driver element, mode of operation indicating member, fan control unit, LCD display unit and periphery are auxiliary
Helping power supply unit, the unidirectional current of input/output and the alternating current of input/output are acquired by described data acquisition unit,
Obtain described power frequency inversion and the duty of charged integrated, and the operating state data of collection is sent to described micro-process
Control unit processes, when for inverter mode, and described micro-processing and control element (PCE) output pwm control signal, and by described
Inversion/full wave rectifying unit described in power tube drive unit drives carries out full-bridge copped wave, and described inversion/full wave rectifying unit is by institute
State the high-frequency impulse that full-bridge copped wave obtains to be sent to described power frequency step-up/down unit and boost, and filtered by described LC
Output AC electricity after unit filtering；When for charge mode, described micro-processing and control element (PCE) output pwm control signal, and pass through
Inversion/full wave rectifying unit described in described power tube drive unit drives carries out all wave rectification, described inversion/full wave rectifying unit
Output unidirectional current be that accumulator is charged, described protected location respectively with described data acquisition unit and power tube driver element
Connect, be used for when input voltage or output electric current carry out overvoltage or overcurrent protection when exceeding setting value, and described mode of operation refers to
Show unit be connected with described micro-processing and control element (PCE), for indicating current operating state, described fan control unit is micro-with described
Processing and control element (PCE) connects, is used for controlling the operation of fan and detecting the ruuning situation of described fan in real time, and described LCD shows single
First and described micro-processing and control element (PCE) is connected, for showing described power frequency inversion and the service data of charged integrated, described outside
Enclose auxiliary power unit respectively with described micro-processing and control element (PCE), data acquisition unit, protected location, power tube driver element,
Mode of operation indicating member, fan control unit and LCD display unit connect, are used for being powered.
In power frequency inversion of the present invention and charged integrated, described data acquisition unit includes the inversion being connected
Output voltage and frequency sampling circuit, output current sampling circuit and radiator temperature sample circuit.
In power frequency inversion of the present invention and charged integrated, described inversion/full wave rectifying unit includes that power frequency becomes
Depressor, the first metal-oxide-semiconductor, the 4th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, the 9th metal-oxide-semiconductor, the 12nd metal-oxide-semiconductor, the 13rd MOS
Pipe, the 16th metal-oxide-semiconductor, the 17th metal-oxide-semiconductor, the 20th metal-oxide-semiconductor, the 22nd metal-oxide-semiconductor, the 23rd metal-oxide-semiconductor, the second resistance,
3rd resistance, the 6th resistance, the 8th resistance, the tenth resistance, the 12nd resistance, the 13rd resistance, the 17th resistance, the 20th electricity
Resistance, the 21st resistance, the 26th resistance, the 28th resistance, the 29th resistance, the 32nd resistance, the 35th
Resistance, the 37th resistance, the 40th resistance, the 43rd resistance, the 44th resistance, the 47th resistance, the 48th
Resistance, the 49th resistance, the 50th resistance, the second electric capacity, the 3rd electric capacity, the 12nd electric capacity and the 13rd electric capacity, described work
One end of the secondary coil of frequency power transformer respectively with one end of described 12nd electric capacity, one end of the 13rd electric capacity, the second electric capacity
One end, the drain electrode of the first metal-oxide-semiconductor, the drain electrode of the 5th metal-oxide-semiconductor, the drain electrode of the 9th metal-oxide-semiconductor, the drain electrode of the 13rd metal-oxide-semiconductor, the tenth
The drain electrode of seven metal-oxide-semiconductors and the drain electrode of the 22nd metal-oxide-semiconductor connect, the other end of described 12nd electric capacity and the 13rd electric capacity another
The equal ground connection in one end, the other end of described second electric capacity passes through described second resistance eutral grounding, the source electrode of described first metal-oxide-semiconductor, the 5th
The source electrode of metal-oxide-semiconductor, the source electrode of the 9th metal-oxide-semiconductor, the source electrode of the 13rd metal-oxide-semiconductor, the source electrode of the 17th metal-oxide-semiconductor and the 22nd MOS
The source electrode of pipe is all connected with, and the grid of described first metal-oxide-semiconductor connects with one end of described 6th resistance and one end of the 8th resistance respectively
Connecing, the grid of described 5th metal-oxide-semiconductor is connected with described one end of 13rd resistance and one end of the 16th resistance respectively, and described
The grid of nine metal-oxide-semiconductors is connected with described one end of 21st resistance and one end of the 23rd resistance respectively, and the described 13rd
The grid of metal-oxide-semiconductor is connected with described one end of 29th resistance and one end of the 32nd resistance respectively, described 17th MOS
The grid of pipe is connected with described one end of 37th resistance and one end of the 40th resistance respectively, described 22nd metal-oxide-semiconductor
Grid be connected with described one end of 47th resistance and one end of the 48th resistance respectively, another of described 6th resistance
End respectively with the other end of described 13rd resistance, the other end of the 21st resistance, the other end of the 26th resistance, the 3rd
The other end of 17 resistance and the other end of the 48th resistance connect, and the other end of described 8th resistance is respectively with the described tenth
The other end of six resistance, the other end of the 23rd resistance, the other end of the 32nd resistance, the other end of the 40th resistance and
The other end of the 47th resistance is all connected with, one end of described 3rd electric capacity respectively with the drain electrode of described 4th metal-oxide-semiconductor, the 8th
The drain electrode of metal-oxide-semiconductor, the drain electrode of the 12nd metal-oxide-semiconductor, the drain electrode of the 16th metal-oxide-semiconductor, the drain electrode and the 23rd of the 20th metal-oxide-semiconductor
The drain electrode of metal-oxide-semiconductor connects, and the other end of described 3rd electric capacity is connected with one end of described 3rd resistance, described 3rd resistance another
One end is connected with the other end of the secondary coil of described Industrial Frequency Transformer, the source electrode of described 4th metal-oxide-semiconductor, the source of the 8th metal-oxide-semiconductor
Pole, the source electrode of the 12nd metal-oxide-semiconductor, the source electrode of the 16th metal-oxide-semiconductor, the source electrode of the 20th metal-oxide-semiconductor and the source electrode of the 23rd metal-oxide-semiconductor
All other ends with described 3rd resistance are connected, the grid of described 4th metal-oxide-semiconductor respectively with one end and of described tenth resistance
One end of 12 resistance connects, the grid of described 8th metal-oxide-semiconductor respectively with one end and the 20th resistance of described 17th resistance
One end connect, the grid of described 12nd metal-oxide-semiconductor respectively with one end and the one of the 28th resistance of described 26 resistance
End connects, the grid of described 16th metal-oxide-semiconductor respectively with one end and one end of the 36th resistance of described 35th resistance
Connecting, the grid of described 20th metal-oxide-semiconductor connects with one end of described 43rd resistance and one end of the 44th resistance respectively
Connecing, the grid of described 23rd metal-oxide-semiconductor is connected with described one end of 49th resistance and one end of the 50th resistance respectively,
The other end of described tenth resistance respectively with the other end of described 17th resistance, the other end of the 26th resistance, the 30th
The other end of the other end of five resistance, the other end of the 43rd resistance and the 50th resistance connects, described tenth resistance another
One end, the other end of the 17th resistance, the other end of the 28th resistance, the other end of the 36th resistance, the 44th electricity
The other end of resistance and the other end of the 49th resistance all other ends with described 3rd resistance are connected.
In power frequency inversion of the present invention and charged integrated, described inversion/full wave rectifying unit also includes second
Metal-oxide-semiconductor, the 7th metal-oxide-semiconductor, the 11st metal-oxide-semiconductor, the 15th metal-oxide-semiconductor, the 19th metal-oxide-semiconductor, the 21st metal-oxide-semiconductor, the first resistance,
Five resistance, the 9th resistance, the 14th resistance, the 19th resistance, the 24th resistance, the 27th resistance, the 31st resistance,
34th resistance, the 39th resistance, the 42nd resistance, the 45th resistance, the 46th resistance, the first electric capacity and
Nine electric capacity, one end of described 9th electric capacity respectively with one end of described first electric capacity, the drain electrode of the second metal-oxide-semiconductor, the 7th metal-oxide-semiconductor
Drain electrode, the drain electrode of the 11st metal-oxide-semiconductor, the drain electrode of the 15th metal-oxide-semiconductor, the drain electrode of the 19th metal-oxide-semiconductor and the leakage of the 21st metal-oxide-semiconductor
Pole connects, and the other end of described first electric capacity is connected with one end of described first resistance, the other end of described first resistance and institute
The one end of the secondary coil stating Industrial Frequency Transformer connects, the other end of described 5th resistance another with described 40th resistance respectively
One end, the other end of the 24th resistance, the other end of the 31st resistance, the other end and the 46th of the 39th electric capacity
The other end of resistance connects, the other end of described 9th resistance, the other end of the 19th resistance, the 27th resistance another
The other end of end, the other end of the 34th resistance, the other end of the 42nd resistance and the 45th resistance is all with described
The other end of one resistance connects.
In power frequency inversion of the present invention and charged integrated, described inversion/full wave rectifying unit also includes the 3rd
Metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the tenth metal-oxide-semiconductor, the 14th metal-oxide-semiconductor, the 18th metal-oxide-semiconductor, the 24th metal-oxide-semiconductor, the 4th resistance, the 7th
Resistance, the 15th resistance, the 18th resistance, the 22nd resistance, the 25th resistance, the 30th resistance, the 33rd resistance,
38th resistance, the 41st resistance, the 51st resistance, the 52nd resistance, the 4th electric capacity, the 8th electric capacity, the tenth electricity
Hold and the 11st electric capacity, one end of described 8th electric capacity respectively with one end of described 11st electric capacity, one end of the 4th electric capacity, the
The drain electrode of three metal-oxide-semiconductors, the drain electrode of the 6th metal-oxide-semiconductor, the drain electrode of the tenth metal-oxide-semiconductor, the drain electrode of the 14th metal-oxide-semiconductor, the 18th metal-oxide-semiconductor
The drain electrode of drain electrode and the 24th metal-oxide-semiconductor connects, and the other end of described 4th electric capacity is connected with one end of described 4th resistance, institute
State the other end of the 8th electric capacity, the other end of the 11st electric capacity, the other end of the 4th resistance, the source electrode of the 3rd metal-oxide-semiconductor, the 6th
The source electrode of metal-oxide-semiconductor, the source electrode of the tenth metal-oxide-semiconductor, the source electrode of the 14th metal-oxide-semiconductor, the source electrode of the 18th metal-oxide-semiconductor and the 24th MOS
The source electrode of pipe is all connected with, and one end of described tenth electric capacity is connected with the other end of described 8th electric capacity, the grid of described 3rd metal-oxide-semiconductor
Pole is connected with described one end of 4th resistance and one end of the 7th resistance respectively, and the grid of described 6th metal-oxide-semiconductor is respectively with described
One end of 15th resistance and one end of the 18th resistance connect, and the grid of described tenth metal-oxide-semiconductor is respectively with the described 22nd
One end of one end of resistance and the 25th resistance connects, the grid of described 14th metal-oxide-semiconductor respectively with described 30th resistance
One end and the 33rd resistance one end connect, the grid of described 18th metal-oxide-semiconductor respectively with described 38th resistance
One end of one end and the 41st resistance connects, the grid of described 24th metal-oxide-semiconductor respectively with described 51st resistance
One end of one end and the 52nd resistance connects, the other end of described 4th resistance, the other end of the 15th resistance, the 22nd
The other end of the other end of resistance, the other end of the 30th resistance, the other end of the 38th resistance and the 52nd resistance is equal
Ground connection, the other end of described 11st resistance, the other end of the 15th resistance, the other end of the 25th resistance, the 33rd
The other end of the other end of resistance, the other end of the 41st resistance and the 51st resistance all with one end of described tenth electric capacity
Connect.
In power frequency inversion of the present invention and charged integrated, it is characterised in that described micro-processing and control element (PCE) bag
Include microprocessor, described power tube driver element include the second audion, the first photoelectrical coupler, the 164th resistance,
165th resistance and the 172nd resistance, the base stage of described second audion and described 172nd resistance
Connecting, the colelctor electrode of described second audion is by described 175th resistance and the 25th of described microprocessor
Pin connects, the colelctor electrode of described second audion the most respectively with one end and the first smooth thermocouple of described 164th resistance
Second pin of clutch connects, the emitter stage of described second audion respectively with the other end of described 164th resistance and
3rd pin of the first photoelectrical coupler connects, and the 6th pin of described first photoelectrical coupler is connected with its 7th pin.
In power frequency inversion of the present invention and charged integrated, described power tube driver element also includes the three or three pole
Pipe, the second photoelectrical coupler, the 173rd resistance, the 175th resistance and the 176th resistance, described
The base stage of three audions is connected with described 176th resistance, and the colelctor electrode of described 3rd audion passes through the described 100th
75 resistance are connected with the 27th pin of described microprocessor, and the colelctor electrode of described 3rd audion is the most respectively with described
One end of 173rd resistance and the second pin of the second photoelectrical coupler connect, and the emitter stage of described 3rd audion divides
It is not connected with the described other end of the 173rd resistance and the 3rd pin of the second photoelectrical coupler, described second smooth thermocouple
6th pin of clutch is connected with its 7th pin.
Implement power frequency inversion and the charged integrated of the present invention, have the advantages that owing to being provided with inversion/all-wave whole
Stream unit, power frequency step-up/down unit, LC filter unit, micro-processing and control element (PCE), data acquisition unit, protected location and merit
Rate pipe driver element, when for inverter mode, inversion/full wave rectifying unit is made as inversion unit, power frequency step-up/down unit
For power frequency boosting unit, when for charge mode, power frequency step-up/down unit is as power frequency pressure unit, inversion/all wave rectification
Unit, as full wave rectifying unit, can improve the reliability of power frequency inversion and charged integrated by protected location, owing to filling
Electricity and inversion share same circuit, reach forward inversion, the purpose of reverse charging, compared with traditional integrated machine system, so
Its circuit structure is simple, reliability is higher, cost is relatively low.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
In having technology to describe, the required accompanying drawing used is briefly described, it should be apparent that, the accompanying drawing in describing below is only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, also may be used
To obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the structural representation in power frequency inversion of the present invention and one embodiment of charged integrated；
Fig. 2 is the circuit theory diagrams of inversion/full wave rectifying unit in described embodiment；
Fig. 3 is the circuit theory diagrams of micro-processing and control element (PCE) in described embodiment；
Fig. 4 is the circuit theory diagrams of power tube driver element in described embodiment；
Fig. 5 is inverter output voltage and the circuit theory diagrams of frequency sampling circuit in described embodiment；
Fig. 6 is the circuit theory diagrams exporting current sampling circuit in described embodiment；
Fig. 7 is the circuit theory diagrams of radiator temperature sample circuit in described embodiment；
Fig. 8 is the circuit theory diagrams of fan control unit in described embodiment；
Fig. 9 is the circuit theory diagrams of protected location in described embodiment；
Figure 10 is the circuit theory diagrams of mode of operation indicating member in described embodiment；
Figure 11 is the circuit theory diagrams of peripheral auxiliary power unit in described embodiment.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Describe, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments wholely.Based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under not making creative work premise
Embodiment, broadly falls into the scope of protection of the invention.
In power frequency inversion of the present invention and charged integrated embodiment, its power frequency inversion and the structural representation of charged integrated
Figure is as shown in Figure 1.In Fig. 1, this power frequency inversion and charged integrated include inversion/full wave rectifying unit 1, power frequency step-up/down
Unit 2, LC filter unit 3, micro-processing and control element (PCE) 4, data acquisition unit 5, protected location 6, power tube driver element 7, work
Operation mode indicating member 8, fan control unit 9, LCD display unit 10 and peripheral auxiliary power unit 11, wherein, peripheral auxiliary
Power supply unit 11 respectively with micro-processing and control element (PCE) 4, data acquisition unit 5, protected location 6, power tube driver element 7, work
Pattern indicating member 8, fan control unit 9 and LCD display unit 10 connect, for being powered to each unit.
In the present embodiment, the unidirectional current of input is changed into the pulse that first-harmonic is 50/60HZ by inversion/full wave rectifying unit 1
Energy, this pulse energy boosted by power frequency step-up/down unit 2, and after being filtered by LC filter unit 3, turns
Become being available for the 50/60HZ alternating current that AC load uses.Data acquisition unit 5 to the unidirectional current of input/output and output/
The alternating current of input is acquired, and thus can obtain the operating state data of power frequency inversion and charged integrated, then will adopt
The operating state data of collection is sent to micro-processing and control element (PCE) 4 and processes.Specifically, after input side accesses unidirectional current,
Peripheral auxiliary power unit 11 is started working, and each unit for this power frequency inversion and charged integrated provides power supply, data acquisition
The operating state data of collection after amplifying Filtering Processing, is sent into micro-processing and control element (PCE) 4, micro-processing controls list by unit 5
Unit 4 carries out calculation process to it, if external environment condition all goes well, then sends pwm control signal, and pwm control signal passes through power
Pipe driver element 7 controls the metal-oxide-semiconductor (referring to Fig. 2) in inversion/full wave rectifying unit 1, carries out inversion according to present mode and cuts
Ripple or Charge Management.
It is noted that the operating state data of above-mentioned collection includes mode of operation, inverter output voltage, inversion output
Electric current, DC input voitage, radiator temperature, fan operating state and battery charging current.
When present mode is inverter mode, micro-processing and control element (PCE) 4 exports pwm control signal, and this pwm control signal passes through
Power tube driver element 7 drives inversion/full wave rectifying unit 1 to carry out full-bridge copped wave, and namely power tube driver element 7 drives inverse
Metal-oxide-semiconductor (referring to Fig. 2) in change/full wave rectifying unit 1 realizes full-bridge inverting, and unidirectional current is changed into high-frequency impulse, and inversion/
The high-frequency impulse that full-bridge copped wave obtains is sent to power frequency step-up/down unit 2 and boosts by full wave rectifying unit 1, and passes through
Output AC electricity after LC filter unit 3 filtering.
When for charge mode, micro-processing and control element (PCE) 4 exports pwm control signal, and this pwm control signal passes through power tube
Driver element 7 drives inversion/full wave rectifying unit 1 to carry out all wave rectification, namely 50/60HZ AC rectification is carried out all-wave
Rectification, obtains unidirectional current, and it is that accumulator is charged that inversion/full wave rectifying unit 1 exports unidirectional current, power frequency step-up/down list
Unit 2, for alternating current is carried out blood pressure lowering, provides energy input for inversion/full wave rectifying unit 1.
In the present embodiment, protected location 6 has input overvoltage protection and output overcurrent defencive function, and protected location 6 is respectively
It is connected with data acquisition unit 5 and power tube driver element 7, for vertical when input voltage or output electric current exceed setting value
I.e. close this power frequency inversion and charged integrated, prevent the circuit of this power frequency inversion and charged integrated from damaging, it is achieved overvoltage or
Overcurrent protection.
In the present embodiment, mode of operation indicating member 8 is provided with multiple LED light, and current by LED light instruction
Duty.Mode of operation indicating member 8 is connected with micro-processing and control element (PCE) 4, for indicating current operating state, micro-process control
Unit processed 4, according to current operating situation, sends control signal, controls mode of operation indicating member 8 and lights relevant LED light,
Instruction current operating state.
In the present embodiment, fan control unit 9 is connected with micro-processing and control element (PCE) 4, for controlling operation the reality of fan
Time detection fan ruuning situation, when fan occurs abnormal, abnormal conditions are sent into micro-processing and control element (PCE) 4.In this power frequency
In the normal course of operation of inversion and charged integrated, after temperature reaches certain value or output arrives certain value, micro-
Processing and control element (PCE) 4 sends control signal, controls fan control unit 9 and starts working, opens fan, for this power frequency inversion with fill
Electricity all-in-one heat radiation.In the present embodiment, micro-processing and control element (PCE) 4 is by data acquisition unit 5 and the transmission of fan control unit 9
Data process, and send corresponding control signal, this control signal controls inversion/complete by power tube driver element 7
Metal-oxide-semiconductor (referring to Fig. 2) in ripple rectification unit 1, it is achieved the transmission of energy.
In the present embodiment, LCD display unit 10 is connected with micro-processing and control element (PCE) 4, for showing power frequency inversion and charging
The service data of all-in-one.This service data includes inverter output voltage, output, input voltage and fault message etc..Micro-
Processing and control element (PCE) 4 is in real time and LCD display unit 10 carries out RS232 communication, by current operating state on LCD display unit 10
Display.
In the present embodiment, when micro-processing and control element (PCE) 4 detects that the operating state data that data acquisition unit 5 gathers exceeds
During range of normal value, and send control signal, close the output of pwm control signal, stop inversion or charging.
The power frequency inversion of the present invention and charged integrated integrate charging inversion, have the dual merit of inversion and charging
Can, reduce system cost.Its circuit structure is simple, and stability is preferable.So the frequency inversion of the present invention and charged integrated
Circuit structure is simple, reliability is higher, cost is relatively low.
In the present embodiment, data acquisition unit 5 includes inverter output voltage and frequency sampling circuit, output current sample electricity
Road and radiator temperature sample circuit (not shown), become output voltage and frequency sampling circuit, output current sampling circuit
And connect mutually between radiator temperature sample circuit.
Fig. 2 is the circuit theory diagrams of inversion/full wave rectifying unit in the present embodiment, in Fig. 2, inversion/full wave rectifying unit 1
Including Industrial Frequency Transformer TX1, the first metal-oxide-semiconductor Q1, the 4th metal-oxide-semiconductor Q4, the 5th metal-oxide-semiconductor Q5, the 8th metal-oxide-semiconductor Q8, the 9th metal-oxide-semiconductor
Q9, the 12nd metal-oxide-semiconductor Q12, the 13rd metal-oxide-semiconductor Q13, the 16th metal-oxide-semiconductor Q16, the 17th metal-oxide-semiconductor Q17, the 20th metal-oxide-semiconductor
Q20, the 22nd metal-oxide-semiconductor Q22, the 23rd metal-oxide-semiconductor Q23, the second resistance R2, the 3rd resistance R3, the 6th resistance R6, the 8th electricity
Resistance R8, the tenth resistance R10, the 12nd resistance R12, the 13rd resistance R13, the 17th resistance R17, the 20th resistance R20, second
11 resistance R21, the 26th resistance R26, the 28th resistance R28, the 29th resistance R29, the 32nd resistance R32,
35th resistance R35, the 37th resistance R37, the 40th resistance R40, the 43rd resistance R43, the 44th resistance
R44, the 47th resistance R47, the 48th resistance R48, the 49th resistance R49, the 50th resistance R50, the second electric capacity C2,
3rd electric capacity C3, the 12nd electric capacity C12 and the 13rd electric capacity C13.
Wherein, one end of the secondary coil of Industrial Frequency Transformer TX1 respectively with one end of the 12nd electric capacity C12, the 13rd electricity
Hold one end of C13, one end of the second electric capacity C2, the drain electrode of the first metal-oxide-semiconductor Q1, the drain electrode of the 5th metal-oxide-semiconductor Q5, the 9th metal-oxide-semiconductor Q9
Drain electrode, the drain electrode of the 13rd metal-oxide-semiconductor Q13, the drain electrode of the 17th metal-oxide-semiconductor Q17 and the 22nd metal-oxide-semiconductor Q22 drain electrode connect,
The other end of the 12nd electric capacity C12 and the equal ground connection of the other end of the 13rd electric capacity C13, the other end of the second electric capacity C2 passes through second
Resistance R2 ground connection, the source electrode of the first metal-oxide-semiconductor Q1, the source electrode of the 5th metal-oxide-semiconductor Q5, the source electrode of the 9th metal-oxide-semiconductor Q9, the 13rd metal-oxide-semiconductor
The source electrode of the source electrode of Q13, the source electrode of the 17th metal-oxide-semiconductor Q17 and the 22nd metal-oxide-semiconductor Q22 is all connected with.
In the present embodiment, the grid of the first metal-oxide-semiconductor Q1 respectively with one end and one end of the 8th resistance R8 of the 6th resistance R6
Connecting, the grid of the 5th metal-oxide-semiconductor Q5 is connected with one end of the 13rd resistance R13 and one end of the 16th resistance R16 respectively, and the 9th
The grid of metal-oxide-semiconductor Q9 is connected with one end of the 21st resistance R21 and one end of the 23rd resistance R23 respectively, the 13rd MOS
The grid of pipe Q13 is connected with one end of the 29th resistance R29 and one end of the 32nd resistance R32 respectively, the 17th metal-oxide-semiconductor
The grid of Q17 is connected with one end of the 37th resistance R37 and one end of the 40th resistance R40 respectively, the 22nd metal-oxide-semiconductor
The grid of Q22 is connected with one end of the 47th resistance R47 and one end of the 48th resistance R48 respectively.
In the present embodiment, the other end of the 6th resistance R6 respectively with the other end, the 21st resistance of the 13rd resistance R13
The other end of R21, the other end of the 26th resistance R26, the other end of the 37th resistance R37 and the 48th resistance R48
The other end connect, the other end of the 8th resistance R8 respectively with the other end of the 16th resistance R16, the 23rd resistance R23
The other end, the other end of the 32nd resistance R32, the other end of the 40th resistance R40 and the other end of the 47th resistance R47
Be all connected with, one end of the 3rd electric capacity C3 respectively with the drain electrode of the 4th metal-oxide-semiconductor Q4, the drain electrode of the 8th metal-oxide-semiconductor Q4, the 12nd metal-oxide-semiconductor
The drain electrode of the drain electrode of Q12, the drain electrode of the 16th metal-oxide-semiconductor Q16, the drain electrode of the 20th metal-oxide-semiconductor Q20 and the 23rd metal-oxide-semiconductor Q23 is even
Connecing, the other end of the 3rd electric capacity C3 and one end of the 3rd resistance R3 connect, the other end of the 3rd resistance R3 and Industrial Frequency Transformer TX1
Secondary coil the other end connect.
In the present embodiment, the source electrode of the 4th metal-oxide-semiconductor Q4, the source electrode of the 8th metal-oxide-semiconductor Q8, the source electrode of the 12nd metal-oxide-semiconductor Q12,
The source electrode of the source electrode of the 16th metal-oxide-semiconductor Q16, the source electrode of the 20th metal-oxide-semiconductor Q20 and the 23rd metal-oxide-semiconductor Q23 all with the 3rd resistance
The other end of R3 connects, the grid of the 4th metal-oxide-semiconductor Q4 respectively with one end and one end of the 12nd resistance R12 of the tenth resistance R10
Connecting, the grid of the 8th metal-oxide-semiconductor Q8 is connected with one end of the 17th resistance R17 and one end of the 20th resistance R20 respectively, and the tenth
The grid of two metal-oxide-semiconductor Q12 is connected with one end of 26 resistance R26 and one end of the 28th resistance R28 respectively, and the 16th
The grid of metal-oxide-semiconductor Q16 is connected with one end of the 35th resistance R35 and one end of the 36th resistance R36 respectively, and the 20th
The grid of metal-oxide-semiconductor Q20 is connected with one end of the 43rd resistance R43 and one end of the 44th resistance R44 respectively, and the 23rd
The grid of metal-oxide-semiconductor Q23 is connected with one end of the 49th resistance R49 and one end of the 50th resistance R50 respectively.
In the present embodiment, the other end of the tenth resistance R10 respectively with the other end of the 17th resistance R17, the 26th electricity
The resistance other end of R16, the other end of the 35th resistance R35, the other end of the 43rd resistance R43 and the 50th resistance R50
The other end connect, the other end of the tenth resistance R10, the other end of the 17th resistance R17, the 28th resistance R28 another
The other end of end, the other end of the 36th resistance R36, the other end of the 44th resistance R44 and the 49th resistance R49 is equal
It is connected with the other end of the 3rd resistance R3.This inversion/full wave rectifying unit 1 is due to Industrial Frequency Transformer TX1, so its shock resistance energy
Power is preferable.
In Fig. 2, this inversion/full wave rectifying unit 1 also includes the second metal-oxide-semiconductor Q2, the 7th metal-oxide-semiconductor Q7, the 11st metal-oxide-semiconductor
Q11, the 15th metal-oxide-semiconductor Q15, the 19th metal-oxide-semiconductor Q19, the 21st metal-oxide-semiconductor Q21, the first resistance R1, the 5th resistance R5, the 9th
Resistance R9, the 14th resistance R14, the 19th resistance R19, the 24th resistance R24, the 27th resistance R27, the 31st electricity
Resistance R31, the 34th resistance R34, the 39th resistance R39, the 42nd resistance R42, the 45th resistance R45, the 40th
Six resistance R46, the first electric capacity C1 and the 9th electric capacity C9.
In the present embodiment, one end of the 9th electric capacity C9 respectively with one end of the first electric capacity C1, the drain electrode of the second metal-oxide-semiconductor Q2,
The drain electrode of the 7th metal-oxide-semiconductor Q7, the drain electrode of the 11st metal-oxide-semiconductor Q11, the drain electrode of the 15th metal-oxide-semiconductor Q15, the 19th metal-oxide-semiconductor Q19
The drain electrode of drain electrode and the 21st metal-oxide-semiconductor Q21 connects, and the other end of the first electric capacity C1 and one end of the first resistance R1 connect, the
The other end of one resistance R1 is connected with one end of the secondary coil of Industrial Frequency Transformer TX1, the other end of the 5th resistance R5 respectively with
The other end of the 40th resistance R40, the other end of the 24th resistance R24, the other end of the 31st resistance R31, the 30th
The other end of nine electric capacity C39 and the other end of the 46th resistance R46 connect, the other end of the 9th resistance R9, the 19th resistance
The other end of R19, the other end of the 27th resistance R27, the other end of the 34th resistance R34, the 42nd resistance R42
The other end of the other end and the 45th resistance R45 all other ends with the first resistance R1 are connected.
This inversion/full wave rectifying unit 1 also include the 3rd metal-oxide-semiconductor Q3, the 6th metal-oxide-semiconductor Q6, the tenth metal-oxide-semiconductor Q10, the 14th
Metal-oxide-semiconductor Q14, the 18th metal-oxide-semiconductor Q18, the 24th metal-oxide-semiconductor Q24, the 4th resistance R4, the 7th resistance R7, the 15th resistance R15,
18th resistance R18, the 22nd resistance R22, the 25th resistance R25, the 30th resistance R30, the 33rd resistance R33,
38th resistance R38, the 41st resistance R41, the 51st resistance R51, the 52nd resistance R52, the 4th electric capacity C4,
Eight electric capacity C8, the tenth electric capacity C10 and the 11st electric capacity C11.Wherein, one end of the 8th electric capacity C8 respectively with the 11st electric capacity C11
One end, one end of the 4th electric capacity C4, the drain electrode of the 3rd metal-oxide-semiconductor Q3, the drain electrode of the 6th metal-oxide-semiconductor Q6, the leakage of the tenth metal-oxide-semiconductor Q10
The drain electrode of pole, the drain electrode of the 14th metal-oxide-semiconductor Q14, the drain electrode of the 18th metal-oxide-semiconductor Q18 and the 24th metal-oxide-semiconductor Q24 connects, and the 4th
One end of the other end of electric capacity C4 and the 4th resistance R4 connects, the other end of the 8th electric capacity C8, the 11st electric capacity C11 another
End, the other end of the 4th resistance R4, the source electrode of the 3rd metal-oxide-semiconductor Q3, the source electrode of the 6th metal-oxide-semiconductor Q6, the source electrode of the tenth metal-oxide-semiconductor Q10,
The source electrode of the source electrode of the 14th metal-oxide-semiconductor Q14, the source electrode of the 18th metal-oxide-semiconductor Q18 and the 24th metal-oxide-semiconductor Q24 is all connected with, and the tenth
One end of electric capacity C10 is connected with the other end of the 8th electric capacity C8.
In the present embodiment, the grid of the 3rd metal-oxide-semiconductor Q3 respectively with one end and one end of the 7th resistance R7 of the 4th resistance R4
Connecting, the grid of the 6th metal-oxide-semiconductor Q6 is connected with one end of the 15th resistance R15 and one end of the 18th resistance R18 respectively, and the tenth
The grid of metal-oxide-semiconductor Q10 is connected with one end of the 22nd resistance R22 and one end of the 25th resistance R25 respectively, and the 14th
The grid of metal-oxide-semiconductor Q14 is connected with one end of the 30th resistance R30 and one end of the 33rd resistance R33 respectively, the 18th MOS
The grid of pipe Q18 is connected with one end of the 38th resistance R38 and one end of the 41st resistance R41 respectively, the 24th MOS
The grid of pipe Q24 is connected with one end of the 51st resistance R51 and one end of the 52nd resistance R52 respectively, the 4th resistance R4
The other end, the other end of the 15th resistance R15, the other end of the 22nd resistance R22, the other end of the 30th resistance R30,
The other end of the 38th resistance R38 and the equal ground connection of the other end of the 52nd resistance R52, the other end of the 11st resistance R11,
The other end of the 15th resistance R15, the other end of the 25th resistance R25, the other end of the 33rd resistance R33, the 40th
The other end of one resistance R41 and the other end of the 51st resistance R51 all one end with the tenth electric capacity C10 are connected.
Fig. 3 is the circuit theory diagrams of micro-processing and control element (PCE) in the present embodiment, and Fig. 4 is that in the present embodiment, power tube drives single
The circuit theory diagrams of unit.In the present embodiment, micro-processing and control element (PCE) 4 includes that microprocessor U01, power tube driver element 7 include
Second audion T2, the first photoelectrical coupler U1, the 164th resistance R164, the 165th resistance R165 and first
172 resistance R172, wherein, the base stage of the second audion T2 is connected with the 172nd resistance R172, the second audion
The colelctor electrode of T2 is connected by the 25th pin of the 175th resistance R165 and microprocessor U01, the two or three pole
The colelctor electrode of pipe T2 connects with one end of the 164th resistance R164 and second pin of the first photoelectrical coupler U1 the most respectively
Connect, the emitter stage of the second audion U01 respectively with the other end and the first photoelectrical coupler U1 of the 164th resistance R164
The 3rd pin connect, the 6th pin of the first photoelectrical coupler U1 is connected with its 7th pin.
This power tube driver element 7 also includes the 3rd audion T3, the second photoelectrical coupler U2, the 173rd resistance
R173, the 175th resistance R175 and the 176th resistance R176, the base stage and the 107th of the 3rd audion T3
16 resistance R176 connect, and the colelctor electrode of the 3rd audion T3 is by the 175th resistance R175 and microprocessor U01's
27th pin connects, the colelctor electrode of the 3rd audion T3 the most respectively with one end and second of the 173rd resistance R173
Second pin of photoelectrical coupler U2 connects, the emitter stage of the 3rd audion T3 another with the 173rd resistance R173 respectively
3rd pin of one end and the second photoelectrical coupler U2 connects, and the 6th pin of the second photoelectrical coupler U2 is with its 7th pin even
Connect.
Fig. 5 is inverter output voltage and the circuit theory diagrams of frequency sampling circuit in the present embodiment；In Fig. 5, U13:A,
U13:B, U13:C and U13:D are all operational amplifiers.Fig. 6 is the circuit theory diagrams exporting current sampling circuit in the present embodiment；
In Fig. 6, U5:A and U5:B is all dual operational amplifier.Fig. 7 is the circuit theory of radiator temperature sample circuit in the present embodiment
Figure.Fig. 8 is the circuit theory diagrams of fan control unit in the present embodiment.
Fig. 9 is the circuit theory diagrams of protected location in the present embodiment；In Fig. 9, U09:A is voltage comparator.Figure 10 is this
The circuit theory diagrams of mode of operation indicating member in embodiment；Figure 11 is that in the present embodiment, the circuit of peripheral auxiliary power unit is former
Reason figure, Tu11Zhong, U07 are power supply chips, and TX06 is switching mode power supply transformer.
In a word, the present invention integrates charging inversion, has the dual-use function of inversion and charging, reduces system cost.
This power frequency inversion and the simple in construction of charged integrated, stability is preferable.Owing to this inversion/full wave rectifying unit 1 has power frequency to become
Depressor TX1, its impact resistance is preferable.For charge function, microprocessor U01 is provided with multiple different charge mode, uses
Family can select corresponding charge mode according to the type of oneself accumulator.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all essences in the present invention
Within god and principle, any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.
Claims (7)
1. a power frequency inversion and charged integrated, it is characterised in that include inversion/full wave rectifying unit, power frequency step-up/down
Unit, LC filter unit, micro-processing and control element (PCE), data acquisition unit, protected location, power tube driver element, mode of operation
Indicating member, fan control unit, LCD display unit and peripheral auxiliary power unit, described data acquisition unit is to input/defeated
The unidirectional current gone out and the alternating current of input/output are acquired, and obtain the work shape of described power frequency inversion and charged integrated
State, and the operating state data of collection is sent to described micro-processing and control element (PCE) processes, when for inverter mode, described
Micro-processing and control element (PCE) output pwm control signal, and by inversion/all wave rectification list described in described power tube drive unit drives
Unit carries out full-bridge copped wave, and the high-frequency impulse that described full-bridge copped wave obtains is sent to described work by described inversion/full wave rectifying unit
Frequently step-up/down unit boosts, and by output AC electricity after described LC filtering unit filters；When for charge mode,
Described micro-processing and control element (PCE) output pwm control signal, and whole by inversion/all-wave described in described power tube drive unit drives
Stream unit carries out all wave rectification, and described inversion/full wave rectifying unit output unidirectional current is that accumulator is charged, and described protection is single
Unit is connected with described data acquisition unit and power tube driver element, respectively for setting when input voltage or output electric current exceed
Carrying out overvoltage or overcurrent protection during definite value, described mode of operation indicating member is connected with described micro-processing and control element (PCE), is used for referring to
Show that current operating state, described fan control unit are connected with described micro-processing and control element (PCE), for controlling the operation of fan also
Detecting the ruuning situation of described fan in real time, described LCD display unit is connected with described micro-processing and control element (PCE), is used for showing institute
State the service data of power frequency inversion and charged integrated, described peripheral auxiliary power unit respectively with described micro-processing controls list
Unit, data acquisition unit, protected location, power tube driver element, mode of operation indicating member, fan control unit and LCD are aobvious
Show that unit connects, for being powered.
Power frequency inversion the most according to claim 1 and charged integrated, it is characterised in that described data acquisition unit includes
The inverter output voltage being connected and frequency sampling circuit, output current sampling circuit and radiator temperature sample circuit.
Power frequency inversion the most according to claim 1 and 2 and charged integrated, it is characterised in that described inversion/all wave rectification
Unit include Industrial Frequency Transformer, the first metal-oxide-semiconductor, the 4th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, the 9th metal-oxide-semiconductor, the 12nd
Metal-oxide-semiconductor, the 13rd metal-oxide-semiconductor, the 16th metal-oxide-semiconductor, the 17th metal-oxide-semiconductor, the 20th metal-oxide-semiconductor, the 22nd metal-oxide-semiconductor, the 23rd
Metal-oxide-semiconductor, the second resistance, the 3rd resistance, the 6th resistance, the 8th resistance, the tenth resistance, the 12nd resistance, the 13rd resistance, the tenth
Seven resistance, the 20th resistance, the 21st resistance, the 26th resistance, the 28th resistance, the 29th resistance, the 30th
Two resistance, the 35th resistance, the 37th resistance, the 40th resistance, the 43rd resistance, the 44th resistance, the 40th
Seven resistance, the 48th resistance, the 49th resistance, the 50th resistance, the second electric capacity, the 3rd electric capacity, the 12nd electric capacity and
13 electric capacity, one end of the secondary coil of described Industrial Frequency Transformer respectively with one end, the 13rd electric capacity of described 12nd electric capacity
One end, one end of the second electric capacity, the drain electrode of the first metal-oxide-semiconductor, the drain electrode of the 5th metal-oxide-semiconductor, the drain electrode of the 9th metal-oxide-semiconductor, the 13rd
The drain electrode of the drain electrode of metal-oxide-semiconductor, the drain electrode of the 17th metal-oxide-semiconductor and the 22nd metal-oxide-semiconductor connects, the other end of described 12nd electric capacity
With the equal ground connection of the other end of the 13rd electric capacity, the other end of described second electric capacity pass through described second resistance eutral grounding, described first
The source electrode of metal-oxide-semiconductor, the source electrode of the 5th metal-oxide-semiconductor, the source electrode of the 9th metal-oxide-semiconductor, the source electrode of the 13rd metal-oxide-semiconductor, the source of the 17th metal-oxide-semiconductor
The source electrode of pole and the 22nd metal-oxide-semiconductor is all connected with, the grid of described first metal-oxide-semiconductor respectively with one end and of described 6th resistance
One end of eight resistance connects, the grid of described 5th metal-oxide-semiconductor respectively with one end of described 13rd resistance and the 16th resistance
One end connects, the grid of described 9th metal-oxide-semiconductor respectively with one end and one end of the 23rd resistance of described 21st resistance
Connecting, the grid of described 13rd metal-oxide-semiconductor connects with one end of described 29th resistance and one end of the 32nd resistance respectively
Connecing, the grid of described 17th metal-oxide-semiconductor is connected with described one end of 37th resistance and one end of the 40th resistance respectively, institute
The grid stating the 22nd metal-oxide-semiconductor is connected with described one end of 47th resistance and one end of the 48th resistance respectively, institute
State the other end of the 6th resistance respectively with the other end of described 13rd resistance, the other end of the 21st resistance, the 26th
The other end of the other end of resistance, the other end of the 37th resistance and the 48th resistance connects, described 8th resistance another
One end respectively with the other end of described 16th resistance, the other end of the 23rd resistance, the other end of the 32nd resistance,
The other end of 40 resistance and the other end of the 47th resistance are all connected with, and one end of described 3rd electric capacity is respectively with the described 4th
The drain electrode of metal-oxide-semiconductor, the drain electrode of the 8th metal-oxide-semiconductor, the drain electrode of the 12nd metal-oxide-semiconductor, the drain electrode of the 16th metal-oxide-semiconductor, the 20th metal-oxide-semiconductor
The drain electrode of drain electrode and the 23rd metal-oxide-semiconductor connects, and the other end of described 3rd electric capacity is connected with one end of described 3rd resistance, institute
The other end of the other end and the secondary coil of described Industrial Frequency Transformer of stating the 3rd resistance is connected, the source electrode of described 4th metal-oxide-semiconductor,
The source electrode of the 8th metal-oxide-semiconductor, the source electrode of the 12nd metal-oxide-semiconductor, the source electrode of the 16th metal-oxide-semiconductor, the source electrode and the 20th of the 20th metal-oxide-semiconductor
The source electrode of three metal-oxide-semiconductors all other ends with described 3rd resistance are connected, the grid of described 4th metal-oxide-semiconductor respectively with described tenth electricity
One end of resistance and one end of the 12nd resistance connect, the grid of described 8th metal-oxide-semiconductor respectively with one end of described 17th resistance
Connect with one end of the 20th resistance, the grid of described 12nd metal-oxide-semiconductor respectively with one end and second of described 26 resistance
One end of 18 resistance connects, the grid of described 16th metal-oxide-semiconductor respectively with one end and the 30th of described 35th resistance
One end of six resistance connects, the grid of described 20th metal-oxide-semiconductor respectively with one end and the 44th of described 43rd resistance
One end of resistance connects, and the grid of described 23rd metal-oxide-semiconductor is electric with one end of described 49th resistance and the 50th respectively
One end of resistance connects, the other end of described tenth resistance respectively with the other end of described 17th resistance, the 26th resistance
The other end of the other end, the other end of the 35th resistance, the other end of the 43rd resistance and the 50th resistance connects, described
The other end of the tenth resistance, the other end of the 17th resistance, the other end of the 28th resistance, the 36th resistance another
End, the other end all other ends with described 3rd resistance of the other end of the 44th resistance and the 49th resistance are connected.
Power frequency inversion the most according to claim 3 and charged integrated, it is characterised in that described inversion/all wave rectification list
Unit also includes the second metal-oxide-semiconductor, the 7th metal-oxide-semiconductor, the 11st metal-oxide-semiconductor, the 15th metal-oxide-semiconductor, the 19th metal-oxide-semiconductor, the 21st MOS
Pipe, the first resistance, the 5th resistance, the 9th resistance, the 14th resistance, the 19th resistance, the 24th resistance, the 27th electricity
Resistance, the 31st resistance, the 34th resistance, the 39th resistance, the 42nd resistance, the 45th resistance, the 46th
Resistance, the first electric capacity and the 9th electric capacity, one end of described 9th electric capacity respectively with one end, second metal-oxide-semiconductor of described first electric capacity
Drain electrode, the drain electrode of the 7th metal-oxide-semiconductor, the drain electrode of the 11st metal-oxide-semiconductor, the drain electrode of the 15th metal-oxide-semiconductor, the drain electrode of the 19th metal-oxide-semiconductor
Connecting with the drain electrode of the 21st metal-oxide-semiconductor, the other end of described first electric capacity is connected with one end of described first resistance, and described the
The other end of one resistance is connected with one end of the secondary coil of described Industrial Frequency Transformer, the other end of described 5th resistance respectively with
The other end of described 40th resistance, the other end of the 24th resistance, the other end of the 31st resistance, the 39th electric capacity
The other end and the other end of the 46th resistance connect, the other end of described 9th resistance, the other end of the 19th resistance, the
The other end of 27 resistance, the other end of the 34th resistance, the other end of the 42nd resistance and the 45th resistance
The other end all other ends with described first resistance are connected.
Power frequency inversion the most according to claim 4 and charged integrated, it is characterised in that described inversion/all wave rectification list
Unit also include the 3rd metal-oxide-semiconductor, the 6th metal-oxide-semiconductor, the tenth metal-oxide-semiconductor, the 14th metal-oxide-semiconductor, the 18th metal-oxide-semiconductor, the 24th metal-oxide-semiconductor,
4th resistance, the 7th resistance, the 15th resistance, the 18th resistance, the 22nd resistance, the 25th resistance, the 30th resistance,
33rd resistance, the 38th resistance, the 41st resistance, the 51st resistance, the 52nd resistance, the 4th electric capacity,
Eight electric capacity, the tenth electric capacity and the 11st electric capacity, one end of described 8th electric capacity respectively with one end of described 11st electric capacity, the 4th
One end of electric capacity, the drain electrode of the 3rd metal-oxide-semiconductor, the drain electrode of the 6th metal-oxide-semiconductor, the drain electrode of the tenth metal-oxide-semiconductor, the drain electrode of the 14th metal-oxide-semiconductor,
The drain electrode of the 18th metal-oxide-semiconductor and the drain electrode of the 24th metal-oxide-semiconductor connect, the other end of described 4th electric capacity and described 4th resistance
One end connect, the other end of described 8th electric capacity, the other end of the 11st electric capacity, the other end of the 4th resistance, the 3rd metal-oxide-semiconductor
Source electrode, the source electrode of the 6th metal-oxide-semiconductor, the source electrode of the tenth metal-oxide-semiconductor, the source electrode of the 14th metal-oxide-semiconductor, the source electrode of the 18th metal-oxide-semiconductor and
The source electrode of the 24th metal-oxide-semiconductor is all connected with, and one end of described tenth electric capacity is connected with the other end of described 8th electric capacity, and described
The grid of three metal-oxide-semiconductors is connected with described one end of 4th resistance and one end of the 7th resistance respectively, the grid of described 6th metal-oxide-semiconductor
Be connected with described one end of 15th resistance and one end of the 18th resistance respectively, the grid of described tenth metal-oxide-semiconductor respectively with institute
One end of one end and the 25th resistance of stating the 22nd resistance connects, and the grid of described 14th metal-oxide-semiconductor is respectively with described
One end of 30th resistance and one end of the 33rd resistance connect, and the grid of described 18th metal-oxide-semiconductor is respectively with the described 3rd
One end of 18 resistance and one end of the 41st resistance connect, and the grid of described 24th metal-oxide-semiconductor is respectively with the described 5th
One end of one end of 11 resistance and the 52nd resistance connects, the other end of described 4th resistance, the 15th resistance another
End, the other end of the 22nd resistance, the other end of the 30th resistance, the other end of the 38th resistance and the 52nd resistance
The equal ground connection of the other end, the other end of described 11st resistance, the other end of the 15th resistance, the 25th resistance another
The other end of end, the other end of the 33rd resistance, the other end of the 41st resistance and the 51st resistance is all with described
One end of ten electric capacity connects.
6. according to the power frequency inversion described in claim 1 to 5 any one and charged integrated, it is characterised in that described micro-place
Reason control unit include microprocessor, described power tube driver element include the second audion, the first photoelectrical coupler, the 100th
64 resistance, the 165th resistance and the 172nd resistance, the base stage of described second audion and described first
172 resistance connect, and the colelctor electrode of described second audion is by described 175th resistance and described micro-process
25th pin of device connects, the colelctor electrode of described second audion the most respectively with one end of described 164th resistance
Connecting with the second pin of the first photoelectrical coupler, the emitter stage of described second audion is electric with the described 164th respectively
Resistance the other end and the first photoelectrical coupler the 3rd pin connect, the 6th pin of described first photoelectrical coupler with its 7th
Pin connects.
Power frequency inversion the most according to claim 6 and charged integrated, it is characterised in that described power tube driver element is also
Including the 3rd audion, the second photoelectrical coupler, the 173rd resistance, the 175th resistance and the 176th
Resistance, the base stage of described 3rd audion is connected with described 176th resistance, and the colelctor electrode of described 3rd audion leads to
Cross described 175th resistance to be connected with the 27th pin of described microprocessor, the colelctor electrode of described 3rd audion
It is connected with described one end of 173rd resistance and the second pin of the second photoelectrical coupler the most respectively, described three or three pole
The emitter stage of pipe is connected with the described other end of the 173rd resistance and the 3rd pin of the second photoelectrical coupler respectively, institute
The 6th pin stating the second photoelectrical coupler is connected with its 7th pin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610792359.6A CN106300585A (en) | 2016-08-31 | 2016-08-31 | Power frequency inversion and charged integrated |
Applications Claiming Priority (1)
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| CN107707006A (en) * | 2017-10-31 | 2018-02-16 | 苏州迈力电器有限公司 | Power frequency inversion charged integrated with auxiliary power supply |
| CN107733052A (en) * | 2017-10-31 | 2018-02-23 | 苏州迈力电器有限公司 | Power frequency inversion charging integrated device with microprocessor control |
| CN107742918A (en) * | 2017-10-31 | 2018-02-27 | 苏州迈力电器有限公司 | Power frequency inversion charging integrated device with power drive |
| CN107769340A (en) * | 2017-10-31 | 2018-03-06 | 苏州迈力电器有限公司 | Power frequency inversion charged integrated with data acquisition |
| CN107769348A (en) * | 2017-10-31 | 2018-03-06 | 苏州迈力电器有限公司 | Power frequency inversion charged integrated with filtering charging |
| CN110133516A (en) * | 2019-02-27 | 2019-08-16 | 延边中谷领创电力科技有限公司 | Battery charging and discharging device |
| CN116780732A (en) * | 2023-06-06 | 2023-09-19 | 东莞市腾威动力新能源有限公司 | Multifunctional charging system and method for energy storage battery |
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| CN116780732B (en) * | 2023-06-06 | 2024-04-19 | 东莞市腾威动力新能源有限公司 | Multifunctional charging system and method for energy storage battery |
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Application publication date: 20170104 |