CN210246336U

CN210246336U - Power frequency inversion charging integrated machine

Info

Publication number: CN210246336U
Application number: CN201920499803.4U
Authority: CN
Inventors: Jun Qiu; 仇军; Haidong Zhu; 朱海东
Original assignee: Suzhou Maili Electrical Appliance Co ltd
Current assignee: Suzhou Maili Electrical Appliance Co ltd
Priority date: 2019-04-13
Filing date: 2019-04-13
Publication date: 2020-04-03
Anticipated expiration: 2029-04-13

Abstract

The utility model discloses a power frequency contravariant all-in-one that charges, including DC-AC contravariant unit full wave rectification unit, AC-AC power frequency step up unit power frequency step down unit, LC filter unit, peripheral auxiliary power supply unit, the data sampling unit, power tube drive unit, fan control unit, circuit protection unit, MCU microprocessor unit, the LCD display element, mode indication unit and wireless communication unit, DC-AC contravariant unit full wave rectification unit steps up unit power frequency step down unit with AC-AC power frequency respectively, LC filter unit, peripheral auxiliary power supply unit, power tube drive unit and MCU microprocessor unit connection, the data sampling unit, fan control unit and wireless communication unit all with MCU microprocessor unit connection. The utility model discloses realize more succinct walking the line mode, external equipment passes through the work of wireless communication control contravariant all-in-one that charges to detect contravariant all-in-one operating condition that charges.

Description

Power frequency inversion charging integrated machine

Technical Field

The utility model relates to a wireless communication and contravariant field of charging, in particular to power frequency contravariant all-in-one that charges.

Background

The power frequency inverter is a DC/AC converter, which adopts high frequency pulse width modulation technology and microcomputer control technology to convert the DC power supply of the battery pack into AC power supply with stable output voltage and frequency. Industrial frequency inverters have many applications, such as those used in the aviation industry to provide a frequency conversion to 400Hz, and generally have an input voltage that is varied according to the needs of the application. In traditional power frequency contravariant all-in-one system, power frequency contravariant all-in-one passes through RS232 or RS485 and external equipment and communicates, must pass through the wire between power frequency contravariant all-in-one and the external equipment and be connected, can lead to the system to walk the line more loaded down with trivial details like this, and breaks down easily.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model lies in, to the above-mentioned defect of prior art, provide one kind and realize more succinct walking the line mode, external equipment passes through the work of wireless communication control contravariant all-in-one that charges to detect the power frequency contravariant all-in-one that charges of contravariant all-in-one operating condition.

The utility model provides a technical scheme that its technical problem adopted is: a power frequency inversion charging integrated machine is constructed, and comprises a DC-AC inversion unit/full wave rectification unit, an AC-AC power frequency boosting unit/power frequency voltage reduction unit, an LC filtering unit, a peripheral auxiliary power supply unit, a data sampling unit, a power tube driving unit, a fan control unit, a circuit protection unit, an MCU microprocessor unit, an LCD display unit, a working mode indicating unit and a wireless communication unit, wherein the DC-AC inversion unit/full wave rectification unit is respectively connected with the AC-AC power frequency boosting unit/power frequency voltage reduction unit, the LC filtering unit, the peripheral auxiliary power supply unit, the power tube driving unit and the MCU microprocessor unit, the data sampling unit, the fan control unit, the circuit protection unit, the LCD display unit, the working mode indicating unit and the wireless communication unit are all connected with the MCU.

In the power frequency inversion and charging integrated machine of the present invention, the DC-AC inversion unit/full wave rectification unit includes a transmitting coil, a ninth capacitor, a first resistor, a fifth resistor, a ninth resistor, a second MOS transistor, a fourteenth resistor, a nineteenth resistor, a seventh MOS transistor, a twenty-fourth resistor, a twenty-seventh resistor, an eleventh MOS transistor, a thirty-fourth resistor, a fifteenth MOS transistor, a thirty-ninth resistor, a forty-second resistor, a nineteenth MOS transistor, a forty-sixth resistor, a forty-fifth resistor, and a twenty-first MOS transistor, wherein one end of the ninth capacitor is connected to the MCU microprocessor unit, one end of the first capacitor, a drain electrode of the second MOS transistor, a drain electrode of the seventh MOS transistor, a drain electrode of the eleventh MOS transistor, a drain electrode of the fifteenth MOS transistor, a drain electrode of the nineteenth MOS transistor, and a drain electrode of the twenty-first MOS transistor, the other end of the ninth capacitor is grounded, the other end of the first capacitor is connected with one end of the first resistor, the gate of the second MOS transistor is connected with one end of the fifth resistor and one end of the ninth resistor respectively, the gate of the seventh MOS transistor is connected with one end of the fourteenth resistor and one end of the nineteenth resistor respectively, the gate of the eleventh MOS transistor is connected with one end of the twenty-fourth resistor and one end of the twenty-seventh resistor respectively, the gate of the fifteenth MOS transistor is connected with one end of the thirty-eleventh resistor and one end of the thirty-fourth resistor respectively, the gate of the nineteenth MOS transistor is connected with one end of the thirty-ninth resistor and one end of the forty-second resistor respectively, and the gate of the twenty-first MOS transistor is connected with one end of the forty-sixth resistor and one end of the forty-fifth resistor respectively;

the other end of the first resistor, the other end of the ninth resistor, the source electrode of the second MOS transistor, the other end of the nineteenth resistor, the source electrode of the seventh MOS transistor, the other end of the twenty-seventh resistor, the source electrode of the eleventh MOS transistor, the other end of the thirty-fourth resistor, the source electrode of the fifteenth MOS transistor, the other end of the forty-second resistor, the source electrode of the nineteenth MOS transistor and the other end of the forty-fifth resistor are connected with one end of the transmitting coil and the peripheral auxiliary power supply unit;

the other end of the fifth resistor, the other end of the fourteenth resistor, the other end of the twenty-fourth resistor, the other end of the thirty-first resistor, the other end of the thirty-ninth resistor and the other end of the forty-sixth resistor are all connected with the power tube driving unit.

In the power frequency inversion and charging integrated machine of the present invention, the DC-AC inversion unit/full wave rectification unit further comprises a twelfth capacitor, a thirteenth capacitor, a second capacitor, a sixth resistor, an eighth resistor, a first MOS transistor, a thirteenth resistor, a sixteenth resistor, a fifth MOS transistor, a twenty-first resistor, a twenty-third resistor, a ninth MOS transistor, a twenty-ninth resistor, a thirty-second resistor, a thirteenth MOS transistor, a thirty-seventh resistor, a forty-fourth resistor, a seventeenth MOS transistor, a forty-eighth resistor, a forty-seventh resistor, and a twenty-second MOS transistor, wherein one end of the twelfth capacitor is connected to one end of the thirteenth capacitor, one end of the second capacitor, a drain electrode of the first MOS transistor, a drain electrode of the fifth MOS transistor, a drain electrode of the ninth MOS transistor, a drain electrode of the thirteenth MOS transistor, a drain electrode of the seventeenth MOS transistor, and a drain electrode of the twenty-second MOS transistor respectively, the grid of the first MOS tube is respectively connected with one end of a sixth resistor and one end of an eighth resistor, the grid of the fifth MOS tube is respectively connected with one end of a thirteenth resistor and one end of a sixteenth resistor, the grid of the ninth MOS tube is respectively connected with one end of a twenty-first resistor and one end of a twenty-third resistor, the grid of the thirteenth MOS tube is respectively connected with one end of a twenty-ninth resistor and one end of a thirty-second resistor, the grid of the seventeenth MOS tube is respectively connected with one end of a thirty-seventh resistor and one end of a forty-seventh resistor, and the grid of the twelfth MOS tube is respectively connected with one end of a forty-eighth resistor and one end of a forty-seventh resistor;

the other end of the second capacitor is connected with one end of the second resistor, and the other end of the twelfth capacitor is connected with the other end of the thirteenth capacitor, the other end of the second resistor, the other end of the eighth resistor, the source electrode of the first MOS transistor, the other end of the sixteenth resistor, the source electrode of the fifth MOS transistor, the other end of the twenty-third resistor, the source electrode of the ninth MOS transistor, the other end of the thirty-second resistor, the source electrode of the thirteenth MOS transistor, the other end of the forty-fourth resistor, the source electrode of the seventeenth MOS transistor, the other end of the forty-seventh resistor and the source electrode of the twenty-second MOS transistor respectively; the other end of the sixth resistor is respectively connected with the power driving unit, the other end of the thirteenth resistor, the other end of the twenty-first resistor, the other end of the twenty-ninth resistor, the other end of the thirty-seventh resistor and the other end of the forty-eighth resistor.

In the power frequency inverter charging all-in-one machine, the DC-AC inverter unit/full-wave rectifier unit further includes a third capacitor, a third resistor, a tenth resistor, a twelfth resistor, a fourth MOS transistor, a seventeenth resistor, a twentieth resistor, an eighth MOS transistor, a twenty-sixth resistor, a twenty-eighth resistor, a twelfth MOS transistor, a thirty-fifth resistor, a thirty-sixth resistor, a sixteenth MOS transistor, a forty-third resistor, a forty-fourth resistor, a twentieth MOS transistor, a fifty-fifth resistor, a forty-ninth resistor, and a twenty-third MOS transistor, and one end of the third capacitor is connected to the MCU microprocessor unit, the drain electrode of the fourth MOS transistor, the drain electrode of the eighth MOS transistor, the drain electrode of the twelfth MOS transistor, the drain electrode of the sixteenth MOS transistor, the drain electrode of the twenty-third MOS transistor, and the drain electrode of the twenty-third MOS transistor, respectively;

the other end of the third capacitor is connected with one end of the third resistor, the gate of the fourth MOS transistor is connected with one end of the tenth resistor and one end of the twelfth resistor, the gate of the eighth MOS transistor is connected with one end of the seventeenth resistor and one end of the twentieth resistor, the gate of the twelfth MOS transistor is connected with one end of the twenty-sixth resistor and one end of the twenty-eighth resistor, the gate of the sixteenth MOS transistor is connected with one end of the thirty-fifth resistor and one end of the thirty-sixth resistor, the gate of the twentieth MOS transistor is connected with one end of the forty-third resistor and one end of the forty-fourth resistor, and the gate of the twenty-thirteenth MOS transistor is connected with one end of the fifty-fifth resistor and one end of the forty-ninth resistor;

the other end of the third resistor is respectively connected with the peripheral auxiliary power supply unit, the other end of the transmitting coil, the other end of the twelfth resistor, the source electrode of the fourth MOS tube, the other end of the twentieth resistor, the source electrode of the eighth MOS tube, the other end of the twenty-eighth resistor, the source electrode of the twelfth MOS tube, the other end of the thirty-sixth resistor, the source electrode of the sixteenth MOS tube, the other end of the forty-fourth resistor, the source electrode of the twentieth MOS tube, the other end of the forty-ninth resistor and the source electrode of the twenty-third MOS tube; the other end of the tenth resistor is connected with the power tube driving unit, the other end of the seventeenth resistor, the other end of the twenty-sixth resistor, the other end of the thirty-fifth resistor, the other end of the forty-third resistor and the other end of the fifty-fifth resistor respectively.

In the power frequency inversion and charging integrated machine of the present invention, the DC-AC inversion unit/full wave rectification unit further comprises an eighth capacitor, an eleventh capacitor, a fourth resistor, a tenth resistor, a seventh resistor, an eleventh resistor, a third MOS transistor, a fifteenth resistor, an eighteenth resistor, a sixth MOS transistor, a twenty-second resistor, a twenty-fifth resistor, a tenth MOS transistor, a thirty-third resistor, a fourteenth MOS transistor, a thirty-eighth resistor, a forty-first resistor, an eighteenth MOS transistor, a fifty-second resistor, a fifty-first resistor, and a twenty-fourth MOS transistor, one end of the eighth capacitor is connected with one end of the eleventh capacitor, one end of the fourth capacitor, the drain electrode of the third MOS tube, the drain electrode of the sixth MOS tube, the drain electrode of the tenth MOS tube, the drain electrode of the fourteenth MOS tube, the drain electrode of the eighteenth MOS tube and the drain electrode of the twenty-fourth MOS tube respectively;

the other end of the fourth capacitor is connected with one end of the fourth resistor, the gate of the third MOS transistor is connected with one end of the seventh resistor and one end of the eleventh resistor respectively, the gate of the sixth MOS transistor is connected with one end of the fifteenth resistor and one end of the eighteenth resistor respectively, the gate of the tenth MOS transistor is connected with one end of the twenty-second resistor and one end of the twenty-fifth resistor respectively, the gate of the fourteenth MOS transistor is connected with one end of the thirty-third resistor and one end of the thirty-third resistor respectively, the gate of the eighteenth MOS transistor is connected with one end of the thirty-eighth resistor and one end of the forty-first resistor respectively, and the gate of the twenty-fourth MOS transistor is connected with one end of the fifty-second resistor and one end of the fifty-first resistor respectively;

the other end of the eighth capacitor is connected with the other end of the eleventh capacitor, the other end of the fourth resistor, one end of the tenth capacitor, the other end of the eleventh resistor, the source of the third MOS transistor, the other end of the eighteenth resistor, the source of the sixth MOS transistor, the other end of the twenty-fifth resistor, the source of the tenth MOS transistor, the other end of the thirty-third resistor, the source of the fourteenth MOS transistor, the other end of the forty-first resistor, the source of the eighteenth MOS transistor, the other end of the fifty-first resistor and the source of the twenty-fourth MOS transistor respectively; the other end of the seventh resistor is connected with the power tube driving unit, the other end of the fifteenth resistor, the other end of the twenty-second resistor, the other end of the thirty-third resistor, the other end of the thirty-eighth resistor and the other end of the fifty-second resistor respectively.

Implement the utility model discloses a power frequency contravariant all-in-one that charges has following beneficial effect: the power frequency inversion charging all-in-one machine has the advantages that the power frequency inversion charging all-in-one machine is enabled to have a wireless communication function through the wireless communication unit, wireless communication with external equipment and a mobile phone can be achieved, communication between the power frequency inversion charging all-in-one machine and the external equipment is optimized, a simpler wiring mode is achieved, the external equipment controls the operation of the inversion charging all-in-one machine through the wireless communication, and the working state of the inversion charging all-in-one machine is detected.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic structural diagram in an embodiment of the power frequency inversion charging integrated machine of the present invention;

fig. 2 is a circuit schematic diagram of the DC-AC inverter unit in the embodiment.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

The utility model discloses in the embodiment of the power frequency contravariant all-in-one that charges, this power frequency contravariant all-in-one that charges's structural schematic is shown in FIG. 1. In fig. 1, the power frequency inversion and charging all-in-one machine comprises a DC-AC inversion unit 1/full wave rectification unit 1', an AC-AC power frequency boosting unit 2/power frequency voltage reducing unit 2', an LC filtering unit 3, a peripheral auxiliary power supply unit 4, a data sampling unit 5, a power tube driving unit 6, a fan control unit 7, a circuit protection unit 8, an MCU microprocessor unit 9, an LCD display unit 10, a working mode indication unit 11 and a wireless communication unit 12, wherein the DC-AC inversion unit 1/full wave rectification unit 1 'is respectively connected with the AC-AC power frequency boosting unit 2/power frequency voltage reducing unit 2', the LC filtering unit 3, the peripheral auxiliary power supply unit 4, the power tube driving unit 6 and the MCU microprocessor unit 9, the data sampling unit 5, the fan control unit 7, the circuit protection unit 8, The LCD display unit 10, the working mode indicating unit 11 and the wireless communication unit 12 are all connected with the MCU 9.

In this embodiment, the DC-AC inverter unit 1 converts the input DC level into pulse energy with a fundamental wave of 50/60Hz, and the pulse energy is converted into 50/60Hz alternating current for the alternating current load through the AC-AC power frequency boosting unit 2 and the LC filtering unit 3. The peripheral auxiliary power supply unit 4 supplies power to other working units. The data sampling unit 5 collects the working state of the power frequency inversion charging all-in-one machine, including the working mode of the power frequency inversion charging all-in-one machine, the inversion output voltage, the inversion output current, the direct current input voltage, the temperature of the radiator, the working state of the fan, the charging current of the storage battery and the like, and the data sampling unit 5 sends the collected data to the MCU 9 after amplification and filtering processing.

The power tube driving unit 6 drives a full-bridge power MOS tube to realize full-bridge inversion, and converts direct current level into pulse energy; the fan control unit 7 controls the operation of the fan, detects the operation condition of the fan in real time, and sends the abnormal condition to the MCU 9 when the fan is abnormal; the circuit protection unit 8 has an input overvoltage protection function and an output overcurrent protection function, and when the input voltage or the output current exceeds a set value, the circuit protection unit 8 immediately closes the all-in-one machine system to prevent the circuit of the all-in-one machine system from being damaged.

The MCU 9 processes the signals of the data sampling unit 5, the fan control unit 7 and the wireless communication unit 12 and sends out corresponding control signals, and the control signals control the power MOS tube through the power tube driving unit 6 to realize energy transmission.

The LCD display unit 10 displays the current operation data of the all-in-one machine system, including data such as inversion output voltage, output power, input voltage and fault information; the working mode indicating unit 11 indicates the current working state through an LED indicating lamp; the wireless communication unit 12 communicates with the external device, sends the current state information of the all-in-one machine, receives the command sent by the external device, and transmits the command to the MCU 9, and the MCU 9 performs related processing according to related algorithms.

The full-wave rectification unit 1' rectifies 50/60Hz alternating current and then charges a storage battery; the power frequency voltage reduction unit 2 'reduces the voltage of alternating current commercial power, provides energy input for the full-wave rectification unit 1', and the full-wave rectification unit 1 'and the power frequency voltage reduction unit 2' jointly realize a storage battery charging power transmission circuit.

The specific working process of the power frequency inversion charging all-in-one machine is as follows: when the input side is connected with a direct current level, the peripheral auxiliary power supply unit 4 starts to work to provide power for each unit of the power frequency inversion charging all-in-one machine, the data sampling unit 5 amplifies and filters acquired information and sends the information to the MCU microprocessor unit 9, the wireless communication unit 12 communicates with external equipment and transmits an external equipment command to the wireless communication unit 12, the MCU microprocessor unit 9 performs operation processing on the sampling information according to a related algorithm, if all the external environments are normal, a PWM control signal is sent out, the PWM control signal controls the full-bridge MOS tube through the power tube driving unit 6, and inversion chopping or charging management is performed according to the current mode.

If the current mode is an inversion mode, the PWM control signal completes full-bridge chopping of the DC-AC inversion unit 1 through the power tube driving unit 6, and high-frequency pulse energy after chopping is output in an alternating current level mode through the AC-AC power frequency boosting unit 2 and the LC filtering unit 3; if the current mode is a charging mode, the PWM control signal completes the rectification function of the full-wave rectification unit 1' through the power tube driving unit 6, the rectified direct current level charges a storage battery, and the power frequency voltage reduction unit 2' provides energy input for the full-wave rectification unit 1 '; meanwhile, the MCU 9 sends out a control signal according to the current running condition, controls the working mode indicating unit 11 to light up a related LED indicating lamp and indicates the current working state.

The MCU 9 communicates with the wireless communication unit 12 in real time, transmits the current working state to the wireless communication unit 12, the wireless communication unit 12 communicates with external equipment in a wireless mode, sends the current state information of the all-in-one machine to the external equipment, the external equipment transmits the operation parameters of the all-in-one machine to the LCD display unit 10, and the LCD display unit 10 displays the operation parameters of the all-in-one machine. When the MCU 9 detects that the information of the data sampling unit 5 exceeds the normal value range, the judgment is made according to the related algorithm, a control signal is sent out, PWM is closed, and inversion or charging is stopped.

In the normal operation process of the power frequency inversion charging all-in-one machine, when the temperature reaches a certain value or the output power reaches a certain value, the MCU 9 sends a control signal to control the fan control unit 7 to start working, and the fan is started to dissipate heat for the all-in-one machine.

This power frequency contravariant all-in-one that charges and external equipment adopt wireless communication, have simplified circuit layout. The power frequency inversion charging all-in-one machine can be communicated with a plurality of external devices, so that the flexibility of the system is improved, and the system is convenient to maintain. This power frequency contravariant all-in-one system that charges is more succinct, has improved the stability of system.

Fig. 2 is a schematic circuit diagram of a DC-AC inverter unit in this embodiment, in fig. 2, the DC-AC inverter unit 1 includes a transmitting coil TX, a ninth capacitor C9, a first capacitor C1, a first resistor R1, a fifth resistor R5, a ninth resistor R9, a second MOS transistor Q2, a fourteenth resistor R40, a nineteenth resistor R19, a seventh MOS transistor Q7, a twenty-fourth resistor R24, a twenty-seventh resistor R27, an eleventh MOS transistor Q11, a thirty-first resistor R31, a thirty-fourth resistor R34, a fifteenth MOS transistor Q2, a thirty-ninth resistor R39, a forty-second resistor R42, a nineteenth MOS transistor Q19, a forty-sixth resistor R46, a forty-fifth resistor R867 and a twenty-first MOS transistor Q21, wherein one end of the ninth capacitor C9 is respectively connected with a drain of the MCU 9, a drain of the first capacitor C9, a drain of the second transistor Q9, the eleventh MOS transistor Q9 and the twenty-first transistor Q9, The drain of the fifteenth MOS transistor Q15, the drain of the nineteenth MOS transistor Q19 is connected to the drain of the twenty-first MOS transistor Q21, the other end of the ninth capacitor C9 is grounded, the other end of the first capacitor C1 is connected to one end of the first resistor R1, the gate of the second MOS transistor Q2 is connected to one end of the fifth resistor R5 and one end of the ninth resistor R9, the gate of the seventh MOS transistor Q7 is connected to one end of the fourteenth resistor R14 and one end of the nineteenth resistor R19, the gate of the eleventh MOS transistor Q11 is connected to one end of the twenty-fourth resistor R24 and one end of the twenty-seventh resistor R27, the gate of the fifteenth MOS transistor Q15 is connected to one end of the thirty-first resistor R31 and one end of the thirty-fourth resistor R34, the gate of the nineteenth MOS transistor Q19 is connected to one end of the ninth resistor R39 and one end of the forty-second resistor R42, and the gate of the twenty-fifth resistor R5928 are connected to the gate of the twenty-fifth resistor R21 and the forty-fifth resistor R599.

The other end of the first resistor R1, the other end of the ninth resistor R9, the source of the second MOS transistor Q2, the other end of the nineteenth resistor R19, the source of the seventh MOS transistor Q7, the other end of the twenty-seventh resistor R27, the source of the eleventh MOS transistor Q11, the other end of the thirty-fourth resistor R34, the source of the fifteenth MOS transistor Q15, the other end of the forty-second resistor R42, the source of the nineteenth MOS transistor Q19, and the other end of the forty-fifth resistor R45 are all connected to one end of the transmitting coil TX and the peripheral auxiliary power supply unit 4.

The other end of the fifth resistor R5, the other end of the fourteenth resistor R14, the other end of the twenty-fourth resistor R24, the other end of the thirty-first resistor R31, the other end of the thirty-ninth resistor R39 and the other end of the forty-sixth resistor R46 are all connected with the power tube driving unit 6.

In this embodiment, the DC-AC inverter unit 1 further includes a twelfth capacitor C12, a thirteenth capacitor C13, a second capacitor C2, a sixth resistor R6, an eighth resistor R8, a first MOS transistor Q1, a thirteenth resistor R13, a sixteenth resistor R16, a fifth MOS transistor Q5, a twenty-first resistor R21, a twenty-third resistor R21, a ninth MOS transistor Q21, a twenty-ninth resistor R21, a thirty-second resistor R21, a thirteenth MOS transistor Q21, a thirty-seventh resistor R21, a forty-fourth resistor R21, a seventeenth MOS transistor Q21, a forty-eighth resistor R21, a forty-seventh resistor R21 and a twenty-second MOS transistor Q21, wherein one end of the twelfth capacitor C21 is connected to one end of the thirteenth capacitor C21, one end of the second capacitor C21, a drain of the first MOS transistor Q21, a drain of the fifth MOS transistor Q21, a drain of the thirteenth transistor Q21, a drain of the twenty-second MOS transistor Q21 and a drain of the twenty-second transistor Q21, the gate of the first MOS transistor Q1 is connected to one end of a sixth resistor R6 and one end of an eighth resistor R8, the gate of the fifth MOS transistor Q5 is connected to one end of a thirteenth resistor R13 and one end of a sixteenth resistor R16, the gate of the ninth MOS transistor Q9 is connected to one end of a twenty-first resistor R21 and one end of a twenty-third resistor R23, the gate of the thirteenth MOS transistor Q13 is connected to one end of a twenty-ninth resistor R29 and one end of a thirty-second resistor R32, the gate of the seventeenth MOS transistor Q17 is connected to one end of a thirty-seventh resistor R37 and one end of a forty-fourth resistor R40, and the gate of the twenty-second MOS transistor Q22 is connected to one end of a forty-eighth resistor R48 and one end of a forty-seventh resistor R47.

The other end of the second capacitor C2 is connected with one end of a second resistor R2, and the other end of the twelfth capacitor C12 is connected with the other end of a thirteenth capacitor C13, the other end of a second resistor R2, the other end of an eighth resistor R8, the source of the first MOS transistor Q1, the other end of a sixteenth resistor R16, the source of the fifth MOS transistor Q5, the other end of a twenty-third resistor R23, the source of the ninth MOS transistor Q9, the other end of a thirty-second resistor R32, the source of the thirteenth MOS transistor Q13, the other end of a forty-resistor R40, the source of a seventeenth MOS transistor Q17, the other end of a forty-seventh resistor R47 and the source of a twenty-second MOS transistor Q22, respectively; the other end of the sixth resistor R6 is connected to the power driving unit 6, the other end of the thirteenth resistor R13, the other end of the twenty-first resistor R21, the other end of the twenty-ninth resistor R29, the other end of the thirty-seventh resistor R37, and the other end of the forty-eighth resistor R48, respectively.

In this embodiment, the DC-AC inverter unit 1 further includes a third capacitor C3, a third resistor R3, a tenth resistor R10, a twelfth resistor R12, a fourth MOS transistor Q4, a seventeenth resistor R17, a twentieth resistor R20, an eighth MOS transistor Q8, a twenty-sixth resistor R26, a twenty-eighth resistor R28, a twelfth MOS transistor Q12, a thirty-fifth resistor R35, a thirty-sixth resistor R36, a sixteenth MOS transistor Q16, a forty-third resistor R43, a forty-fourth resistor R44, a twenty-MOS transistor Q20, a thirty-fifth resistor R50, a forty-ninth resistor R49, and a twenty-third MOS transistor Q49, wherein one end of the third capacitor C49 is connected to a drain of the MCU 9, a drain of the fourth MOS transistor Q49, a drain of the eighth MOS transistor Q49, a drain of the twelfth drain MOS transistor Q49, a sixteenth MOS transistor Q49, a drain of the twenty-third MOS transistor Q49 and a drain of the twenty-third MOS transistor Q49.

The other end of the third capacitor C3 is connected to one end of a third resistor R3, the gate of the fourth MOS transistor Q4 is connected to one end of a tenth resistor R10 and one end of a twelfth resistor R12, the gate of the eighth MOS transistor Q8 is connected to one end of a seventeenth resistor R17 and one end of a twentieth resistor R20, the gate of the twelfth MOS transistor Q12 is connected to one end of a twenty-sixth resistor R26 and one end of a twenty-eighth resistor R28, the gate of the sixteenth MOS transistor Q16 is connected to one end of a thirty-fifth resistor R35 and one end of a thirty-sixth resistor R36, the gate of the twentieth MOS transistor Q20 is connected to one end of a forty-third resistor R43 and one end of a forty-fourth resistor R44, and the gate of the twenty-third MOS transistor Q23 is connected to one end of a fifty-fifth resistor R50 and one end of a forty-ninth resistor R49.

The other end of the third resistor R3 is connected to the peripheral auxiliary power supply unit 4, the other end of the transmitting coil TX, the other end of the twelfth resistor R12, the source of the fourth MOS transistor Q4, the other end of the twentieth resistor R20, the source of the eighth MOS transistor Q8, the other end of the twenty-eighth resistor R28, the source of the twelfth MOS transistor Q12, the other end of the thirty-sixth resistor R36, the source of the sixteenth MOS transistor Q16, the other end of the forty-fourth resistor R44, the source of the twentieth MOS transistor Q20, the other end of the forty-ninth resistor R49, and the source of the twenty-third MOS transistor Q23, respectively; the other end of the tenth resistor R10 is connected to the power transistor driving unit 6, the other end of the seventeenth resistor R17, the other end of the twenty-sixth resistor R26, the other end of the thirty-fifth resistor R35, the other end of the forty-third resistor R43, and the other end of the fifty-fifth resistor R50, respectively.

In this embodiment, the DC-AC inverter unit 1 further includes an eighth capacitor C8, an eleventh capacitor C11, a fourth capacitor C4, a fourth resistor R4, a tenth resistor R10, a seventh resistor R7, an eleventh resistor R11, a third MOS transistor Q3, a fifteenth resistor R15, an eighteenth resistor R18, a sixth MOS transistor Q6, a twenty-second resistor R22, a twenty-fifth resistor R25, a tenth MOS transistor Q10, a thirty-third resistor R30, a thirty-third resistor R33, a fourteenth MOS transistor Q14, a thirty-eighth resistor R38, a forty-first resistor R41, an eighteenth MOS transistor Q18, a second resistor R52, a first resistor R51, and a twenty-fourth MOS transistor Q24, one end of the eighth capacitor C8 is connected to one end of the eleventh capacitor C11, one end of the fourth capacitor C4, the drain of the third MOS transistor Q3, the drain of the sixth MOS transistor Q6, the drain of the tenth MOS transistor Q10, the drain of the fourteenth MOS transistor Q14, the drain of the eighteenth MOS transistor Q18, and the drain of the twenty-fourth MOS transistor Q24, respectively.

The other end of the fourth capacitor C4 is connected to one end of a fourth resistor R4, the gate of the third MOS transistor Q3 is connected to one end of a seventh resistor R7 and one end of an eleventh resistor R11, the gate of the sixth MOS transistor Q6 is connected to one end of a fifteenth resistor R15 and one end of an eighteenth resistor R18, the gate of the tenth MOS transistor Q10 is connected to one end of a twenty-second resistor R22 and one end of a twenty-fifth resistor R25, the gate of the fourteenth MOS transistor Q14 is connected to one end of a thirty-third resistor R30 and one end of a thirty-third resistor R33, the gate of the eighteenth MOS transistor Q18 is connected to one end of a thirty-eighth resistor R38 and one end of a forty-first resistor R41, and the gate of the twenty-fourth MOS transistor Q24 is connected to one end of a second resistor R52 and one end of a fifty-first resistor R51.

The other end of the eighth capacitor C8 is connected to the other end of the eleventh capacitor C11, the other end of the fourth resistor R4, one end of the tenth capacitor C10, the other end of the eleventh resistor R11, the source of the third MOS transistor Q3, the other end of the eighteenth resistor R18, the source of the sixth MOS transistor Q6, the other end of the twenty-fifth resistor R25, the source of the tenth MOS transistor Q10, the other end of the thirty-third resistor R33, the source of the fourteenth MOS transistor Q14, the other end of the forty-first resistor R41, the source of the eighteenth MOS transistor Q18, the other end of the fifty-first resistor R51 and the source of the twenty-fourth MOS transistor Q24, respectively; the other end of the seventh resistor R7 is connected to the power transistor driving unit 6, the other end of the fifteenth resistor R15, the other end of the twenty-second resistor R22, the other end of the thirty-third resistor R30, the other end of the thirty-eighth resistor R38, and the other end of the fifty-second resistor R52, respectively.

In this embodiment, the AC-AC power frequency boosting unit 2/power frequency voltage reducing unit 2', the LC filtering unit 3, the peripheral auxiliary power supply unit 4, the data sampling unit 5, the power tube driving unit 6, the fan control unit 7, the circuit protection unit 8, the MCU microprocessor unit 9, the LCD display unit 10, the operating mode indicating unit 11, and the wireless communication unit 12 all adopt circuits having any structure that can implement their functions in the prior art, and will not be described here.

In a word, in this embodiment, this power frequency contravariant all-in-one that charges has the wireless communication function, can realize carrying out wireless communication between with external equipment and the cell-phone, can supply power for alternating current load safe and reliable, when the battery electric quantity is lacked, charges the battery. The communication between the power frequency inversion charging all-in-one machine and the external equipment is optimized, a simpler wiring mode is realized, the external equipment controls the inversion charging all-in-one machine to work through wireless communication, and the working state of the inversion charging all-in-one machine is detected.

The utility model discloses a wireless communication technology for this power frequency contravariant all-in-one that charges can communicate with many external equipment. The power frequency inversion charging all-in-one machine sends current running state information through wireless communication, and external equipment detects the working condition of the all-in-one machine in real time and controls the all-in-one machine to provide alternating current electric energy for a load according to the running condition of the all-in-one machine at present. The power frequency inversion charging all-in-one machine and the external equipment are in a master-slave relationship, and the master-slave relationship can be mutually converted; when the power frequency inversion charging all-in-one machine sends data, the power frequency inversion charging all-in-one machine is a host machine, and when the external equipment sends a control signal to control the power frequency inversion charging all-in-one machine to work, the power frequency inversion charging all-in-one machine is a slave machine. The utility model discloses the wireless communication technique and the control algorithm that adopt can fill the blank of present domestic market contravariant all-in-one technique that charges.

The above description is only a preferred embodiment of the present invention, and should not be taken as limiting the invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A power frequency inversion charging integrated machine is characterized by comprising a DC-AC inversion unit/full wave rectification unit, an AC-AC power frequency boosting unit/power frequency voltage reducing unit, an LC filtering unit, a peripheral auxiliary power supply unit, a data sampling unit, a power tube driving unit, a fan control unit, a circuit protection unit, an MCU microprocessor unit, an LCD display unit, a working mode indicating unit and a wireless communication unit, wherein the DC-AC inversion unit/full wave rectification unit is respectively connected with the AC-AC power frequency boosting unit/power frequency voltage reducing unit, the LC filtering unit, the peripheral auxiliary power supply unit, the power tube driving unit and the MCU microprocessor unit, the data sampling unit, the fan control unit, the circuit protection unit, the LCD display unit, the working mode indicating unit and the wireless communication unit are all connected with the MCU.

2. The power frequency inversion and charging all-in-one machine according to claim 1, wherein the DC-AC inversion unit comprises a transmitting coil, a ninth capacitor, a first resistor, a fifth resistor, a ninth resistor, a second MOS (metal oxide semiconductor) transistor, a fourteenth resistor, a nineteenth resistor, a seventh MOS transistor, a twenty-fourth resistor, a twenty-seventh resistor, an eleventh MOS transistor, a thirty-eleventh resistor, a thirty-fourth resistor, a fifteenth MOS transistor, a thirty-ninth resistor, a forty-second resistor, a nineteenth MOS transistor, a forty-sixth resistor, a forty-fifth resistor and a twenty-first MOS transistor, one end of the ninth capacitor is respectively connected with the MCU microprocessor unit, one end of the first capacitor, a drain electrode of the second MOS transistor, a drain electrode of the seventh MOS transistor, a drain electrode of the eleventh MOS transistor, a drain electrode of the fifteenth MOS transistor, a drain electrode of the nineteenth MOS transistor and a drain electrode of the twenty-first MOS transistor, the other end of the ninth capacitor is grounded, the other end of the first capacitor is connected with one end of the first resistor, the gate of the second MOS transistor is connected with one end of the fifth resistor and one end of the ninth resistor respectively, the gate of the seventh MOS transistor is connected with one end of the fourteenth resistor and one end of the nineteenth resistor respectively, the gate of the eleventh MOS transistor is connected with one end of the twenty-fourth resistor and one end of the twenty-seventh resistor respectively, the gate of the fifteenth MOS transistor is connected with one end of the thirty-eleventh resistor and one end of the thirty-fourth resistor respectively, the gate of the nineteenth MOS transistor is connected with one end of the thirty-ninth resistor and one end of the forty-second resistor respectively, and the gate of the twenty-first MOS transistor is connected with one end of the forty-sixth resistor and one end of the forty-fifth resistor respectively;

3. The power frequency inversion and charging all-in-one machine according to claim 2, wherein the DC-AC inversion unit further comprises a twelfth capacitor, a thirteenth capacitor, a second capacitor, a sixth resistor, an eighth resistor, a first MOS transistor, a thirteenth resistor, a sixteenth resistor, a fifth MOS transistor, a twenty-first resistor, a twenty-third resistor, a ninth MOS transistor, a twenty-ninth resistor, a thirty-second resistor, a thirteenth MOS transistor, a thirty-seventh resistor, a forty-fourth resistor, a seventeenth MOS transistor, a forty-eighth resistor, a forty-seventh resistor and a twenty-second MOS transistor, one end of the twelfth capacitor is respectively connected with one end of the thirteenth capacitor, one end of the second capacitor, a drain electrode of the first MOS transistor, a drain electrode of the fifth MOS transistor, a drain electrode of the ninth MOS transistor, a drain electrode of the thirteenth MOS transistor, a drain electrode of the seventeenth MOS transistor and a drain electrode of the twenty-second MOS transistor, a gate electrode of the first MOS transistor is respectively connected with one end of the sixth resistor and one end of the eighth resistor, a grid electrode of the fifth MOS transistor is connected with one end of the thirteenth resistor and one end of the sixteenth resistor respectively, a grid electrode of the ninth MOS transistor is connected with one end of the twenty-first resistor and one end of the twenty-third resistor respectively, a grid electrode of the thirteenth MOS transistor is connected with one end of the twenty-ninth resistor and one end of the thirty-second resistor respectively, a grid electrode of the seventeenth MOS transistor is connected with one end of the thirty-seventh resistor and one end of the forty-seventh resistor respectively, and a grid electrode of the twelfth MOS transistor is connected with one end of the forty-eighth resistor and one end of the forty-seventh resistor respectively;

the other end of the second capacitor is connected with one end of a second resistor, and the other end of the twelfth capacitor is connected with the other end of the thirteenth capacitor, the other end of the second resistor, the other end of the eighth resistor, the source electrode of the first MOS transistor, the other end of the sixteenth resistor, the source electrode of the fifth MOS transistor, the other end of the twenty-third resistor, the source electrode of the ninth MOS transistor, the other end of the thirty-second resistor, the source electrode of the thirteenth MOS transistor, the other end of the forty-fourth resistor, the source electrode of the seventeenth MOS transistor, the other end of the forty-seventh resistor and the source electrode of the twenty-second MOS transistor respectively; the other end of the sixth resistor is respectively connected with the power driving unit, the other end of the thirteenth resistor, the other end of the twenty-first resistor, the other end of the twenty-ninth resistor, the other end of the thirty-seventh resistor and the other end of the forty-eighth resistor.

4. The power frequency inversion and charging integrated machine according to claim 3, wherein the DC-AC inversion unit further comprises a third capacitor, a third resistor, a tenth resistor, a twelfth resistor, a fourth MOS transistor, a seventeenth resistor, a twentieth resistor, an eighth MOS transistor, a twenty-sixth resistor, a twenty-eighth resistor, a twelfth MOS transistor, a thirty-fifth resistor, a thirty-sixth resistor, a sixteenth MOS transistor, a forty-third resistor, a forty-fourth resistor, a twentieth MOS transistor, a fifty-fifth resistor, a forty-ninth resistor and a twenty-third MOS transistor, and one end of the third capacitor is connected with the MCU microprocessor unit, a drain electrode of the fourth MOS transistor, a drain electrode of the eighth MOS transistor, a drain electrode of the twelfth MOS transistor, a drain electrode of the sixteenth MOS transistor, a drain electrode of the twentieth MOS transistor and a drain electrode of the twenty-third MOS transistor respectively;

5. The power frequency inversion and charging all-in-one machine according to claim 4, wherein the DC-AC inversion unit further comprises an eighth capacitor, an eleventh capacitor, a fourth resistor, a tenth resistor, a seventh resistor, an eleventh resistor, a third MOS transistor, a fifteenth resistor, an eighteenth resistor, a sixth MOS transistor, a twenty-second resistor, a twenty-fifth resistor, a tenth MOS transistor, a thirty-third resistor, a fourteenth MOS transistor, a thirty-eighth resistor, a forty-first resistor, an eighteenth MOS transistor, a fifty-second resistor, a fifty-first resistor and a twenty-fourth MOS transistor, one end of the eighth capacitor is connected with one end of the eleventh capacitor, one end of the fourth capacitor, the drain electrode of the third MOS tube, the drain electrode of the sixth MOS tube, the drain electrode of the tenth MOS tube, the drain electrode of the fourteenth MOS tube, the drain electrode of the eighteenth MOS tube and the drain electrode of the twenty-fourth MOS tube respectively;