CN106292815A - Low dropout voltage regulator and the output buffer comprising low dropout voltage regulator - Google Patents
Low dropout voltage regulator and the output buffer comprising low dropout voltage regulator Download PDFInfo
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- CN106292815A CN106292815A CN201510272365.4A CN201510272365A CN106292815A CN 106292815 A CN106292815 A CN 106292815A CN 201510272365 A CN201510272365 A CN 201510272365A CN 106292815 A CN106292815 A CN 106292815A
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- low dropout
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Abstract
A kind of low dropout voltage regulator, comprises and is electrically connected to a first input end of one first direct voltage source, one second input being electrically connected to one second direct voltage source and an outfan.The magnitude of voltage of this second direct voltage source is more than the magnitude of voltage of this first direct voltage source.This low dropout voltage regulator additionally comprises an amplifying unit, a trnasducing element, a current replication unit and the first to the 3rd resistance.The magnitude of voltage of the VD that this low dropout voltage regulator produces in outfan is substantially equal to the magnitude of voltage of this second direct voltage source and deducts the magnitude of voltage of this first direct voltage source.
Description
Technical field
The present invention is about a kind of low dropout voltage regulator and the output buffer comprising low dropout voltage regulator.
Background technology
Low dropout voltage regulator (Low Drop-Out Regulator, LDO Regulator) due to have low noise,
The characteristic that volume is little, adds the lifting of conversion usefulness, has the most become lower powered power management collection
Become the main flow of circuit.Low dropout voltage regulator is widely used in by the portable system of battery power supply and leads to
In the electronic product that letter is relevant, so as to providing stable output voltage to use to load.
Fig. 1 shows the circuit diagram of a low dropout voltage regulator 10 of prior art.With reference to Fig. 1, this low pressure drop is steady
Depressor 10 comprises an energy gap (bandgap) voltage generation circuit 101, error amplifier 102, output crystalline substance
Body pipe 103, resistance R1 and R2 and output capacitance C1.
The source electrode of this output transistor 103 and drain electrode are respectively connecting to the input of this low dropout voltage regulator 10
And outfan.This resistance R1 and this resistance R2 forms a bleeder circuit, to provide ratio in output voltage
The feedback voltage VFB of VOUT is to the positive input terminal of this error amplifier 102.This error amplifier 102 is used
One of the negative input end to this error amplifier 102 is provided by this energy gap voltage generation circuit 101 to amplify
The difference of reference voltage VREF and this feedback voltage VFB, so as to producing an output voltage VD to this output
The grid of transistor 103.When output voltage VO UT produces change, this error amplifier 102 is by inspection
Survey the difference of this feedback voltage VFB and this reference voltage VREF, can suitably adjust output voltage VD with
Change voltage difference between the Source-Gate of this power transistor 103, so as to providing enough outputing current to bear
Carry RL, with regulated output voltage VOUT.
In the prior art, load RL be connected to the outfan of this low dropout voltage regulator 10 and an earth terminal it
Between.Therefore this low dropout voltage regulator 10 can be provided enough by direct voltage source VCC by this power transistor 103
Draw (source) electric current to loading RL.But, it being limited to its configuration, this low dropout voltage regulator 10 is only capable of carrying
For the least filling (sink) electric current to loading RL.
Summary of the invention
An object of the present invention is to provide a kind of low dropout voltage regulator, fills (sink) electric current to negative to provide
Carry end.
According to one embodiment of the invention, this low dropout voltage regulator comprises and is electrically connected to one first DC voltage
One first input end in source, it is electrically connected to one second input of one second direct voltage source and in order to produce
One outfan of a raw VD.This low dropout voltage regulator additionally comprises an amplifying unit, a transduction
Unit, a current replication unit and the first to the 3rd resistance.This amplifying unit is for receiving a reference voltage
With a feedback voltage to produce a VD to this outfan.This trnasducing element is electrically connected to this
First input end, this trnasducing element is used for according to this reference voltage to produce one first electric current.This first electricity
Resistance is used for receiving this first electric current to produce this reference voltage.This current replication unit be electrically connected to this
Two inputs, this current replication unit is used for according to this feedback voltage to produce one second electric current and the 3rd
Electric current.This second resistance is used for receiving this second electric current to produce this feedback voltage.3rd resistance electrical
Be connected between this current replication unit and this outfan, the 3rd resistance be used for receiving the 3rd electric current with
Produce this VD.The magnitude of voltage of this second direct voltage source is more than this first direct voltage source
Magnitude of voltage.
Accompanying drawing explanation
Fig. 1 shows the circuit diagram of a low dropout voltage regulator of prior art.
Fig. 2 shows the circuit diagram of the low dropout voltage regulator combining one embodiment of the invention.
Fig. 3 shows the circuit diagram of the low dropout voltage regulator combining one embodiment of the invention
Fig. 4 shows the block schematic diagram of the output buffer combining one embodiment of the invention.
Symbol description
100 low dropout voltage regulators
101 energy gap voltage generation circuits
102 error amplifiers
103 output transistors
200 low dropout voltage regulators
22 amplifying units
224 operational amplifiers
24 trnasducing elements
26 current replication unit
400 output buffers
42 output stages
44 voltage level shifters
46 voltage level shifters
C1 output capacitance
M1～M6 transistor
MN, MP, MX power transistor
R1～R6 resistance
Detailed description of the invention
Fig. 2 shows the block schematic diagram of the low dropout voltage regulator 200 combining one embodiment of the invention.This low pressure
Fall manostat 200 includes that a first input end is to be electrically connected to a direct voltage source VCC, one second input
End is to be electrically connected a direct voltage source VH and an outfan to provide direct current output voltage VO UT.Should
Low dropout voltage regulator 20 separately include amplifying unit 22, trnasducing element 24, current replication unit 26,
One resistance R1, a resistance R2 and a resistance R3.This amplifying unit 22 is for receiving a reference voltage VREF
With a feedback voltage FB, so as to producing this VD VOUT to this outfan.This trnasducing element
24 are electrically connected to this direct voltage source VCC, and it is used for according to this reference voltage VREF to produce an electric current
I1.This resistance R1 is used for receiving this electric current I1 to produce this reference voltage VREF.
This current replication unit 26 is electrically connected to this direct voltage source VH, and it is for according to this feedback voltage
FB is to produce an an electric current I2 and electric current I3.This resistance R2 is used for receiving this electric current I2 to produce this back coupling electricity
Pressure FB.This resistance R3 is electrically connected between this current replication unit 26 and this amplifying unit 22.This resistance
R3 is used for receiving this electric current I3 to produce this VD VOUT.
Fig. 3 shows the circuit diagram of the low dropout voltage regulator 20 combining one embodiment of the invention.With reference to Fig. 3,
This amplifying unit 22 includes an operational amplifier 224 and a power transistor MX.This power transistor MX
Drain electrode be electrically connected to the outfan of this low dropout voltage regulator 20.The positive input terminal of this operational amplifier 224
For receiving this reference voltage VREF, and negative input end is used for receiving this feedback voltage.This operational amplifier
Can produce at its outfan after 224 voltage differences amplifying this reference voltage VREF and this feedback voltage FB
One grid outputing signal to this power transistor MX, so as to driving this power transistor MX.
As it is shown on figure 3, this trnasducing element 24 include a resistance R4 and the transistor M1 that is connected in series and
M2.This resistance R4 is electrically connected to this direct voltage source VCC.The source electrode electrical connection of this transistor M1
To this resistance R4, and grid is in order to receive this reference voltage VREF.The source electrode of this transistor M2 electrically connects
Being connected to the drain electrode of this transistor M1, its grid is in order to receive a bias voltage VB2, and its drain electrode is connected to
This positive input terminal of this operational amplifier 224.
As it is shown on figure 3, this current replication unit 26 includes a resistance R5, a resistance R6, is connected in series
Transistor M3 and M4 and transistor M5 and M6 being connected in series.It is straight that this resistance R5 is electrically connected to this
Stream voltage source VH.The source electrode of this transistor M3 is electrically connected to this resistance R5.The source electrode of this transistor M4
Being electrically connected to the drain electrode of this transistor M3, grid is in order to receive a bias voltage VB1, and its drain electrode is even
It is connected to this negative input end of this operational amplifier 224.This resistance R6 is electrically connected to this direct voltage source VH.
The source electrode of this transistor M5 is electrically connected to this resistance R6, and grid is electrically connected to this transistor M3's
Grid.The source electrode of this transistor M6 is electrically connected to the drain electrode of this transistor M5, and its grid is in order to receive
This bias voltage VB1, and its drain grid being electrically connected to this transistor M3 and this resistance R3.
In order to make those of ordinary skill in the art can implement the present invention by the teaching of this enforcement example,
The How It Works of the low dropout voltage regulator 200 of the present invention is described below with reference to Fig. 3.As it is shown on figure 3, due to stream
Enter the input current essence of this operational amplifier 224 close to zero, the element overall presure drop of electric current I1 institute flow path
It is represented by:
VCC-I1 × (R4+R1)-VSG (M1)=0 (1)
Wherein, VSG (M1) be this transistor M1 Source-Gate between voltage difference.
With reference to Fig. 3, it is negative that this amplifying unit 22, this trnasducing element 24 and this current replication unit 26 constitute one
Feedback loop so that the positive input terminal voltage VREF of this operational amplifier 224 is essentially the same as this computing
The negative input end voltage FB of amplifier 224.Therefore when resistance R1 selects identical with the resistance of resistance R2, electricity
Stream I2 can be essentially the same as electric current I1.
In current replication unit 26, if resistance R5 selects identical with the resistance of resistance R6, and transistor
The size of M3 is equivalently-sized with transistor M5's, then due to these PMOS transistor M3 and the grid of M5
Being connected to each other, the electric current I2 flowing through PMOS transistor M3 can be essentially the same as flowing through PMOS transistor
The electric current I3 of M5.In an embodiment of the present invention, these PMOS transistor M4 and M6's is equivalently-sized,
And its grid all receives a bias voltage VB1.The design of this bias voltage VB1 is to make these PMOS crystal
Pipe M4 and M6 is operated in saturation region, to add heavy current I2 and the matching degree of electric current I3 further.
Therefore, by resistance and the selection of transistor size, flow through this trnasducing element 24 electric current I1 and
The electric current I2 and electric current I3 that flow through this current replication unit 26 can be substantially the same.The unit of electric current I3 institute flow path
Part overall presure drop is represented by:
VH-I3 × (R6+R3)-VSG (M5)=VOUT (2)
Wherein, VSG (M5) be this transistor M5 Source-Gate between voltage difference.
Owing to electric current I3 is substantially the same with electric current I1, and the size of the size of transistor M5 and transistor M1
It is designed as identical, therefore VSG (M5) is essentially the same as VSG (M1).Therefore, equation (2)
Replaceable it is:
VH-I1 × (R6+R3)-VSG (M1)=VOUT (3)
When resistance R6 selects identical with the resistance of resistance R4, and resistance R3 selects identical with the resistance of resistance R1
Time, equation (3) can be replaced into again:
VH-I1 × (R4+R1)-VSG (M1)=VOUT (4)
Can be rearranged as after equation (1) is inserted in equation (4):
VH-VCC=VOUT (5)
According to equation (5) can the magnitude of voltage of this VD VOUT be this direct voltage source VH with
The voltage difference of this direct voltage source VCC.
In application, the low dropout voltage regulator 200 of the present invention can be as the voltage level conversion promoting output stage
The bias circuit of device (level shifter).Fig. 4 shows the output buffer combining one embodiment of the invention
The block schematic diagram of (output buffer) 400.With reference to Fig. 4, this output buffer 400 comprise an output stage 42,
Voltage level shifter 44 and 46 and this low dropout voltage regulator 200.It is brilliant that this output stage 42 comprises a PMOS
A body pipe MP and nmos pass transistor MN.The source electrode of this PMOS transistor MP is electrically connected to unidirectional current
Potential source VH, and the source electrode of this nmos pass transistor MN is electrically connected to earth terminal.
This voltage level shifter 44 is used for receiving input signal IN that voltage amplitude is VCC to 0V, so as to
Drive nmos pass transistor MN.This voltage level shifter 46 be used for receiving voltage amplitude be VH extremely
Input signal IN of VH-VCC, so as to driving this PMOS transistor MP.This DC voltage in this example
The voltage level of the source VH voltage level higher than this direct voltage source VCC.Such as, this direct voltage source
The voltage level of VH can be 12V, and the voltage level of this direct voltage source VCC can be 5V.
Operationally, when input signal IN is logical zero (in this example for 0V), this voltage level shifter
44 outputs logic 1 signal (being 5V in this example) so that this nmos pass transistor MN turns on.Meanwhile, should
Voltage level shifter 46 exports logic 1 signal (in this example for 12V) so that this PMOS transistor MP
Cut-off.Therefore, the exportable logic zero signal of this output buffer 400.
Otherwise, when input signal IN is logic 1 (in this example for 5V), this voltage level shifter 44 is defeated
Go out logic zero signal (in this example for 0V) so that this nmos pass transistor MN ends.Meanwhile, this voltage
Level translator 46 exports logic zero signal (in this example for 7V) so that this PMOS transistor MP turns on.
Therefore, exportable logic 1 signal of this output buffer 400, but voltage level is converted to 12V by 5V.
When input signal IN is converted to logic 1 signal by logic zero signal, this voltage level shifter 46 palpus
Output it signal V1 and be pulled down to VH-VCC by amplitude VH.Therefore, this low dropout voltage regulator 200 can be borrowed
Thered is provided by its interior nmos pass transistor MX (with reference to Fig. 3) and fill (sink) electric current IS, so as to the voltage of drop-down V1
Level.This low dropout voltage regulator 200 is due to this amplifying unit 22, this trnasducing element 24 and this current replication
The negative feedback loop that unit 26 is formed, can effectively control output voltage VO UT be this direct voltage source VH with
The voltage difference of this direct voltage source VCC.
The technology contents of the present invention and technical characterstic are disclosed as above, but those of ordinary skill in the art
Still it is potentially based on teachings of the present invention and disclosure and makees all replacements without departing substantially from spirit of the present invention and modification.
Therefore, protection scope of the present invention should be not limited to embodiment disclosure of that, and should include various not carrying on the back
From replacement and the modification of the present invention, and contained by claims.
Claims (10)
1. a low dropout voltage regulator, including:
One first input end, is electrically connected to one first direct voltage source；
One second input, is electrically connected to one second direct voltage source；
One outfan, in order to produce a VD；
One amplifying unit, it is for receiving a reference voltage and a feedback voltage to produce a direct current output electricity
It is depressed into this outfan；
One trnasducing element, is electrically connected to this first input end, and this trnasducing element is for according to this reference electricity
Pressure is to produce one first electric current；
One first resistance, it is used for receiving this first electric current to produce this reference voltage；
One current replication unit, is electrically connected to this second input, and this current replication unit is used for basis
This feedback voltage is to produce one second electric current and one the 3rd electric current；
One second resistance, it is used for receiving this second electric current to produce this feedback voltage；And
One the 3rd resistance, is electrically connected between this current replication unit and this outfan, the 3rd resistance
For receiving the 3rd electric current to produce this VD；
Wherein, the magnitude of voltage of this second direct voltage source is more than the magnitude of voltage of this first direct voltage source.
Low dropout voltage regulator the most according to claim 1, wherein this amplifying unit includes:
One power transistor, its drain electrode is electrically connected to this outfan；And
One operational amplifier, it is used for receiving this reference voltage with this feedback voltage to drive this power crystal
One grid of pipe.
Low dropout voltage regulator the most according to claim 1, wherein this trnasducing element includes:
One the 3rd resistance, is electrically connected to this first input end；
One the first transistor, its source electrode is electrically connected to the 3rd resistance, its grid be electrically connected to this
One resistance；And
One transistor seconds, its source electrode is electrically connected to a drain electrode of this first transistor, its grid in order to
Receive a bias voltage, and its drain electrode is electrically connected to this first resistance.
Low dropout voltage regulator the most according to claim 3, wherein this current replication unit includes:
One the 3rd resistance, is electrically connected to this second input；
One the first transistor, its source electrode is electrically connected to the 3rd resistance；
One transistor seconds, its source electrode is electrically connected to a drain electrode of this first transistor, and its drain electrode electricity
Gas is connected to this second resistance；
One the 4th resistance, is electrically connected to this second input；
One third transistor, its source electrode is electrically connected to the 4th resistance, its grid be electrically connected to this
One grid of one transistor；And
One the 4th transistor, its source electrode is electrically connected to a drain electrode of this third transistor, and its drain electrode electricity
Gas is connected to this grid of the 3rd resistance and this third transistor.
Low dropout voltage regulator the most according to claim 4, wherein this first resistance, this second resistance and should
The resistance of the 3rd resistance is substantially the same.
Low dropout voltage regulator the most according to claim 5, wherein the 3rd resistance in this trnasducing element with
And the resistance of the 3rd resistance in this current replication unit and the 4th resistance is substantially the same, and this turn
Lead this first transistor in unit and this first transistor in this current replication unit and the 3rd crystal
The size of pipe is substantially the same.
Low dropout voltage regulator the most according to claim 6, wherein flows through this first resistance, this second resistance
It is substantially the same with the electric current of the 3rd resistance.
Low dropout voltage regulator the most according to claim 7, wherein the magnitude of voltage essence of this VD
The magnitude of voltage of this first direct voltage source is deducted equal to the magnitude of voltage of this second direct voltage source.
9. an output buffer, including:
Low dropout voltage regulator as claimed in claim 1, its be electrically connected to this first direct voltage source and this second
Direct voltage source, this low dropout voltage regulator is in order to produce this VD, and its magnitude of voltage is substantially equal to
The magnitude of voltage of this second direct voltage source deducts the magnitude of voltage of this first direct voltage source；
One voltage level shifter, it is by this output of this second direct voltage source He this low dropout voltage regulator
End power supply；And
One output transistor, its source electrode is electrically connected to this second direct voltage source, and its grid electrically connects
It is connected to this voltage level shifter.
Output buffer the most according to claim 9, wherein flow through this first resistance, this second resistance and
The electric current of the 3rd resistance is substantially the same.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510272365.4A CN106292815B (en) | 2015-05-26 | 2015-05-26 | Low dropout voltage regulator and the output buffer comprising low dropout voltage regulator |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510272365.4A CN106292815B (en) | 2015-05-26 | 2015-05-26 | Low dropout voltage regulator and the output buffer comprising low dropout voltage regulator |
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| Publication Number | Publication Date |
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| CN106292815A true CN106292815A (en) | 2017-01-04 |
| CN106292815B CN106292815B (en) | 2018-05-08 |
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| CN201510272365.4A Active CN106292815B (en) | 2015-05-26 | 2015-05-26 | Low dropout voltage regulator and the output buffer comprising low dropout voltage regulator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110325942A (en) * | 2017-02-27 | 2019-10-11 | ams国际有限公司 | Low dropout regulator with output and input capability |
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| US20050029995A1 (en) * | 2003-08-07 | 2005-02-10 | Jamel Benbrik | Zero tracking for low drop output regulators |
| CN101162893A (en) * | 2006-10-13 | 2008-04-16 | 联发科技股份有限公司 | Variable gain amplifiers |
| CN101303609A (en) * | 2008-06-20 | 2008-11-12 | 北京中星微电子有限公司 | Low pressure difference voltage regulator with low load regulation rate |
| US20090033298A1 (en) * | 2007-08-01 | 2009-02-05 | Zerog Wireless, Inc. | Voltage regulator with a hybrid control loop |
| CN102375465A (en) * | 2010-08-13 | 2012-03-14 | 联咏科技股份有限公司 | Linear voltage regulator and current sensing circuit thereof |
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2015
- 2015-05-26 CN CN201510272365.4A patent/CN106292815B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050029995A1 (en) * | 2003-08-07 | 2005-02-10 | Jamel Benbrik | Zero tracking for low drop output regulators |
| CN101162893A (en) * | 2006-10-13 | 2008-04-16 | 联发科技股份有限公司 | Variable gain amplifiers |
| US20090033298A1 (en) * | 2007-08-01 | 2009-02-05 | Zerog Wireless, Inc. | Voltage regulator with a hybrid control loop |
| CN101303609A (en) * | 2008-06-20 | 2008-11-12 | 北京中星微电子有限公司 | Low pressure difference voltage regulator with low load regulation rate |
| CN102375465A (en) * | 2010-08-13 | 2012-03-14 | 联咏科技股份有限公司 | Linear voltage regulator and current sensing circuit thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110325942A (en) * | 2017-02-27 | 2019-10-11 | ams国际有限公司 | Low dropout regulator with output and input capability |
| US10691152B2 (en) | 2017-02-27 | 2020-06-23 | Ams International Ag | Low-dropout regulator having sourcing and sinking capabilities |
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| Publication number | Publication date |
|---|---|
| CN106292815B (en) | 2018-05-08 |
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