CN106291102A - A kind of Frequency Standard Comparison device and method - Google Patents
A kind of Frequency Standard Comparison device and method Download PDFInfo
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- CN106291102A CN106291102A CN201610648402.1A CN201610648402A CN106291102A CN 106291102 A CN106291102 A CN 106291102A CN 201610648402 A CN201610648402 A CN 201610648402A CN 106291102 A CN106291102 A CN 106291102A
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
- G01R23/10—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage by converting frequency into a train of pulses, which are then counted, i.e. converting the signal into a square wave
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
- G01R23/12—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage by converting frequency into phase shift
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Abstract
The present invention proposes a kind of Frequency Standard Comparison device and method based on FPGA, there is the technical problem that response time length, precision and resolution are low in existing Frequency Standard Comparison device and method for solving, Frequency Standard Comparison device, including frequency synthesis module, Signal-regulated kinase, Phase coincidence detection module, phase coincidence point demarcating module and frequency marking computing module；Comparing method for frequency standard implements step: obtain mediated signal, and agency signal, reference signal and measured signal carry out signal condition respectively, obtains the square-wave signal of correspondence；Intermediary's square-wave signal is carried out Phase coincidence detection with reference to square-wave signal and tested square-wave signal respectively, and testing result is converted to time interval counter value, demarcate carrying out testing result simultaneously；Count value and calibration result being inputted frequency marking computing module calculate, obtain Frequency Standard Comparison result, the response of the present invention is real-time, and precision and resolution are high, can be used for atomic frequency standard accuracy and stable measurement.
Description
Technical field
The invention belongs to time and frequency measurement field, relate to a kind of Frequency Standard Comparison device and method, can be used for atomic frequency standard
Frequency accuracy and stable measurement.
Background technology
Frequency Standard Comparison technology relates to Aero-Space, navigator fix, defence clcctronic technology, Communication Engineering, electronic machine, sky
Numerous chronometer times and the fields of frequency observation and control technology such as literary composition and metering, and the comparison technology between frequency standard is to ensure that this
The basic technology of a little high and new technology development.Along with the development of atomic frequency standard and reaching its maturity of production technology, the frequency of atomic frequency standard
Rate accuracy and degree of stability steadily improve, and manufacturing cost constantly reduces, and the range of application of atomic frequency standard expands the most rapidly.In order to enable
Enough effects more preferably, broadly playing these frequency markings, the most more come high accuracy, the demand of high-resolution Frequency Standard Comparison technology
The most urgent.
Traditional comparing method for frequency standard mainly has following several: phase place Comparison Method, oscilloscope method, frequency difference multiplication method, difference frequency
Periodic method and time difference method etc., wherein frequency difference multiplication method, difference frequency periodic method, time difference method and phase place Comparison Method can obtain higher ratio
To resolution and comparison accuracy.Although the comparison resolution of phase place Comparison Method is higher, but the response time of comparison is oversize, and
There is obvious blind area and inelastic region, be suitable only for the measurement of long-term objective；Frequency difference multiplication method to realize structure complicated,
And using a large amount of doubler, frequency mixer and frequency-selecting circuit, the source of additional noise is the most, so cost is high and comparison divides
The raising limited potential of resolution；Difference frequency periodic method low-frequency mixer to be used and low pass filter etc., can introduce additional noise,
The raising of comparison resolution is all limited to the noise of frequency mixer；Time difference method to realize structure the most more complicated, used many equally
Individual frequency mixer, low pass filter and zero-crossing detector, so the raising of comparison resolution is the most limited.
Traditional comparing method for frequency standard also exists that comparison resolution is low and the problem such as comparison response time is longer, in numerous sections
Under the unremitting effort of skilled worker author, have developed some comparison resolution higher, the Frequency Standard Comparison side that comparison response time is shorter
Method.Current widely used method is double mixing time difference methods.Traditional double mixing time difference methods, first, utilize frequency synthesis
Device produces intermediary's frequency signal；Secondly, intermediary's frequency signal is delivered to reference signal and measured signal respectively two double flat weighing apparatuses
The input of frequency mixer, and obtain two-way difference frequency signal by output signal is carried out low-pass filtering；It follows that to two difference frequencies
Signal carries out zero passage detection respectively, and using testing result as the commencing signal of counting gate and end signal, produces meter
Number gate；Then, utilize time-interval counter in counting gate time, reference signal is counted, obtains count results；?
Eventually, utilize count results to calculate, obtain Frequency Standard Comparison result.The Frequency Standard Comparison result that profit obtains in this way, its resolution
Depend on the frequency of difference frequency signal and the ratio of reference signal frequency, owing to the frequency of difference frequency signal is far smaller than reference frequency,
Therefore the Frequency Standard Comparison result using the method to obtain has higher comparison resolution, and owing to the method uses double mixing
Mode carries out frequency difference acquisition, and therefore the comparison response time of the method is the shortest.But this method has obvious defect, i.e. adopts
With analog devices such as frequency mixer, filter circuit and zero-crossing detectors, introduce substantial amounts of additional noise, cause comparison resolution
Raising with comparison accuracy is restricted by device precision.
In recent years, many researchers make improvements on the basis of traditional double mixing time difference methods, it is proposed that
Some new Frequency Standard Comparison device and methods.Such as, king sea 2007 is entitled " accurate time and frequency measurement and control technical research "
Thesis for the doctorate in propose a high resolution frequency standard comparison device based on equivalent phase demodulation frequency, in this Frequency Standard Comparison device
Including, for producing the common frequency source of intermediary's frequency signal；FPGA, including two Phase coincidence detection modules, a counting
Gate generation module, a delay control module and a time interval counter module, for indirectly to measured signal and ginseng
Examine signal and carry out Phase coincidence detection, and testing result is converted to time interval counter value；Microprocessor, is used for calculating frequency marking
The result of comparison；LCD, for showing the result of Frequency Standard Comparison.Should high resolution frequency standard ratio based on equivalent phase demodulation frequency
Use FPGA to obtain the phase coincidence point bunch between reference signal and measured signal device, improve frequency ratio to resolution and
While comparison accuracy, it is effectively shortened the response time of Frequency Standard Comparison.But owing to this Frequency Standard Comparison device directly utilizes
The phase coincidence point bunch arrived, as the counting commencing signal of gate and end signal, can bring counting error, thus to frequency marking ratio
Result is brought error；The comparison accuracy of this Frequency Standard Comparison device and comparison resolution depend on the essence of Phase coincidence detection too much
Degree, and Phase coincidence detection is due to its detection circuit or the restriction of device fulfillment capability, it is difficult to reach the highest accuracy of detection, and
And cause the precision and resolution being difficult to improve Frequency Standard Comparison further.And this Frequency Standard Comparison device have employed delays time to control
Module, causes the real-time of comparison to need further and improves.
Summary of the invention
It is an object of the invention to the defect overcoming above-mentioned prior art to exist, it is proposed that a kind of frequency marking ratio based on FPGA
To device and method, for solving, comparison accuracy that existing Frequency Standard Comparison device and method based on FPGA exists is the highest and comparison
The technical problem that resolution is the highest.
To achieve these goals, the technical scheme that the present invention takes is:
A kind of Frequency Standard Comparison device, including frequency synthesis module, Signal-regulated kinase, Phase coincidence detection module, counting
Gate generation module, time interval counter module and frequency marking computing module, wherein:
Frequency synthesis module, is used for producing mediated signal；
Signal-regulated kinase, including reference signal modulate circuit, measured signal modulate circuit and mediated signal modulate circuit,
For respectively reference signal, measured signal and mediated signal being filtered shaping；
Phase coincidence detection module, overlaps including first phase coincidence detection module and second phase and detects generation module,
For the signal of shaping after filtering is carried out Phase coincidence detection, and output detections result；
Counting gate generation module, utilizes the Phase coincidence detection result obtained to produce counting gate；
Time interval counter module, for being greatest common factor (G.C.F.) frequency integral multiple to frequency in the counting gate of output
Square-wave signal counts, and exports count value；
Frequency marking computing module, is used for calculating Frequency Standard Comparison result；
It is characterized in that: described first phase coincidence detection module, including first phase coincidence point bunch generation module and
One phase coincidence point detection module, the outfan of described first phase coincidence point detection module connects first phase coincidence point mark
Cover half block；Described second phase coincidence detection module, including second phase coincidence point bunch generation module and second phase coincidence point
Detection module, the outfan of described second phase coincidence point detection module connects second phase coincidence point demarcating module；Described
Counting gate generation module includes the first counting gate generation module and the second counting gate generation module；Described time interval meter
Digital-to-analogue block includes very first time gap count module and the second time interval counter module.
Above-mentioned first phase coincidence point bunch generation module, second phase coincidence point bunch generation module, first phase coincidence point
Detection module, second phase coincidence point detection module, the first counting gate generation module, the second counting gate generation module, the
One time interval counter module, the second time interval counter module and frequency marking computing module are all built inside FPGA.
Above-mentioned first phase coincidence point demarcating module and second phase coincidence point demarcating module, all include that one is sequentially connected
Frequency departure device and ADC chip；Frequency departure device, for producing the sinusoidal letter that frequency is greatest common factor (G.C.F.) frequency integral multiple
Number；ADC chip, for demarcating effective phase coincidence point.
Above-mentioned ADC chip, the effective phase coincidence point control exported by phase coincidence point detection module, is maximum to frequency
The sinusoidal signal of common factor frequency integral multiple is sampled, thus completes the demarcation to effective phase coincidence point.
A kind of comparing method for frequency standard, comprises the steps of
Step 1, utilizes reference signal, carries out frequency synthesis, obtains mediated signal；
Step 2, carries out signal condition respectively to reference signal, measured signal and mediated signal, obtains with reference to square-wave signal
fR, tested square-wave signal fxWith intermediary square-wave signal f0；
Step 3, utilizes and quantifies phase shift principle, agency square-wave signal f0Respectively with reference square-wave signal fRWith square wave to be measured
Signal fxCarry out Phase coincidence detection, obtain first via phase coincidence point bunch A and the second road phase coincidence point bunch B；
Step 4, utilizes detection to trigger circuit, effective to each phase coincidence point in first via phase coincidence point bunch A
Property detects, it is judged that whether these phase coincidence points are effective, if so, export effective phase coincidence point C, if it is not, abandon
These phase coincidence points；, the effectiveness of each phase coincidence point in the second road phase coincidence point bunch B is detected meanwhile,
Judge whether these phase coincidence points are effective, if so, export effective phase coincidence point D, if it is not, abandon these phase coincidences
Point；
Step 5, utilizes pulse-generating circuit, is divided by two adjacent effective phase coincidence points in effective phase coincidence point C
Not as commencing signal and the end signal of counting gate, produce counting gate Δ tC；Meanwhile, by effective phase coincidence point D
Two adjacent effective phase coincidence points, respectively as the commencing signal of counting gate and end signal, produce counting gate Δ
tD；
Step 6, at the counting gate Δ t of outputCIn, it is with reference to square-wave signal f to frequencyRWith intermediary square-wave signal f0's
Greatest common factor (G.C.F.) frequency fmaxc1NCSquare-wave signal again counts, and obtains count value mC；Meanwhile, at the counting gate of output
ΔtDIn, it is tested square-wave signal f to frequencyxWith intermediary square-wave signal f0Greatest common factor (G.C.F.) frequency fmaxc2NDSquare wave again
Signal counts, and obtains count value mD, wherein nCAnd nDIt is positive integer；
Step 7, while carrying out step (6), to conduct counting gate Δ t in step (5)CCommencing signal and end
Effective phase coincidence point of signal is demarcated, and obtains counting gate Δ tCThe sinusoidal signal range value that start time is corresponding
VC_sta, the sinusoidal signal range value V corresponding with its finish timeC_end；Meanwhile, to conduct counting gate Δ t in step (5)D's
Effective phase coincidence point of commencing signal and end signal is demarcated, and obtains counting gate Δ tDThe sine that start time is corresponding
Signal amplitude value VD_sta, the sinusoidal signal range value V corresponding with its finish timeD_end；
Step 8, according to calibration result VC_staAnd VC_end, utilize arcsine formula count value mCOffset Δ mC；
According to calibration result VD_staAnd VD_end, utilize arcsine formula count value mDOffset Δ mD；
Step 9, calculates measured signal fxWith reference signal fRBetween relative frequency difference, obtain Frequency Standard Comparison result, computing formula
For:
The present invention compared with prior art, has the advantage that
1. due to the fact that during Frequency Standard Comparison result calculates, utilize the count value that time-interval counter obtains
Calibration result with utilizing phase coincidence point demarcating module to obtain, simultaneously participates in calculating, it is achieved that compensation and the school to count value
Standard, compared with prior art, has been significantly increased precision and the resolution of Frequency Standard Comparison.
2. due to the fact that during producing counting gate, utilize the phase coincidence point detection module phase place to obtaining
Phase coincidence point in coincidence point bunch has carried out validation checking, and testing result is produced as commencing signal and end signal
Precision higher counting gate, the phase coincidence point bunch that directly utilizes used with prior art produces the method phase of counting gate
Ratio, is effectively improved the precision of Frequency Standard Comparison.
3. due to the fact that during producing counting gate, utilize two-way Phase coincidence detection result by two meters
Number gate generation module produces the counting gate of two-way independence respectively, uses delay control module to control one in prior art
Counting gate generation module, produces a road counting gate according to two-way Phase coincidence detection result and compares, improving Frequency Standard Comparison
Precision while, be effectively shortened the response time of comparison, improve comparison response real-time.
Accompanying drawing explanation
Fig. 1 is the overall structure schematic diagram of Frequency Standard Comparison device of the present invention；
Fig. 2 be comparing method for frequency standard of the present invention realize FB(flow block)；
Fig. 3 is the schematic diagram that the present invention carries out effective phase coincidence point demarcation.
Detailed description of the invention
Below in conjunction with drawings and Examples, the present invention is described in further detail:
With reference to Fig. 1, the mark comparison device of the present invention, including frequency synthesis module, Signal-regulated kinase, Phase coincidence detection
Module, counting gate generation module, time interval counter module and frequency marking computing module.
Frequency synthesis module, is used for obtaining mediated signal.For simplifying apparatus structure, reduce cost, in the present embodiment, use
In high precision, the common frequency source of high stability replace frequency synthesizer, carry out generation and the acquisition of mediated signal.Utilize high stable
Selected common frequency source is locked by the reference signal of degree, thus obtains intermediary's frequency signal.So that acquired intermediary
Frequency signal and reference signal have identical frequency stability, but its frequency is equal with reference signal frequency and measured signal frequency
There is certain difference.
Signal-regulated kinase, including reference signal conditioning module, measured signal conditioning module and intermediary's frequency signal conditioning
Module, for being filtered shaping to reference signal, measured signal and intermediary's frequency signal respectively.In order to carry out phase place easily
Overlap detection, first with comprising the Signal-regulated kinase of plastic filter circuit in the present embodiment, to reference signal, measured signal and
Intermediary's frequency signal is filtered shaping respectively, obtains regular square-wave signal.
Phase coincidence detection module, overlaps including first phase coincidence detection module and second phase and detects generation module,
For the signal of two shapings after filtering is carried out Phase coincidence detection, and output detections result.Wherein, first phase overlaps
Detection module, including first phase coincidence point bunch generation module and first phase coincidence point detection module；First phase coincidence point
Bunch generation module, for intermediary's square-wave signal is carried out Phase coincidence detection with reference to square-wave signal respectively, obtains first via phase
Position coincidence point bunch A；First phase coincidence point detection module, for each in the first via phase coincidence point bunch A obtained
Phase coincidence point carries out validation checking, and effective phase coincidence point C that output detections obtains respectively.Wherein, second phase weight
Close detection module, including second phase coincidence point bunch generation module and second phase coincidence point detection module；Second phase overlaps
Point bunch generation module, for intermediary's square-wave signal is carried out Phase coincidence detection respectively with tested square-wave signal, obtains the second tunnel
Phase coincidence point bunch B；Second phase coincidence point detection module, each in the second road phase coincidence point bunch B obtained
Individual phase coincidence point carries out validation checking, and effective phase coincidence point D that output detections obtains respectively.In phase in the present embodiment
After the coincidence point bunch generation module of position, add phase coincidence point detection module, be used for every to obtain in phase coincidence point bunch
One phase coincidence point carries out validation checking, thus improves the degree of accuracy of Phase coincidence detection result further.
Counting gate generation module, including the first counting gate generation module and second counting gate generation module, first
Counting gate generation module is for using effective phase coincidence point adjacent for two in effective phase coincidence point C as counting
The commencing signal of gate and end signal, produce counting gate Δ tC, meanwhile, the second counting gate generation module is for by effectively
Two adjacent effective phase coincidence points in phase coincidence point D respectively as the counting commencing signal of gate and end signal,
Produce counting gate Δ tD.The present embodiment utilizes two-way Phase coincidence detection result, produces two mutual independent meters simultaneously
Number gates, it is to avoid interfering with each other between two-way Phase coincidence detection result, improve the precision of counting gate.Producing meter
During number gate, the present embodiment does not use delay control module it is intervened, significantly shorten the sound of comparison
Between Ying Shi, improve the real-time of comparison.
Time interval counter module, including very first time gap count module and the second time interval counter module, first
Time interval counter module is at counting gate Δ tCIn, agency square-wave signal counts, and obtains count value mC, meanwhile,
Second time interval counter module is at counting gate Δ tDIn, agency square-wave signal counts, and obtains count value mD。
Phase coincidence point demarcating module, including first phase coincidence point demarcating module and second phase coincidence point calibration mold
Block.Wherein, first phase coincidence point demarcating module comprises first frequency deviation generator and an ADC chip；First frequency is inclined
Difference generator, for producing greatest common factor (G.C.F.) frequency f that frequency is mediated signal and reference signalmaxc1The sinusoidal letter of integral multiple
Number；Oneth ADC chip, for as counting gate Δ tCCommencing signal and effective phase coincidence point of end signal carry out
Demarcate, obtain calibration result VC_staAnd VC_end, then calibration result is sent into frequency marking computing module；Second phase coincidence point mark
Cover half block comprises second frequency deviation generator and the 2nd ADC chip；Second frequency deviation generator, is used for producing during frequency is
Greatest common factor (G.C.F.) frequency f of Jie's signal and measured signalmaxc2The sinusoidal signal of integral multiple；2nd ADC chip, by as based on
Number gate Δ tDCommencing signal and effective phase coincidence point of end signal demarcate, obtain calibration result VD_staWith
VD_end, then calibration result is sent into frequency marking computing module.In the present embodiment, frequency is the maximum of mediated signal and reference signal
Common factor frequency fmaxc1The sinusoidal signal of integral multiple and greatest common factor (G.C.F.) frequency f that frequency is mediated signal and measured signalmaxc2
The sinusoidal signal of integral multiple is the sinusoidal signal that frequency is mediated signal frequency.The meter in the present embodiment, calibration result carried out
Calculate mainly arcsine to calculate, obtain the detection moment of effective phase coincidence point, thus time interval counter module is obtained
Count value compensates and calibrates, it is possible to be greatly improved resolution and the degree of accuracy of Frequency Standard Comparison.
Frequency marking computing module, the count value utilizing output and the calibration result obtained, carry out the calculating of Frequency Standard Comparison result.
In the present embodiment, above-mentioned Phase coincidence detection module, counting gate generation module, time interval counter module and
Frequency marking computing module, all builds inside FPGA.In the present embodiment, FPGA selects Xilinx Virtex-6 series 240T chip,
Its price comparison is cheap, and logical resource is entirely capable of meeting requirement.
With reference to Fig. 2, the comparing method for frequency standard of the present invention is achieved by the steps of:
Step 1. obtains mediated signal；
Utilize the reference signal locking frequency synthesizer of high stability, produce and obtain mediated signal.Use this side
Formula, the mediated signal got and reference signal have an identical frequency stability, and require the mediated signal that gets with
There is between reference signal and measured signal certain frequency-splitting.
Step 2. carries out signal condition respectively to reference signal, measured signal and the mediated signal obtained, and obtains correspondence
Square-wave signal；
Reference signal, measured signal and the mediated signal obtained are filtered shaping respectively, obtain regular reference side
Ripple signal fR, tested square-wave signal fxWith intermediary square-wave signal f0。
The step 3. intermediary square-wave signal f to obtaining0Respectively with the reference square-wave signal f obtainedRWith the tested square wave obtained
Signal fxCarry out Phase coincidence detection, obtain Phase coincidence detection result；
Utilize and quantify phase shift principle, to the intermediary square-wave signal f obtained0Respectively with the reference square-wave signal f obtainedRWith
The tested square-wave signal f arrivedxCarry out Phase coincidence detection, obtain first via phase coincidence point bunch A and the second road phase coincidence point
Bunch B.According to quantitative phase principle, within a least common multiple one number time, carrying out should between two signals of Phase coincidence detection
When only one of which phase coincidence point, but, in implementation process, owing to being limited by Phase coincidence detection circuit realiration ability
System, the phase coincidence point obtained is cluster cluster.Detection is utilized to trigger circuit, to the first via phase coincidence point bunch A obtained
In the effectiveness of each phase coincidence point detect, it is judged that whether these phase coincidence points are effective, i.e. judge these phases
Can position coincidence point detection trigger trigger circuit, if can, detection triggers circuit and produces output signal, as effective phase coincidence
Point C, if it is not, detection triggers circuit just will not produce output, so that these invalid phase coincidence points are dropped；Meanwhile, right
The effectiveness of each phase coincidence point in the second road phase coincidence point bunch B obtained detects, it is judged that these phase coincidences
Whether point is effective, i.e. judges that can these phase coincidence points detection trigger trigger circuit, if can, detection triggers circuit and produces defeated
Go out signal, as effective phase coincidence point D, if it is not, detection triggers circuit just will not produce output, so that these are invalid
Phase coincidence point is dropped.
Phase coincidence detection result is converted to count value by step 4., obtains count value；
Utilize pulse-generating circuit, using two adjacent effective phase coincidence points in effective phase coincidence point C as
The commencing signal of counting gate and end signal, produce counting gate Δ tC；Meanwhile, by two phases in effective phase coincidence point D
Adjacent effective phase coincidence point, respectively as the commencing signal of counting gate and end signal, produces counting gate Δ tD.Defeated
The counting gate Δ t gone outCIn, it is with reference to square-wave signal f to frequencyRWith intermediary square-wave signal f0Greatest common factor (G.C.F.) frequency fmaxc1
NCSquare-wave signal again counts, and obtains count value mC；Meanwhile, at the counting gate Δ t of outputDIn, it is tested to frequency
Square-wave signal fxWith intermediary square-wave signal f0Greatest common factor (G.C.F.) frequency fmaxc2NDSquare-wave signal again counts, and is counted
Numerical value mD, wherein nCAnd nDIt is positive integer.
In the present embodiment, the rising edge of rising edge with counting gate in order to make count target overlaps, and improves time interval
The degree of accuracy of counting module count value, makes nCValue be f0/fmaxc1,nDValue be f0/fmaxc2, i.e. frequency be grand duke because of
Sub-frequency fmaxc1NCSquare-wave signal again and frequency are greatest common factor (G.C.F.) frequency fmaxc2NDSquare-wave signal again is intermediary
Square-wave signal.
Phase coincidence detection result is demarcated by step 5., obtains calibration result；
While carrying out step 4, the first via Phase coincidence detection result obtained is demarcated, obtain counting gate
ΔtCThe sinusoidal signal range value V that start time is correspondingC_sta, the sinusoidal signal range value V corresponding with its finish timeC_end；With
Time, the second road Phase coincidence detection result obtained is demarcated, obtains counting gate Δ tDThe sine that start time is corresponding
Signal amplitude value VD_sta, the sinusoidal signal range value V corresponding with its finish timeD_end.The calibration principle of the present embodiment such as Fig. 3
Shown in.
Step 6. calculates Frequency Standard Comparison result；
Utilize the count value and calibration result obtained, calculate measured signal and the relative frequency difference between reference signal, obtain frequency
Mark comparison result, computing formula is:
Wherein, Δ mCWith Δ mDIt is respectively count value mCWith count value mDOffset, its computing formula is respectively as follows:
ΔmC=Δ kC×ΔT ②
ΔmD=Δ kD×ΔT ③
Wherein, Δ kCFor as counting gate Δ tCDuring the detection of effective phase coincidence point of commencing signal and end signal
The inconsistent amount being engraved in phase coincidence point bunch, Δ kDFor as counting gate Δ tDCommencing signal and effective phase of end signal
The inconsistent amount that is engraved in phase coincidence point bunch during the detection of position coincidence point, TxFor with reference to square-wave signal fxCycle, T0For intermediary
Square-wave signal f0Cycle, TRFor with reference to square-wave signal fRCycle.
Will 2., 3. bring formula into 1., can obtain:
With reference to Fig. 3, the comparison accuracy in the present embodiment depends on being engraved in two-way during the detection of the effective phase coincidence point of two-way
The inconsistent degree of position in phase coincidence point bunch.In order to obtain this inconsistent amount, the present embodiment utilizes effective phase place
Being engraved in frequency during the detection of coincidence point is greatest common factor (G.C.F.) frequency fmaxThe sinusoidal signal of n times on demarcation represent corresponding
Effectively phase coincidence point position in its bunch, thus obtain this inconsistent amount.Above-mentioned demarcation is by frequency being maximum
The sinusoidal signal of n times of common factor frequency is sampled, and obtains effective phase coincidence point detection sinusoidal signal width corresponding to moment
Angle value and realize, then, through the necessary calculating based on arcsine formula, the detection of effective phase coincidence point can be obtained
Time the inconsistent amount Δ k that is engraved in phase coincidence point bunch.
Above description is only example of the present invention, it is clear that for those skilled in the art, is understanding
After present disclosure and principle, all may carry out form and details in the case of without departing substantially from the principle of the present invention, structure
On various corrections and change, but these corrections based on inventive concept and change still the present invention claim protect
Within the scope of.
Claims (7)
1. a Frequency Standard Comparison device, including frequency synthesis module, Signal-regulated kinase, Phase coincidence detection module, counting lock
Door generation module, time interval counter module and frequency marking computing module, wherein:
Frequency synthesis module, is used for producing mediated signal；
Signal-regulated kinase, including reference signal conditioning module, measured signal conditioning module and mediated signal conditioning module, is used for
Respectively reference signal, measured signal and mediated signal are filtered shaping；
Phase coincidence detection module, overlaps including first phase coincidence detection module and second phase and detects generation module, be used for
The signal of shaping after filtering is carried out Phase coincidence detection, and output detections result；
Counting gate generation module, utilizes the Phase coincidence detection result obtained to produce counting gate；
Time interval counter module, is used in the counting gate of output the square wave that frequency is greatest common factor (G.C.F.) frequency integral multiple
Signal counts, and exports count value；
Frequency marking computing module, is used for calculating Frequency Standard Comparison result；
It is characterized in that: described first phase coincidence detection module, including first phase coincidence point bunch generation module and the first phase
Position coincidence point detection module, the outfan of described first phase coincidence point detection module connects first phase coincidence point calibration mold
Block；Described second phase coincidence detection module, detects including second phase coincidence point bunch generation module and second phase coincidence point
Module, the outfan of described second phase coincidence point detection module connects second phase coincidence point demarcating module；Described counting
Gate generation module includes the first counting gate generation module and the second counting gate generation module；Described time interval counter mould
Block includes very first time gap count module and the second time interval counter module.
Frequency Standard Comparison device the most according to claim 1, it is characterised in that: described first phase coincidence point bunch generates mould
Block, second phase coincidence point bunch generation module, first phase coincidence point detection module, second phase coincidence point detection module,
One counting gate generation module, the second counting gate generation module, very first time gap count module, the second time interval counter
Module and frequency marking computing module are all built inside FPGA.
Frequency Standard Comparison device the most according to claim 1, it is characterised in that: described first phase coincidence point demarcating module and
Second phase coincidence point demarcating module, all includes a frequency departure device being sequentially connected and ADC chip；Frequency departure device, uses
In producing the sinusoidal signal that frequency is greatest common factor (G.C.F.) frequency integral multiple；ADC chip, for carrying out effective phase coincidence point
Demarcate.
Frequency Standard Comparison device the most according to claim 3, it is characterised in that: described ADC chip, is detected by phase coincidence point
Effective phase coincidence point control of module output, is that the sinusoidal signal of greatest common factor (G.C.F.) frequency integral multiple is sampled to frequency,
Thus complete the demarcation to effective phase coincidence point.
5. a comparing method for frequency standard, comprises the steps of
(1) utilize reference signal, carry out frequency synthesis, obtain mediated signal；
(2) reference signal, measured signal and mediated signal are carried out respectively signal condition, obtain with reference to square-wave signal fR, tested side
Ripple signal fxWith intermediary square-wave signal f0；
(3) quantization phase shift principle, agency square-wave signal f are utilized0Respectively with reference square-wave signal fRWith square-wave signal f to be measuredxEnter
Line phase overlaps and detects, and obtains first via phase coincidence point bunch A and the second road phase coincidence point bunch B；
(4) utilize detection to trigger circuit, the effectiveness of each phase coincidence point in first via phase coincidence point bunch A is examined
Survey, it is judged that whether these phase coincidence points are effective, if so, export effective phase coincidence point C, if it is not, abandon these phase places
Coincidence point；Meanwhile, the effectiveness of each phase coincidence point in the second road phase coincidence point bunch B is detected, it is judged that these
Whether phase coincidence point is effective, if so, exports effective phase coincidence point D, if it is not, abandon these phase coincidence points；
(5) pulse-generating circuit is utilized, using two adjacent effective phase coincidence points in effective phase coincidence point C as meter
The commencing signal of number gate and end signal, produce counting gate Δ tC；Meanwhile, adjacent by effective phase coincidence point D two
Effective phase coincidence point respectively as the counting commencing signal of gate and end signal, produce counting gate Δ tD；
(6) at the counting gate Δ t of outputCIn, it is with reference to square-wave signal f to frequencyRWith intermediary square-wave signal f0Grand duke because of
Sub-frequency fmaxc1NCSquare-wave signal again counts, and obtains count value mC；Meanwhile, at the counting gate Δ t of outputDIn, right
Frequency is tested square-wave signal fxWith intermediary square-wave signal f0Greatest common factor (G.C.F.) frequency fmaxc2Times square-wave signal count
Number, obtains count value mD, wherein nCAnd nDIt is positive integer；
(7) while carrying out step (6), to conduct counting gate Δ t in step (5)CCommencing signal and the having of end signal
Effect phase coincidence point is demarcated, and obtains counting gate Δ tCThe sinusoidal signal range value V that start time is correspondingC_sta, and its knot
The sinusoidal signal range value V that the bundle moment is correspondingC_end；Meanwhile, to conduct counting gate Δ t in step (5)DCommencing signal and knot
Effective phase coincidence point of bundle signal is demarcated, and obtains counting gate Δ tDThe sinusoidal signal range value that start time is corresponding
VD_sta, the sinusoidal signal range value V corresponding with its finish timeD_end；
(8) according to calibration result VC_staAnd VC_end, utilize arcsine formula count value mCOffset Δ mC；According to demarcation
Result VD_staAnd VD_end, utilize arcsine formula count value mDOffset Δ mD；
(9) measured signal f is calculatedxWith reference signal fRBetween relative frequency difference, obtain Frequency Standard Comparison result, computing formula is:
。
6. according to the comparing method for frequency standard described in claim 6, it is characterised in that: described sinusoidal signal, it is possible to Jiang Yilu
All effective phase coincidence point in phase coincidence point bunch is placed in 0～π/4 phase range in a cycle.
7. according to the comparing method for frequency standard described in claim 5, it is characterised in that: the offset Δ m described in step (8)CWith
ΔmD, its computing formula is respectively as follows:
ΔmC=Δ kC×ΔT
ΔmD=Δ kD×ΔT
Wherein, Δ kCFor as counting gate Δ tCIt is engraved in during the detection of effective phase coincidence point of commencing signal and end signal
Inconsistent amount in phase coincidence point bunch, Δ kDFor as counting gate Δ tDCommencing signal and effective phase place weight of end signal
The inconsistent amount being engraved in phase coincidence point bunch during the detection of chalaza, TxFor with reference to square-wave signal fxCycle, T0For intermediary's square wave
Signal f0Cycle, TRFor with reference to square-wave signal fRCycle.
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