CN106257659A - 利用传导聚合物的晶圆级芯片尺度封装结构 - Google Patents
利用传导聚合物的晶圆级芯片尺度封装结构 Download PDFInfo
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- CN106257659A CN106257659A CN201610439871.2A CN201610439871A CN106257659A CN 106257659 A CN106257659 A CN 106257659A CN 201610439871 A CN201610439871 A CN 201610439871A CN 106257659 A CN106257659 A CN 106257659A
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Abstract
本发明涉及利用传导聚合物的晶圆级芯片尺度封装结构,其为整合型传导聚合物焊球结构及形成此类整合型传导聚合物焊球结构的方法。该整合型传导聚合物焊球结构包括:溅镀晶种层,涂敷至晶圆结构;一或多个传导聚合物接垫结构,涂敷至在该晶圆结构上将会形成一或多个焊球结构的位置的该已溅镀晶种层;电镀层,涂敷至该一或多个传导聚合物接垫结构的已曝露光阻层的部分;以及焊球,形成在各该电镀层上从而形成该一或多个焊球结构。
Description
技术领域
本申请案大致是关于一种改进型资料处理设备及方法,并且更具体地说,大致是关于利用传导聚合物的晶圆级芯片尺度封装。
背景技术
晶圆级芯片尺度封装(CSP)(WLCSP)是指一种在晶圆级将集成电路封装的技术,所产生的装置实际上与晶粒同尺寸。WLCSP直接在装置与最终产品主机板之间提供焊料互连。WLCSP包括晶圆凸块制作(有或无接垫层重分布或重分布层(RDL))、晶圆级最终测试、装置单独化、以及带状与卷轴式包装。提供最为广泛的WLCSP选项中有一些包括接垫上WLCSP凸块(BOP)及具有重分布层(RDL)的WLCSP。
该接垫上WLCSP凸块(BOP)选项在不需要重分布的装置上提供可靠、具有成本效益、真实芯片尺寸封装。该WLCSP BOP选项利用具有优异电气/机械特性的再钝化聚合物层。新增凸块下冶金(UBM),并且接着直接在晶粒I/O接垫上方置放焊块。WLCSP-BOP的设计目的在于利用产业标准表面黏着组装和回焊技术。
具有重分布层(RDL)选项的WLCSP新增已镀覆铜重分布层(RDL)以将I/O接垫绕线至美国电子工程设计发展联合协会(Joint Electron Device Engineering Council,JEDEC)/社团法人日本电子机械工业会(Electronic Industries Association of Japan,EIAJ)(JEDEC/EIAJ)标准间距,可以不需要为了CSP应用而重新设计旧有部分。镍基或厚铜UBM连同聚亚酰胺或聚苯并恶唑(polybenzoxazole,PBO)介电质改善了板级可靠度效能。具有RDL的WLCSP利用产业标准表面黏着组装和回焊技术,而且合格的装置尺寸和I/O布局上不需要底部填充体。
因此,WLCSP无需底部填充体便可对覆晶晶粒进行直接芯片附接,在作为真实芯片尺度封装方面成长快速,但却是受限于较小晶粒尺寸和低I/O数。WLCSP在行动和智能手机应用方面成长快速,在功率管理IC方面尤其如此。
发明内容
在一项说明性具体实施例中,提供一种用于建立整合型传导聚合物焊球结构的方法。该说明性具体实施例将溅镀晶种层涂敷至晶圆结构。该说明性具体实施例将一或多个传导聚合物接垫结构涂敷至位在该晶圆结构上将会形成一或多个焊球结构的位置的该已溅镀晶种层。该说明性具体实施例将电镀层涂敷至该一或多个传导聚合物接垫结构的已曝露光阻层的部分。该说明性具体实施例在各该电镀层上形成焊球从而形成该一或多个焊球结构。
在另一说明性具体实施例中,提供一种整合型传导聚合物焊球结构。该整合型传导聚合物焊球结构包含涂敷至晶圆结构的溅镀晶种层、涂敷至位在该晶圆结构上将会形成一或多个焊球结构的位置的该已溅镀晶种层的一或多个传导聚合物接垫结构、涂敷至该一或多个传导聚合物接垫结构的已曝露光阻层的部分的电镀层、以及形成在各该电镀层上从而形成该一或多个焊球结构的焊球。
在又另一说明性具体实施例中,提供一种包含一或多个整合型传导聚合物焊球结构的集成电路。各整合型传导聚合物焊球结构包含涂敷至晶圆结构的溅镀晶种层、涂敷至位在该晶圆结构上将会形成一或多个焊球结构的位置的该已溅镀晶种层的一或多个传导聚合物接垫结构、涂敷至该一或多个传导聚合物接垫结构的已曝露光阻层的部分的电镀层、以及形成在各该电镀层上从而形成该一或多个焊球结构的焊球。
本发明的这些及其它特征与优点将会在以下本发明例示性具体实施例详细说明中作描述,或对于所属领域具有普通技术者鉴于该详细说明将会变为显而易见。
附图说明
通过参照以下说明性具体实施例的详细说明同时搭配附图阅读,将会充分了解本发明、以及其较佳使用模式及进一步目的与优点,其中:
图1A至1F为根据一说明性具体实施例,绘示建立整合型传导聚合物焊料底座的一实施例;
图2A及2B为根据一说明性具体实施例,绘示利用已电镀凸块选项在图1A至1D所示的整合型传导聚合物焊料底座顶端形成焊球的一实施例;
图3A及3B为根据一说明性具体实施例,绘示利用球滴镀选项在图1A至1D所示的整合型传导聚合物焊料底座顶端形成焊球的另一实施例;
图4A至4G为根据一说明性具体实施例,绘示建立整合型传导聚合物焊料底座的另一实施例;
图5A及5B为根据一说明性具体实施例,绘示利用已电镀凸块选项在图4A至4E所示的整合型传导聚合物焊料底座顶端形成焊球的一实施例;
图6A及6B为根据一说明性具体实施例,绘示利用球滴镀选项在图4A至4E所示的整合型传导聚合物焊料底座顶端形成焊球的另一实施例;以及
图7为根据一说明性具体实施例,展示例示性设计流程的方块图,该方块图举例而言,是在半导体IC逻辑设计、模拟、测试、布局及制造时使用。
具体实施方式
如前述,晶圆级芯片尺度封装(CSP)(WLCSP)是指一种在晶圆级将集成电路封装的技术,所产生的装置实际上与晶粒同尺寸。然而,目前的WLCSP因两项主要因子而受到限制:芯片尺寸及凸块间距/密度。关于芯片尺寸,WLCSP要求所有凸块都必须内含于芯片占位区内,就经济考量而言,对于扩大芯片尺寸并不可行。关于凸块间距/密度,缩减凸块尺寸/间距可使凸块密度增加,但凸块变小会使可靠度降低。尽管可新增重分布层,但新增此等重分布层的成本又会使成本显著增加。因此,说明性具体实施例提供一种用于WLCSP焊块的丝网印制传导聚合物底座,不仅改善可靠度,还能使芯片尺寸更大,从而得以利用WLCSP解决方案,但无需对晶圆新增附加重分布层。
本说明书及权利要求中可将「一」、「其中至少一者」及「其中之一或多者」等词汇用于说明性具体实施例的特定特征及元件。应领会的是,这些词汇及词组的用意在于表明叙述特定说明性具体实施例中存在此特定特征或元件其中至少一者,但也可存在超过一个。也就是说,这些词汇/词组的用意不在于使本说明书或权利要求受限于存在的单一特征/元件,也不在于要求存在多个此类特征/元件。相反地,这些词汇/词组只需要至少单一特征/元件便可代表本说明书及权利要求的范畴内可能有多个此类特征/元件。
另外,应领会的是,在以下说明中,说明性具体实施例的各个元件使用多个各项实施例来进一步说明此等说明性具体实施例的例示性实作态样,并且有助于了解此等说明性具体实施例的机制。这些实施例旨在属于非限制性,对于实施此等说明性具体实施例的机制并未穷举各种可能性。所属领域具有普通技术者鉴于本说明书将会清楚了解的是,这些各种元件都有许多其它替代实作态样,可用来附加于或取代本文中提供的实施例,但不会脱离本发明的精神和范畴。
再次重申,此等说明性具体实施例不仅可以改善可靠度,也可实现更大的芯片尺寸而得以利用WLCSP解决方案,通过为WLCSP焊块提供丝网印制传导聚合物底座,不需要对晶圆新增附加重分布层。图1A至1F为根据一说明性具体实施例,绘示建立整合型传导聚合物焊料底座的一项实施例。一开始,如图1A所示,建构裸晶圆结构100以包含衬底层102、氧化物介电层104、涂敷至位在晶圆结构100上将会形成一或多个焊球结构的位置的氧化物介电层104的一或多个铝接垫结构106、以及涂敷至位在晶圆结构100上将不会形成一或多个焊球结构的其它位置的硬氧化物/氮化物钝化介电层108。氧化物介电层104包括芯片后段制程(back end of line,BEOL),因此,氧化物介电层104有可能包括许多金属层和钝化层以及低k介电质,此低k介电质是一种相对于二氧化硅具有低介电常数的材料。如图所示,一或多个铝接垫结构106可在点位110穿透氧化物介电层104,以便提供接至衬底层102的导电路径。再如图所示,硬氧化物/氮化物钝化介电层108亦可涂敷至该一或多个铝接垫结构106的外部分,以便为铝接垫结构106提供结构支撑。
如图1B所示,下一个步骤是要将溅镀晶种层112涂敷至晶圆结构100。已溅镀晶种层112可由下列所构成:钛与铜;钛、钨与铜;铬与铬铜;钛与镍钒;或这些材料的其它组合。接着,在图1C中,将模板用于将会形成一或多个焊球结构的遮罩撤除区。由于所运用的模板,在该晶圆结构上将会形成一或多个焊球结构的位置,经由丝网印制在已溅镀晶种层112顶端上形成一或多个传导聚合物接垫结构114。传导聚合物接垫结构114典型为B-阶段聚合物或热塑性聚合物,是以诸如银、金、铜或镍等导电粒子来填充,或是以镀有镍或金的聚合物核所组成的传导粒子来填充。如图1D所示,光阻层116涂敷于已溅镀晶种层112的已曝露部分及一或多个传导聚合物接垫结构114的顶端上。在图1E中,运用容许一或多个传导聚合物接垫结构114有部分得以曝露的遮罩。当一或多个传导聚合物接垫结构114的意图部分一旦已曝露,便将电镀层118涂敷至一或多个传导聚合物接垫结构114的该等已曝露部分,如图1F所示。根据一说明性具体实施例,电镀层118可以是一层镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合,或可以是另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接。在另一说明性具体实施例中,电镀层118可以是包含镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合的一层,或可以是另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接,并且可以是金。电镀层118的组成取决于形成该一或多个焊球结构时使用的方法。
图2A及2B为根据一说明性具体实施例,绘示利用已电镀凸块选项在图1A至1D所示的整合型传导聚合物焊料底座顶端形成焊球的一实施例。如图2A所示,焊料结构220覆镀于光阻开口中的各相关联已电镀层118上。焊料结构220可由下列所构成:锡、铅、银、铜、铋、金、镍或这些材料的组合。形成焊料结构220之后,如图2B所示,移除光阻层116的任何剩余部分,然后通过蚀刻移除溅镀晶种层112。最后,通过将焊料加热至诸如260°F的预定温度来回焊各已覆镀焊料结构220,以便形成一或多个焊球结构222。如前述,电镀层118的组成取决于形成该一或多个焊球结构时使用的方法。因此,在已电镀凸块选项方法中,电镀层118为镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合,或为另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接。
图3A及3B为根据一说明性具体实施例,绘示利用球滴镀选项在图1A至1D所示的整合型传导聚合物焊料底座顶端形成焊球的另一实施例。进行此程序之前,先移除光阻层116的任何剩余部分,然后通过蚀刻移除溅镀晶种层112。如图3A所示,使用临时模板将助熔剂涂敷至电镀层118。亦即,第一模板运用至晶圆,而助熔剂通过该第一模板进行丝网印制,以将该助熔剂涂敷至电镀层118。当助熔剂涂敷一旦完成,便将该第一模板移除,然后运用第二模板以促使焊球置放于电镀层118上,此时其表面上具有助熔剂。如图3B所示,接着通过该第二模板将焊料滴镀到相关联电镀层118上,以将焊球324放入各相关联电镀层118上的模板开口内。将该第二模板移除,并且通过将焊球324加热至诸如260°F的预定温度来回焊焊球324,以便形成一或多个焊球结构324,并且使焊球324结合至电镀层118。各一或多个焊球结构324可由下列所构成:锡、铅、银、铜、铋、金、镍或这些材料的组合。如前述,电镀层118的组成取决于形成该一或多个焊球结构时使用的方法。因此,在球滴镀选项方法中,电镀层118为镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合,或为另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接,并且为金(Au)。
图4A至4G为根据一说明性具体实施例,绘示建立整合型传导聚合物焊料底座的另一实施例。一开始,如图4A所示,建构裸晶圆结构400以包含衬底层402、氧化物介电层404、涂敷至位在晶圆结构400上将会形成一或多个焊球结构的位置的氧化物介电层404的一或多个铝接垫结构406、以及涂敷至位在晶圆结构400上将不会形成一或多个焊球结构的其它位置的硬氧化物/氮化物钝化介电层408。氧化物介电层404包括芯片后段制程(BEOL),因此,氧化物介电层404有可能包括许多金属层和钝化层以及低k介电质,此低k介电质是一种相对于二氧化硅具有低介电常数的材料。如图所示,一或多个铝接垫结构406可在点位410穿透氧化物介电层404,以便提供接至衬底层402的导电路径。再如图所示,硬氧化物/氮化物钝化介电层408亦可涂敷至该一或多个铝接垫结构406的外部分,以便为铝接垫结构406提供结构支撑。
在图4B中,聚亚酰胺涂料426涂敷至晶圆结构400,而在将会形成一或多个焊球结构的聚亚酰胺涂料426中形成开口428。如图4C所示,溅镀晶种层412涂敷至聚亚酰胺涂料426、以及晶圆结构400的开口部分。已溅镀晶种层412可由下列所构成:钛与铜;钛、钨与铜;铬与铬铜;钛与镍钒;或这些材料的其它组合。接着,在图4D中,将模板用于将会形成一或多个焊球结构的遮罩撤除区。由于所运用的模板,在该晶圆结构上将会形成一或多个焊球结构的位置,经由丝网印制在已溅镀晶种层412顶端上形成一或多个传导聚合物接垫结构414。传导聚合物接垫结构414典型为B-阶段聚合物或热塑性聚合物,是以诸如银、金、铜或镍等导电粒子来填充,或是以镀有镍或金的聚合物核所组成的传导粒子来填充。如图4E所示,光阻层416涂敷于已溅镀晶种层412的已曝露部分及一或多个传导聚合物接垫结构414的顶端上。在图4F中,运用容许一或多个传导聚合物接垫结构414有部分得以曝露的遮罩。当一或多个传导聚合物接垫结构414的意图部分一旦已曝露,便将电镀层418涂敷至一或多个传导聚合物接垫结构414的该等已曝露部分,如图4G所示。根据一说明性具体实施例,电镀层418可以是一层镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合,或可以是另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接。在另一说明性具体实施例中,电镀层418可以是包含镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合的一层,或可以是另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接,并且可以是金。电镀层418的组成取决于形成该一或多个焊球结构时使用的方法。
图5A及5B为根据一说明性具体实施例,绘示利用已电镀凸块选项在图4A至4E所示的整合型传导聚合物焊料底座顶端形成焊球的一实施例。进行此程序之前,先移除光阻层416的任何剩余部分,然后通过蚀刻移除溅镀晶种层412。如图5A所示,焊料结构520覆镀于光阻开口中的各相关联电镀层418上。焊料结构520可由下列所构成:锡、铅、银、铜、铋、金、镍或这些材料的组合。形成焊料结构520之后,如图5B所示,移除光阻层416的任何剩余部分,然后通过蚀刻移除溅镀晶种层412。最后,通过将焊料加热至诸如260°F的预定温度来回焊各已覆镀焊料结构520,以便形成一或多个焊球结构522,此一或多个焊球结构使焊球结构522结合至相关联电镀层418。如前述,电镀层418的组成取决于形成该一或多个焊球结构时使用的方法。因此,在已电镀凸块选项方法中,电镀层418为镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合,或为另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接。
图6A及6B为根据一说明性具体实施例,绘示利用球滴镀选项在图4A至4E所示的整合型传导聚合物焊料底座顶端形成焊球的另一实施例。如图6A所示,使用临时模板将助熔剂涂敷至电镀层418。亦即,第一模板运用至晶圆,而助熔剂通过该第一模板进行丝网印制,以将该助熔剂涂敷至电镀层418。当助熔剂涂敷一旦完成,便将该第一模板移除,然后运用第二模板以促使焊球置放于电镀层418上,此时其表面上具有助熔剂。如图6B所示,接着通过该第二模板将焊料滴镀到相关联电镀层418上,以将焊球624放入各相关联电镀层418上的模板开口内。将该第二模板移除,并且通过将焊球624加热至诸如260°F的预定温度来回焊焊球624,以便形成一或多个焊球结构624,并且使焊球624结合至电镀层418。各一或多个焊球结构624可由下列所构成:锡、铅、银、铜、铋、金、镍或这些材料的组合。如前述,电镀层418的组成取决于形成该一或多个焊球结构时使用的方法。因此,在球滴镀选项方法中,电镀层418为镍、铜、钛、钛钨、铬、铬铜、镍钒或这些材料的其它组合,或为另一金属,用于在一或多个传导聚合物接垫结构114与一或多个焊球结构之间进行介接,并且为金(Au)。
因此,说明性具体实施例提供一种用于WLCSP焊块的丝网印制传导聚合物底座,不仅改善可靠度,还能使芯片尺寸更大,从而得以利用WLCSP解决方案,但无需对晶圆新增附加重分布层。以溅镀晶种层涂布晶圆结构,然后在该晶圆结构上将会形成一或多个焊球结构的位置,将一或多个传导聚合物接垫结构涂敷至该已溅镀晶种层。一或多个传导聚合物接垫结构有部分已撤除遮罩,并且将光阻层涂敷至晶圆。接着,将该一或多个传导聚合物接垫结构的已撤除遮罩的部分敞开以曝露一或多个传导聚合物接垫结构的顶端,并且将电镀层涂敷至该一或多个传导聚合物接垫结构的已曝露部分。将电镀层涂敷至各该光阻层。最后,在各该电镀层上形成焊球,从而形成该一或多个焊球结构。按照这个方式建立用于WLCSP焊块的丝网印制传导聚合物底座,相较于双重分布层方法,成本更低,可靠度也有所提升。所示程序亦容许芯片尺寸扩大或WLCSO凸块尺寸/间距缩减。为了使WLCSP结合至下一级组装,晶圆必须薄化,各芯片也必须分切开来。
图7绘示多个此类包括输入设计结构720的设计结构,此输入设计结构较佳为通过设计程序710来处理。设计结构720可以是一种通过设计程序710所产生并处理的逻辑模拟设计结构,以产生硬件装置的逻辑等效功能表征。设计结构720亦可或替代地包含通过设计程序710处理时的资料及/或程式指令,产生硬件装置实体结构功能表征。设计结构720无论是否代表功能性及/或结构化设计特征,都可使用例如由核心开发人员/设计人员所实施的电子电脑辅助设计(ECAD)来产生。设计结构720若是编码于机器可读资料传输、栅阵列或存储媒体上,则可通过设计程序710内的一或多个硬件及/或软件模块来存取并且处理,以模拟或按另一种功能性方式代表诸如图1至6所示的电子元件、电路、电子或逻辑模块、设备、装置或系统。如此,设计结构720可包含档案或其它数据结构,其包括人类及/或机器可读源编码、已编译结构以及电脑可执行代码结构,在通过设计或模拟数据处理系统进行处理时,功能性模拟或按另一种方式代表硬件逻辑设计的电路或其它层次。此类资料结构可包括硬件描述语言(HDL)设计实体或其它数据结构,其与诸如Verilog及VHDL等更低层次HDL设计语言、及/或诸如C或C++等更高层次设计语言相符及/或相容。
设计程序710较佳为运用并且合并硬件及/或软件模块,用于合成、转译、或按另一种方式处理与图1至6所示元件、电路、装置或逻辑结构功能性等效的设计/模拟,以产生可含有诸如设计结构720等设计结构的网表(netlist)780。网表780举例而言,可包含代表导线、离散元件、逻辑栅、控制电路、I/O装置、模型等的已编译或按另一种方式已处理的数据结构,其描述对集成电路设计中其它元件和电路的连接。网表780可使用迭代程序来合成,其中,网表780经过一或多次重新合成,端视装置的设计规格及参数而定。正如本文所述的其他设计结构类型,网表780可记录于机器可读数据存储媒体或编程为可编程栅阵列。此媒体可以是非挥发性存储媒体,例如:磁碟机或光碟机、可编程栅阵列、紧凑型闪存或其它闪存。另外或替代地,此媒体可以是系统或缓冲存储器,缓冲空间、或导电或导光装置或材料,其上可经由互联网、或其它网路连结适当手段来传输并中间存储数据包。
设计程序710可包括用于处理包括网表780等各种输入数据结构类型的硬件及软件模块。此类数据结构类型举例而言,可常驻于库元件730内,并且包括一组常用元件、电路及装置,其包括用于给定制造技术(例如:不同技术节点32nm、45nm、90nm等)的模型、布局及符号性表征。此等数据结构类型可更包括设计规格740、特性描述数据750、验证数据760、设计规则770及测试数据档案785,其可包括输入测试型样、输出测试结果及其它测试资讯。设计程序710举例而言,可更包括标准机械设计程序,例如:应力分析、热分析、机械事件模拟、加工模拟,诸如铸造、塑模及模压成形等。机械设计技术领域中具有通常知识者可领会设计程序710中所用可能机械设计工具和应用的范围,但不会脱离本发明的范畴及精神。设计程序710亦可包括用于进行诸如时序分析、验证、设计规则检查、布局与绕线操作等标准电路设计程序的模块。
设计程序710运用并且合并诸如HDL编译器与模拟模型建置工具等逻辑与实体设计工具,连同任何附加机械设计或数据(若适用的话)处理设计结构720以及所示支援数据结构中的一些或全部,用来产生第二设计结构790。设计结构790以用于机械装置及结构(例如:存储于IGES、DXF、Parasolid XT、JT、DRG或用于储存或给予此类机械设计结构的任何其它适当格式的资讯)的数据交换的数据格式常驻于存储媒体或可编程栅阵列上。类似于设计结构720,设计结构790较佳为包含一或多个档案、数据结构、或其它计算机已编码数据或指令,其常驻于传输或数据存储媒体上,并且在通过ECAD系统来处理时,产生图1至6所示的本发明一或多个具体实施例的逻辑或其他功能性等效形式。在一具体实施例中,设计结构790可包含功能性模拟图1至6所示装置的已编译、可执行HDL模拟模型。
设计结构790亦可将数据格式用于交换集成电路的布局数据及/或符号数据格式(例如:存储成GDSII(GDS2)、GL1、OASIS、映射档、或任何其它适用于储存此类设计数据结构的格式的资讯)。设计结构790可包含举例如下的资讯:符号数据、映射档、测试数据档案、设计内容档案、制造数据、布局参数、导线、金属阶、贯孔、形状、用于通过制造线绕送的数据、以及制造商或其它设计人员/开发人员为生产如以上所述且如图1至6中所示的装置或结构所需的任何其它数据。设计结构790可接着进入阶段795,设计结构790在这个阶段举例而言:进行下线,发布进行制造,发布到遮罩厂,送到另一家设计公司,送回给客户等。
本发明的说明已基于说明和描述目的而介绍,而且用意不在于以所揭示的形式穷举或限制本发明。许多修改及变动对所属技术领域中具有通常知识者将会显而易见,但不会脱离所述具体实施例的范畴及精神。所选择并且说明的具体实施例为的是要完善阐释本发明的原理、实务应用,并且使所属技术领域中具有通常知识者能够了解为所思特定用途而对本发明的各项具体实施例所作的各种修改。本文中使用的术语在选择上,是为了对市场现有技术最佳阐释具体实施例的原理、实务应用或技术改良,或使其它所属技术领域中具有通常知识者能够理解本文中揭示的具体实施例。
Claims (20)
1.一种整合型传导聚合物焊球结构,其包含:
溅镀晶种层,涂敷至晶圆结构;
一或多个传导聚合物接垫结构,涂敷至位在该晶圆结构上将会形成一或多个焊球结构的位置的该已溅镀晶种层;
电镀层,涂敷至该一或多个传导聚合物接垫结构的已曝露光阻层的部分;以及
焊球,形成在各该电镀层上从而形成该一或多个焊球结构。
2.如权利要求1所述的整合型传导聚合物焊球结构,其中,该一或多个焊球结构中的各焊球结构是通过下列所形成:
在该相关联电镀层上覆镀焊料;
移除任何已曝露溅镀晶种层;以及
回焊该已覆镀焊料以形成该焊球结构。
3.如权利要求2所述的整合型传导聚合物焊球结构,其中,已覆镀焊料是通过遮罩该电镀层的待形成该已覆镀焊料的区域所形成。
4.如权利要求2所述的整合型传导聚合物焊球结构,其中,该电镀层是由下列至少一者所构成:镍、铜、钛、钛钨、铬、铬铜、或镍钒。
5.如权利要求1所述的整合型传导聚合物焊球结构,其中,该一或多个焊球结构中的各焊球结构是通过下列所形成:
移除任何已曝露溅镀晶种层;
在该相关联电镀层上滴镀焊球;以及
回焊该已滴镀焊球以形成该焊球结构。
6.如权利要求5所述的整合型传导聚合物焊球结构,其中,该电镀层是由金及下列至少一者所构成:镍、铜、钛、钛钨、铬、铬铜、或镍钒。
7.如权利要求1所述的整合型传导聚合物焊球结构,其中,该晶圆结构包含:
氧化物介电层,涂敷至衬底层;
一或多个铝接垫结构,涂敷至位在该晶圆结构上将会形成该一或多个焊球结构的该等位置的该氧化物介电层;以及
硬氧化物/氮化物钝化介电层,涂敷至该晶圆结构上将不会形成该一或多个焊球结构的其它位置。
8.如权利要求1所述的整合型传导聚合物焊球结构,其中,该一或多个铝接垫结构穿透该氧化物介电层,以便提供接至该衬底层的导电路径。
9.如权利要求1所述的整合型传导聚合物焊球结构,其中,该硬氧化物/氮化物钝化介电层亦涂敷至该一或多个铝接垫结构的外部分,以便为该等铝接垫结构提供结构支撑。
10.如权利要求9所述的整合型传导聚合物焊球结构,其中,该晶圆结构更包含:
聚亚酰胺涂料,涂敷至位在该晶圆结构上将不会形成该一或多个焊球结构的位置的该硬氧化物/氮化物钝化介电层。
11.一种用于建立整合型传导聚合物焊球结构的方法,该方法包含:
将溅镀晶种层涂敷至晶圆结构;
将一或多个传导聚合物接垫结构涂敷至位在该晶圆结构上将会形成一或多个焊球结构的位置的该已溅镀晶种层;
将电镀层涂敷至该一或多个传导聚合物接垫结构的已曝露光阻层的部分;以及
在各该电镀层上形成焊球从而形成该一或多个焊球结构。
12.如权利要求11所述的方法,其中,该一或多个焊球结构中的各焊球结构是通过下列所形成:
在该相关联电镀层上覆镀焊料;
移除任何已曝露溅镀晶种层;以及
回焊该已覆镀焊料以形成该焊球结构。
13.如权利要求12所述的方法,其中,已覆镀焊料是通过遮罩该电镀层的待形成该已覆镀焊料的区域所形成。
14.如权利要求12所述的方法,其中,该电镀层是由下列至少一者所构成:镍、铜、钛、钛钨、铬、铬铜、或镍钒。
15.如权利要求11所述的方法,其中,该一或多个焊球结构中的各焊球结构是通过下列所形成:
移除任何已曝露溅镀晶种层;
在该相关联电镀层上滴镀焊球;以及
回焊该已滴镀焊球以形成该焊球结构。
16.如权利要求15所述的方法,其中,该电镀层是由金及下列至少一者所构成:镍、铜、钛、钛钨、铬、铬铜、或镍钒。
17.如权利要求11所述的方法,其中,该一或多个铝接垫结构穿透该氧化物介电层,以便提供接至该衬底层的导电路径。
18.如权利要求11所述的方法,其中,该硬氧化物/氮化物钝化介电层亦涂敷至该一或多个铝接垫结构的外部分,以便为该等铝接垫结构提供结构支撑。
19.如权利要求18所述的方法,其中,该晶圆结构更包含:
聚亚酰胺涂料,涂敷至位在该晶圆结构上将不会形成该一或多个焊球结构的位置的该硬氧化物/氮化物钝化介电层。
20.一种利用一或多个整合型传导聚合物焊球结构的集成电路,各整合型传导聚合物焊球结构包含:
溅镀晶种层,涂敷至晶圆结构;
一或多个传导聚合物接垫结构,涂敷至位在该晶圆结构上将会形成一或多个焊球结构的位置的该已溅镀晶种层;
电镀层,涂敷至该一或多个传导聚合物接垫结构的已曝露光阻层的部分;以及
焊球,形成在各该电镀层上从而形成该一或多个焊球结构。
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US20090014871A1 (en) * | 2007-07-13 | 2009-01-15 | Infineon Technologies Ag | Semiconductor device |
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CN103377305A (zh) * | 2012-04-12 | 2013-10-30 | 台湾积体电路制造股份有限公司 | 迹线上凸块结构的迹线布局方法 |
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US5611140A (en) | 1989-12-18 | 1997-03-18 | Epoxy Technology, Inc. | Method of forming electrically conductive polymer interconnects on electrical substrates |
US7170187B2 (en) | 2004-08-31 | 2007-01-30 | International Business Machines Corporation | Low stress conductive polymer bump |
KR20080074591A (ko) | 2007-02-09 | 2008-08-13 | 주식회사 엘에스 | 언더필 조성물 및 이를 이용한 반도체 장치 |
US8193610B2 (en) | 2010-08-10 | 2012-06-05 | Stats Chippac, Ltd. | Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP |
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US20090014871A1 (en) * | 2007-07-13 | 2009-01-15 | Infineon Technologies Ag | Semiconductor device |
CN102403290A (zh) * | 2010-09-10 | 2012-04-04 | 台湾积体电路制造股份有限公司 | 半导体组件及制造半导体组件的方法 |
CN103377305A (zh) * | 2012-04-12 | 2013-10-30 | 台湾积体电路制造股份有限公司 | 迹线上凸块结构的迹线布局方法 |
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