CN106231162B - The restructural seamless spliced imaging system of big visual field - Google Patents

The restructural seamless spliced imaging system of big visual field Download PDF

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CN106231162B
CN106231162B CN201610598819.1A CN201610598819A CN106231162B CN 106231162 B CN106231162 B CN 106231162B CN 201610598819 A CN201610598819 A CN 201610598819A CN 106231162 B CN106231162 B CN 106231162B
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image
imaging
unit
data
restructural
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CN106231162A (en
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陶淑苹
金光
徐伟
曲宏松
吴勇
张贵祥
郑亮亮
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Changchun Institute of Optics Fine Mechanics and Physics of CAS
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Changchun Institute of Optics Fine Mechanics and Physics of CAS
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/95—Computational photography systems, e.g. light-field imaging systems
    • H04N23/951—Computational photography systems, e.g. light-field imaging systems by using two or more images to influence resolution, frame rate or aspect ratio

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Studio Devices (AREA)

Abstract

The restructural seamless spliced imaging system of big visual field, it is related to photoelectric imaging technology field, solve that existing large area array sensor processing technology difficulty is big, yields is low and the problems such as being unable to satisfy application requirement, imaging system is made of s image-forming module splicing, and each image-forming module includes focal plane unit, imaging control unit, compression unit, storage unit sum number leaflet member；Focal plane unit includes M0*N0 array image sensor, and target optical signal is converted to electric signal by optoelectronic induction by the array image sensor；Control unit is imaged, imaging is driven to area array sensor, the image that imaging control unit receives array image sensor output is simultaneously distributed to compression unit；Control unit is imaged and is sent to storage unit after frame serial number, channel number and timestamp coding is added to image data, then imports main control computer via interchanger and carries out image decoding splicing in the same time, form seamless spliced high-resolution large area array image.Connecting method of the invention is restructural.

Description

The restructural seamless spliced imaging system of big visual field
Technical field
The present invention relates to photoelectric imaging technology fields, and in particular to multi-disc area array sensor can arbitrarily may be used by one kind The imaging device that reconstruct assembles and large area array is seamless spliced.
Background technique
Large area array camera obtains the work such as earth observation, mapping largely with its high-resolution and wide visual field Information saves a large amount of shooting times.Therefore monolithic large area array camera or the camera of multi-disc planar array splicing structure are fallen over each other as various countries The main observation camera of development.Domestic and international remote sensing camera discovery is analyzed, big polyphaser is all pursuing increase sensor resolution, so And limited by currently manufactured technique, large area array imaging sensor processing technology difficulty is big, yields is low, even if existing 30K* The super large face array CMOS image sensor of 5K pixel resolution is not able to satisfy demand of the people to high-resolution and big visual field still.And The method of multi-disc planar array splicing can be very good to solve the above problems just, and multi-disc planar array splicing breaches large area array sensor system The limitation for making technique obtains bigger visual field and ultrahigh resolution by planar array splicing on the basis of existing sensor resolution.
However different it there will necessarily be difference, and required resolution ratio and breadth using required splicing construction It is not quite similar.
Summary of the invention
The present invention is to solve existing multi-disc array image sensor splicing construction to cannot achieve unanimously, causes splicing effect poor And the problems such as being unable to satisfy application requirement, a kind of restructural big seamless spliced imaging system of visual field is provided.
The restructural seamless spliced imaging system of big visual field, the joining image-forming system include s image-forming module；Each imaging Module realizes complete imaging；Each image-forming module includes focal plane unit, imaging control unit, compression unit, storage unit Sum number leaflet member；
The focal plane unit includes M0*N0 array image sensor, and the array image sensor passes through optoelectronic induction Target optical signal is converted into electric signal；It is described imaging control unit focusing plane unit M0*N0 area array sensor drive at Picture, the imaging control unit receive the image of array image sensor output, and will be after the integration conversion of received image data It distributes to compression unit；To received image data Real Time Compression, compressed image data is exported to imaging and is controlled for the compression Unit processed, the imaging control unit are added after frame serial number, channel number and timestamp coding to be sent to and deposit to image data Storage unit；The storage unit receives the image that will be encoded with frame serial number, channel number and timestamp after several teletype commands Data import main control computer via interchanger, and the main control computer carries out image decoding in the same time and splices, one width of composition without Seam splicing high-resolution large area array image.
Beneficial effects of the present invention: seamless spliced imaging system of the present invention can be realized multi-disc area array sensor figure As seamless spliced, and the restructural big seamless spliced imaging system of visual field that connecting method can be freely combined.
Imaging system of the present invention, can spirit according to different application demands using the image-forming module of functional independence as unit The quantity living for increasing or decreasing image-forming module, connecting method is restructural, and the achievable big visual field of each image-forming module image is seamless Splicing.
Detailed description of the invention
Fig. 1 is the structural block diagram of the restructural big seamless spliced imaging system of visual field of the present invention；
Fig. 2 is image-forming module structural block diagram in the restructural big seamless spliced imaging system of visual field of the present invention；
Fig. 3 is focal plane cell sensor layout signal in the restructural big seamless spliced imaging system of visual field of the present invention Figure；
Fig. 4 is the built-in function that control unit is imaged in the restructural big seamless spliced imaging system of visual field of the present invention Modular structure block diagram；
Fig. 5 be in the restructural big seamless spliced imaging system of visual field of the present invention reconstructed in a manner of 2x2 four at As the big field stitching imaging effect figure of module.
Specific embodiment
Specific embodiment one illustrates present embodiment in conjunction with Fig. 1 to Fig. 5, reconstructs the seamless spliced imaging system of big visual field, Including s image-forming module, each image-forming module image data output interface uses kilomega network, and communication interface uses UART；S's takes Value mainly determines according to imaging requirements, because of each image-forming module functional independence and completely the same, can arbitrarily reconstruct combination,
Each image-forming module includes focal plane unit, imaging control unit, compression unit, storage unit sum number leaflet member.Institute Stating focal plane unit includes M0*N0 array image sensor, and target optical signal is converted to electric signal by optoelectronic induction.Imaging M0*N0 area array sensor of control unit focusing plane unit drives imaging, and after receiving sensor output image that data are whole Conversion is closed, distribution to Real Time Compression unit, compressed images passes after frame serial number, channel number and timestamp encoded information is added It send to storage unit.The image data with frame serial number, channel number and timestamp coding for being stored in storage unit passes through Kilomega network imports main control computer via interchanger and carries out image decoding splicing in the same time, forms a seamless spliced high-resolution Large area array image.
It further include cache unit in present embodiment, the cache unit is single for realizing imaging control unit and compression Member, storage unit and number leaflet member carry out data buffer storage when data exchange.
Focal plane unit described in present embodiment is by according to seamless spliced M0*N0 array image sensor for requiring layout Composition, the multi-disc sensor of each focal plane unit are distributed in same plane, determine according to the focal depth range of selected optical system The requirement of its coplanarity.Wherein array image sensor can be CMOS or ccd image sensor.
Imaging sensor pixel dimension is set as a, arrange to row to resolution ratio be respectively m and n, it is assumed that image mosaic overlap joint Pixel number is k, and the column that can obtain the adjacent two panels sensor for meeting seamless spliced requirement are respectively as follows: to row to layout pitch
X=2* (m-k) * a
Y=2* (n-k) * a
The imaging sensor number of focal plane unit is calculated according to goal pels resolution ratio TSD and imaging breadth w1*w2, Calculation formula are as follows:
Focal plane unit described in present embodiment uses four OV14810CMOS imaging sensors, and resolution ratio and frame frequency are 4416*3312@15fps, uses pixel locating depth for 8bit, and output pixel format is serial differential MIPI, pixel dimension 1.4um.
Focal plane cell sensor layout as shown in Fig. 2, use overlap joint pixel is 30, then focal plane unit arrange to capable to phase Adjacent two panels sensor distance is respectively 12.28mm and 9.19mm, and imaging breadth can reach 5.29km* when target resolution is 0.3m 3.97km.Sensor driver' s timing and high speed serial differential image receive complete by the programmable logic device of imaging control unit At.
Imaging control unit described in present embodiment is using programmable logic device as core, the programmable logic device Part includes that driver' s timing module, communication module, LVDS data reception module, image format conversion module, auxiliary data integrate mould Block, cache controller and storage control and network controller.
Serial ports is communicated by interface chip MAX3232 with the communication module inside programmable logic device, the communication mould On the one hand block receives control instruction, imaging parameters are obtained after instruction parsing, on the other hand sends camera status information after coding.It drives Dynamic tfi module generates sensor driver' s timing under lock-out pulse triggering according to decoded imaging parameters, completes each sensing Device is in synchronization exposure image.
Data conversion includes LVDS data reception module and image format conversion module, the picture number of imaging sensor output It is transferred to programmable logic device according to by high speed serial differential signal, LVDS data reception module is used according to sensor MIPI Image Coding Algorithms decoded serial image is Parallel image data, is converted by image format conversion module 1080P picture format is distributed to compression unit.
Auxiliary data integrates the frame starting that module judges every frame image, increases before the first row image data of every frame image A line image auxiliary data, including frame serial number, channel number and timestamp coded data, frame serial number are automatic in lower frame image Add 1, channel number is for indicating the location of shooting image, and timestamp is after receiving synchronous trigger pulse by local clock It is automatic to count, it is accurate to millisecond.Cache controller is for realizing the access control to cachings such as DDR2, and storage control is for real Now to the Read-write Catrol of storage unit high speed storing card, network controller is for realizing to gigabit Ethernet drive control.
Compression unit described in present embodiment is using H.264 video compress, every compression chip can realize 6 roads per second 30 The 1080P video Real Time Compression of frame.Four sensor image datas need three pieces compression chip altogether, but in view of design easily extension Every sensor of property corresponds to a piece of compression chip.Equally, storage card also uses the flash memory of four 128GB capacity, and every can store 4416*3312 15fps image about 100 minutes of 10 times of compressions.Since existing Conventional image sensor resolution ratio is generally greater than 1080P, therefore first pass around imaging control unit and format, then with the receivable format of compression chip and rate point It is assigned to each compression chip.Compression chip uses DM8168, and caching uses Micron MT47H128M16DDR2SDRAM.Caching Unit uses 4 DDR2,
Storage unit described in present embodiment includes the FLASH high speed storing card of the above capacity 128GB of two panels, and compression is single For member output compressed data to programmable logic device, programmable logic device controls image data buffer storage to cache controller, then It is exported via data/address bus to FLASH high speed storing card by storage control.It is 4096*3072, frame with common resolution ratio Frequency 25fps, for pixel bit wide is the cmos image sensor of 8bit, after 20 times of inter-frame video compressions, output bandwidth For 120Mbps, the memory bandwidth that is written efficiently into of FLASH flash card is generally not less than 30MB/s, therefore a piece of high speed flash memory at present The image data that a piece of sensor exports storage for a long time can be carried out to record.Because selected storage card volume is extremely thin It is small, therefore can be corresponding with image-forming module number of sensors in view of designing easy increased flash memory card quantity.With frame serial number, Channel number and the image data of timestamp coding carry out image decoding in the same time by main control computer and splice, convenient for subsequent playback Interpretation and processing.128GB memory capacity can record 4096*3072@25fps image 140 minutes, when realizing long in design at present Between image storage record, and design using card slot design, convenient for plug replacement.Storage card selects the rigid 128G capacity TF card of prestige.
Number leaflet member described in present embodiment uses gigabit ethernet interface.It is stored in the pressure of FLASH high speed storing card Contracting data are exported after receiving several teletype commands to several leaflet members, and data cache in DDR2 and are sent to friendship eventually by gigabit network interface It changes planes, all image-forming module data import main control computer by interchanger and carry out image decoding splicing in the same time, form a width Seamless spliced high-resolution large area array image.DDR2SDRAM uses Micron MT47H128M16.
Embodiment is described with reference to Fig.5, is illustrated with four image-forming module 2x2 reconstruct.Adjust the peace of image-forming module Dress angle makes two imaging sensor image scenes of same position in two neighboring image-forming module be staggered just an image Sensor photosensitive region, then the image of four imaging sensors in the same direction is just staggeredly seamless spliced, four reconstructed in a manner of 2x2 The big field stitching imaging effect figure of image-forming module is as shown in Figure 5.
The quantity and focal plane number of sensors of image-forming module described in present embodiment can expand according to actual needs Exhibition, image-forming module assembling mode are restructural.

Claims (8)

1. the restructural seamless spliced imaging system of big visual field, characterized in that the joining image-forming system includes s image-forming module； Each image-forming module realizes complete imaging；Each image-forming module include focal plane unit, imaging control unit, compression unit, Storage unit sum number leaflet member；
The focal plane unit includes M0*N0 array image sensor, and the array image sensor passes through optoelectronic induction for mesh Mark optical signal is converted to electric signal；
M0*N0 area array sensor of the imaging control unit focusing plane unit drives imaging, and the imaging control unit connects The image of array image sensor output is received, and will be distributed after the integration conversion of received image data to compression unit；
To received image data Real Time Compression, compressed image data is exported to imaging control unit the compression unit, The imaging control unit is sent to storage unit after frame serial number, channel number and timestamp coding is added to image data；
The storage unit receives the image data that will be encoded with frame serial number, channel number and timestamp after several teletype commands Main control computer is imported via interchanger, the main control computer carries out image decoding in the same time and splices, and forms a seamless spelling Connect high-resolution large area array image；
M0*N0 array image sensor of the focal plane unit is distributed in same plane, each array image sensor pixel Having a size of a, arrange to row to resolution ratio be respectively m and n, set image mosaic overlap joint pixel number as k, acquisition is adjacent two unilateral The column of array image sensor are respectively as follows: to row to layout pitch
X=2* (m-k) * a
Y=2* (n-k) * a
The number of probes of focal plane unit is calculated according to goal pels resolution ratio TSD and imaging breadth w1*w2, calculation formula Are as follows:
The imaging control unit is using programmable logic device as core, including driver' s timing module, communication module, LVDS serial Data reception module, image format conversion module, auxiliary data integrate module, cache controller, storage control and network control Device processed；
The communication module receives control instruction, and is decoded acquisition imaging parameters to instruction；Driver' s timing module is according to solution Imaging parameters after code generate imaging sensor driver' s timing under lock-out pulse triggering, complete each imaging sensor same Moment exposure image；The communication module is also used to send camera status information after coding；
The image data of imaging sensor output is transferred to LVDS Serial data receiving module, institute by high speed serial differential signal It states LVDS Serial data receiving module and received serial image data is decoded as Parallel image data, by image format conversion The Parallel image data is converted to 1080P picture format and distributed to compression unit by module；
The auxiliary data integrates the frame starting that module judges every frame image, increases before the first row image data of every frame image A line image auxiliary data, including frame serial number, channel number and timestamp coded data, frame serial number are automatic in lower frame image Add 1, channel number is for identifying the location of shooting image, and timestamp coding is by local after receiving synchronous trigger pulse Clock counts automatically；
The cache controller is for realizing the access control cached to DDR2, and storage control is for realizing to storage unit Read-write Catrol, network controller is for realizing to gigabit Ethernet drive control.
2. the restructural big seamless spliced imaging system of visual field according to claim 1, which is characterized in that further include that caching is single Member, the cache unit carry out data friendship for realizing imaging control unit and compression unit, storage unit and number leaflet member Data buffer storage when changing.
3. the restructural big seamless spliced imaging system of visual field according to claim 1, which is characterized in that the compression unit Including multi-disc compression chip, using H.264 video compress.
4. the restructural big seamless spliced imaging system of visual field according to claim 1, which is characterized in that the storage unit Using FLASH high speed storing card, compression unit exports compressed data and controls picture number to control unit, imaging control unit is imaged It is exported through data/address bus to FLASH high speed storing card according to being cached to cache controller, then by storage control.
5. the restructural big seamless spliced imaging system of visual field according to claim 1, which is characterized in that the number leaflet Member uses gigabit ethernet interface；Programmable logic device control is stored in FLASH high speed storing card after receiving several teletype commands Compressed data export to several leaflets member, interchanger is sent to by gigabit Ethernet mouth.
6. the restructural big seamless spliced imaging system of visual field according to claim 2, which is characterized in that the caching list Member uses Synchronous Dynamic Random Access Memory.
7. the restructural big seamless spliced imaging system of visual field according to claim 1, which is characterized in that the face system of battle formations As sensor uses CMOS or ccd image sensor.
8. the restructural big seamless spliced imaging system of visual field according to claim 1, which is characterized in that the number of image-forming module Amount and focal plane element number are extended all in accordance with actual demand, and image-forming module assembling mode is restructural.
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