CN106375642B - Image acquisition and processing device and object of which movement image capturing system - Google Patents

Image acquisition and processing device and object of which movement image capturing system Download PDF

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CN106375642B
CN106375642B CN201610856146.5A CN201610856146A CN106375642B CN 106375642 B CN106375642 B CN 106375642B CN 201610856146 A CN201610856146 A CN 201610856146A CN 106375642 B CN106375642 B CN 106375642B
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module
image
data
sensing device
acquisition
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CN106375642A (en
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王少博
徐渊
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Shenzhen University
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50Constructional details
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50Constructional details
    • H04N23/54Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/80Camera processing pipelines; Components thereof

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  • Multimedia (AREA)
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Abstract

The present invention relates to a kind of image sensing device, acquisition processing device and object of which movement image capturing systems, the disadvantages of there are at high cost, architecture is complicated, signal processing is complicated for the traditional object of which movement image capturing system of solution, this object of which movement image capturing system, including image sensing device and image acquisition and processing device;Output to described image acquisition processing device carries out image procossing after the image that shooting obtains is converted into LVDS signal by described image sensing device.Optical signal is converted directly into low-voltage differential signal and exported to the processing of image acquisition and processing device by image sensing device of the invention, and signals transmission is simple, without encapsulation and deblocking.The image clearly that image sensing device is obtained using global shutter acquisition high-speed moving object is readily identified without smear.Image acquisition and processing device uses the single-chip including FPGA and ARM function, and structure is simple, realizes Image Acquisition and processing integration.

Description

Image acquisition and processing device and object of which movement image capturing system
Technical field
The present invention relates to Image Acquisition field, more specifically to a kind of image sensing device, acquisition processing device and Object of which movement image capturing system.
Background technique
Traditional object of which movement image capturing system is lacked there are at high cost, architecture is complicated, signal processing is complicated etc. Point.For example, existing patent CN105611270A discloses a kind of binocular vision auto-stereo display system, including binocular camera shooting Machine, interface conversion circuit, FPGA accelerating circuit and auto-stereoscopic display.It wherein include image processing board in binocular camera Card, sensor board and camera lens.In practical applications, to assemble the system and larger cost will be generated by buying video camera. The signal processing flow of the system are as follows: original signal is first converted into HDMI signal, then is turned HDMI signal by conversion circuit It is changed to LVDS signal, to realize above-mentioned conversion process, in hardware needs that HDMI encoder and interface conversion circuit accordingly is arranged, Transmission medium includes HDMI wire and LVDS line simultaneously.Entire signal processing is more complex.Existing patent CN104835163A Disclose a kind of high speed binocular vision system, comprising: two high speed cameras, binocular bracket, image acquisition and processing board, embedded Human-computer interaction board etc..Its image acquisition and processing board is for calculating image data, including two master chips: FPGA and DSP is respectively used to parallel computation and serial computing.Its shortcoming is that processor is excessive in whole system, although using insertion Formula human-computer interaction board is for substituting PC finishing man-machine interaction, but its processing speed can be still restricted, in practical applications, Processing capacity can only realize 200fps, the Image Acquisition of 640*240 pixel.To sum up, provide that a kind of low cost, structure be simple, figure As the high object of which movement image capturing system for the treatment of effeciency is very necessary.
Summary of the invention
The technical problem to be solved in the present invention is that in view of the above drawbacks of the prior art, providing a kind of image sensing dress It sets, acquisition processing device and object of which movement image capturing system.
The technical solution adopted by the present invention to solve the technical problems is: constructing a kind of image sensing device, comprising: be used for The camera lens of shooting;The photoelectric converter of the lens imaging position is set;And it is used for transmission the communication interface of data;It is clapped It takes the photograph the image that the light that object reflects is formed after the lens focus to fall on the photoelectric converter, the photoelectric converter Electric signal is converted the image into export to the communication interface.
It preferably, further include the power circuit being connected with the photoelectric converter, the communication interface is also used to connect outer Portion's power-supply device, the power circuit are connected with the communication interface.
The present invention also provides a kind of image acquisition and processing device, including HDMI interface, FPGA acquisition unit and ARM processing Unit;
The FPGA acquisition unit by the HDMI interface connect external image sensing device, using LVDS agreement with The external image sensing device exchange image data, and described image data are exported to ARM processing unit;
The ARM processing unit receives, processing described image data, and the image data that exports that treated.
Preferably, the FPGA acquisition unit includes synchronised clock configuration module, general controls bus module, LVDS figure As signal receiving module, memory modules and write bus module are write;
The synchronised clock configuration module configures the external image by the HDMI interface with SPI serial protocol and senses Device synchronised clock polarity and phase;
The general controls bus module and the synchronised clock configuration module, LVDS picture signal receiving module and ARM processing unit connection, for configuring the synchronised clock pole of the synchronised clock configuration module, LVDS picture signal receiving module Property and phase, and with ARM processing unit carry out slow data transmission;
The LVDS picture signal receiving module receives the external image sensing device by the HDMI interface and exports Image data and its corresponding synchronous code, and output to described writes memory mould after carrying out serioparallel exchange to described image data Block;
The memory modules of writing are by the described image data buffer storage after serioparallel exchange to internal storage, then from the inside Described image data are read in memory and are exported to write bus module;
The write bus module is connect with the ARM processing unit, for carrying out high-speed data with the ARM processing unit Transmission.
Preferably, the ARM processing unit includes data processing module, common status bus interface, the first high speed bus interface And ethernet module;
The common status bus interface connects the general controls bus module, described in the first high speed bus interface connection Write bus module;
The data processing module is connect with the common status bus interface, first high speed bus interface;
The ethernet module is connect with the data processing module, for connecting outer computer, passes through Transmission Control Protocol Treated that image data is transmitted to the outer computer by described.
It preferably, further include being connect with the data processing module, the data for storing image, program data store single Member, the data storage cell include SDRAM and FLASH flash memory.
Preferably, the ARM processing unit further includes the second high speed bus interface.
The FPGA acquisition unit further include: read bus module, rdma read module, time sequence status generation module and TMDS Signal conversion module;
The read bus module is connected with second high speed bus interface, high for carrying out with the ARM processing unit Fast data transmission;
The rdma read module reads the data by the read bus module and second high speed bus interface and deposits Image data in storage unit;
The time sequence status generation module is connected with the rdma read module, for generating standard corresponding with resolution ratio Timing, and described image data are exported according to the standard time sequence of generation to the TMDS signal conversion module;
Output to outside is shown after the TMDS signal conversion module is used to be converted to described image data TMDS signal Device is shown.
The present invention also provides a kind of object of which movement image capturing systems, including image sensing device and image acquisition and processing Device;
Described image sensing device exports after the image that shooting obtains is converted into LVDS signal to described image acquisition It manages device and carries out image procossing.
Preferably, the system is binocular vision system, including two image sensing devices, an image acquisition and processing dress It sets and a plurality of HDMI connecting line;The communication interface of described two image sensing devices pass through respectively independent HDMI connecting line with The HDMI interface of described image acquisition processing device is connected.
Preferably, further include light compensating apparatus for improving described two image sensing device environment resistant light jamming performances.
Implement image sensing device of the invention, acquisition processing device and object of which movement image capturing system, has following It exports the utility model has the advantages that optical signal is converted directly into low-voltage differential signal by image sensing device to image acquisition and processing device Reason, signals transmission is simple, without encapsulation and deblocking.Image sensing device is obtained using global shutter acquisition high-speed moving object The image clearly arrived is readily identified without smear.Image acquisition and processing device uses the single-chip including FPGA and ARM function, knot Structure is simple, realizes Image Acquisition and processing integration.Whole object moving image acquisition system is at low cost, structure is simple, processing Efficiently.
Detailed description of the invention
Present invention will be further explained below with reference to the attached drawings and examples, in attached drawing:
Fig. 1 is the structural block diagram of image sensing device of the present invention;
Fig. 2 is the structural block diagram of image acquisition and processing device of the present invention;
Fig. 3 is the structural block diagram of binocular vision system.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right The present invention is further elaborated.
As shown in Figure 1, image sensing device of the invention includes: the camera lens for shooting;It is arranged in lens imaging position Photoelectric converter;And it is used for transmission the communication interface of data;The light of subject reflection is formed after lens focus Image fall on photoelectric converter, photoelectric converter converts the image into electric signal and exports to communication interface.
Specifically, taking lens of the invention selects 12mm focal length, aperture f1.0,1/3 inch of camera lens, photoelectric converter Using CMOS global shutter sensor, concrete model is the NOIP1SN0300A of Onsen, is sensed by above-mentioned camera lens and CMOS 725 frames, the Image Acquisition of 640*480 pixel may be implemented in the combination of device.When the acquisition of control single image, detection time are small When 5 milliseconds, the motion state of ultrahigh speed target (movement velocity is within the scope of 50m/s to 100m/s) can be monitored in real time, together When remain the detection function of slower-velocity target (movement velocity be less than 2m/s) again.Middle and high, the low-speed motion object of comprehensive covering is reached The detection system requirement of body.
The electric signal that sensor is converted to is low-voltage differential signal, i.e. LVDS signal.Communication interface is mini- HDMI interface, i.e. c-type HDMI interface.The communication interface exchanges data with external equipment with LVDS agreement.
Further, image sensing device of the invention further include: the power circuit being connected with photoelectric converter.Image passes Induction device connects external power supply, voltage needed for external power supply is converted into photoelectric converter by power circuit by power circuit.
In some embodiments, communication interface is also used to connect external power supply, and power circuit is connected with communication interface. When the communication interface is mini-HDMI interface, i.e. c-type HDMI interface.The type interface shares 19 stitch, the 18th stitch For+5V power supply, it can be used for 5V power voltage supply.Cmos image sensing device is designed for 5V or 3.3V supply voltage.Institute Respective external power-supply device can be connected by mini-HDMI interface, power for whole image sensing device.
As shown in Fig. 2, the present invention also provides a kind of image acquisition and processing device, including HDMI interface, FPGA acquisition unit And ARM processing unit;FPGA acquisition unit connects external image sensing device by HDMI interface, using LVDS agreement and outside Portion's image sensing device exchange image data, and image data is exported to ARM processing unit;ARM processing unit is received, is handled Image data, and export treated image data.
FPGA and ARM are integrated in a ZYNQ chip.The chip is using the XC7Z020-1CLG484C for matching company, Sentos Model.After FPGA acquisition unit is connect with image sensing device, clock configuration, the two upon configuration corresponding are synchronized to it Data exchange is carried out under clock control.LVDS signal is serial signal, and FPGA is carried out serioparallel exchange and generates effective image After data, export to ARM processing unit, ARM processing unit handles image data, including three-dimensional reconstruction and kinematic parameter Calculate etc., and export the result obtained after processing.It includes: output to outer computer, data storage cell and defeated that it, which is exported, Specific output process is discussed further below for showing data to FPGA out.
Further, the corresponding module packet of above-mentioned synchronised clock configuration, data transmission, conversion and output is executed in FPGA Include: synchronised clock configuration module, general controls bus module, LVDS picture signal receiving module are write memory modules and are write total Wire module;Synchronised clock configuration module configures external image sensing device synchronised clock by HDMI interface with SPI serial protocol Polarity and phase;General controls bus module and synchronised clock configuration module, LVDS picture signal receiving module and ARM are handled Unit connection, for configuring the synchronised clock polarity and phase of synchronised clock configuration module, LVDS picture signal receiving module, with And slow data transmission is carried out with ARM processing unit;LVDS picture signal receiving module receives external image by HDMI interface The image data and its corresponding synchronous code of sensing device output, and export after carrying out serioparallel exchange to image data to writing memory Module;It writes memory modules to cache the image data after serioparallel exchange to internal storage, then reads figure from internal storage As data and export to write bus module;Write bus module is connect with ARM processing unit, high for carrying out with ARM processing unit Fast data transmission.
Synchronised clock configuration includes: that the output clock configuration of FPGA and FPGA configure the clock of image sensing device.
General controls bus module is used to read, configure the internal register of FPGA: synchronised clock configuration module and LVDS Picture signal receiving module.The output clock configuration of FPGA configures the clock of general controls bus module, clock configuration It is realized in FPGA system programming.What the concrete principle of the configuration of its clock and register configuration was well known to those skilled in the art Content, the present invention in repeat no more.
FPGA configures the clock of image sensing device: synchronised clock configuration module is serially assisted by HDMI interface with SPI View configuration external image sensing device synchronised clock polarity and phase.Specifically, the communication between two SPI equipment must be by leading Equipment is controlled from equipment.It is provided from the clock of equipment by main equipment by corresponding stitch, cannot generate or control from equipment itself Clock processed.FPGA generates corresponding clock pulses according to the data that will be exchanged, and clock pulses constitutes clock signal, clock letter It number is controlled by clock polarity and clock phase and when to carry out data exchange and when right between FPGA and image sensing device The data received are sampled, to guarantee the synchronous transfer of data between both devices.
After the completion of clock configuration, image sensing device carries out data transmission with LVDS picture signal receiving module.LVDS figure As signal receiving module receives the image data and corresponding synchronous code that image sensing device is exported with LVDS signal, generation figure Row, field sync signal as sensing device carry out serioparallel exchange to LVDS signal and generate effective image data.
LVDS picture signal receiving module exports the effective image data of generation to memory modules are write, and writing memory modules will Received image data is cached in internal memory FIFO, then the image data in FIFO is taken out, and passes through write bus mould Block is input to ARM processing unit.
Further, ARM processing unit includes data processing module, common status bus interface, the first high speed bus interface with And ethernet module;Common status bus interface connection universal control bus module, the first high speed bus interface connect write bus module; Data processing module and common status bus interface, the connection of the first high speed bus interface;Ethernet module is connect with data processing module, For connecting outer computer, by Transmission Control Protocol, by treated, image data is transmitted to outer computer.
Further, ARM processing unit further includes connecting with data processing module, for storing image, program data Data storage cell, data storage cell include SDRAM and FLASH flash memory.SDRAM for temporary treated image data, FLASH flash memory is for storing solidification reset routine.
ARM processing unit carries out slow data transmission by common status bus interface and FPGA;It is connect by the first high-speed bus Mouth carries out high-speed data reception;The image data inputted to the first high speed bus interface is carried out three-dimensional reconstruction by data processing module And beginning parameter transform model, and the obtained data of processing are exported by ethernet module to outer computer.User can pass through Computer is directly viewable processing result.The processor for being used for image data operation in the present invention in ARM is at Cortex-A9 double-core Manage device.
Processing result can be also directly output to SDRAM and stored by data processing module, when needed can also be from SDRAM Middle reading is simultaneously output to outer computer or FPGA by ethernet module.
The contact of processing can also be exported to FPGA and be used to show data by data processing module.Correspondingly, ARM processing is single Member further includes the second high speed bus interface.FPGA acquisition unit further include: read bus module, rdma read module, time sequence status are raw At module and TMDS signal conversion module;Read bus module is connected with the second high speed bus interface, is used for and ARM processing unit Carry out high speed data transfer;Rdma read module is read in data storage cell by read bus module and the second high speed bus interface Image data;Time sequence status generation module is connected with rdma read module, for generating standard corresponding with display resolution Timing, and image data is exported according to the standard time sequence of generation to TMDS signal conversion module;TMDS signal conversion module is used Output to external display is shown after image data to be converted to TMDS signal.
Specifically, the image data being stored in SDRAM is passed through the second high speed bus interface, FPGA by ARM processing unit Read bus module be output to rdma read module.Obtained image data is buffered in internal storage FIFO by rdma read module In, time sequence status generation module, point that time sequence status generation module is shown as needed are output to taking out data from FIFO Resolution generates standard time sequence, and image data is output to TMDS signal conversion module according to the Timing driver of standard, is converted into TMDS standard signal.FPGA can connect external display by corresponding HDMI interface, and TMDS standard signal is exported to outside Display performs image display.Wherein, time sequence status generation module is made of counter and two state machines, linage-counter and row State machine is used to generate row synchronous sequence, and field counter and field state machine are used to generate field synchronization timing.
The present invention also provides a kind of systems for acquiring object of which movement image, including at image sensing device and Image Acquisition Manage device;Output to image acquisition and processing device carries out after the image that shooting obtains is converted into LVDS signal by image sensing device Image procossing.
Structure, functional characteristics and the above-mentioned image sensing of image sensing device and image acquisition and processing device in the system Device is identical with image acquisition and processing device, and details are not described herein again.
As shown in figure 3, the system is binocular vision system, including two image sensing devices, an image acquisition and processing Device and a plurality of HDMI connecting line;The communication interface of two image sensing devices passes through independent HDMI connecting line and figure respectively As the HDMI interface of acquisition processing device is connected.
Further, each image sensing device is set there are two mini-HDMI interface, and image acquisition and processing device is accordingly set There are four HDMI interface is connected.
The system can the whole series be packaged in mechanical cover, corresponding externally network interface and power supply are opened up on mechanical cover and is connect Mouthful, which is connected with image acquisition and processing device, and image acquisition and processing device is filled by HDMI interface and image sensing Connection is set, image acquisition and processing device can be image sensing device power supply by the energization pins of interface.Preferably, the system Power supply is 12V, 3A.
Further, which further includes the light compensating apparatus for improving image sensing device environment resistant light jamming performance. It is 12V that light compensating apparatus of the invention, which preferentially selects input power, and input power is three tungsten halogen lamps of 50W.
Implement image sensing device of the invention, acquisition processing device and object of which movement image capturing system, has following It exports the utility model has the advantages that optical signal is converted directly into low-voltage differential signal by image sensing device to image acquisition and processing device Reason, signals transmission is simple, without encapsulation and deblocking.Image sensing device is obtained using global shutter acquisition high-speed moving object The image clearly arrived is readily identified without smear.Image acquisition and processing device uses the single-chip including FPGA and ARM function, knot Structure is simple, realizes Image Acquisition and processing integration.Whole object moving image acquisition system is at low cost, structure is simple, processing Efficiently.
It should be understood that above embodiments only express the preferred embodiment of the present invention, description is more specific and detailed Carefully, but it cannot be understood as limitations on the scope of the patent of the present invention;It should be pointed out that for the common skill of this field For art personnel, without departing from the inventive concept of the premise, above-mentioned technical characterstic can be freely combined, can also be done Several modifications and improvements out, these are all within the scope of protection of the present invention;Therefore, all to be done with scope of the invention as claimed Equivalents and modification, should belong to the covering scope of the claims in the present invention.

Claims (8)

1. a kind of image acquisition and processing device, which is characterized in that including HDMI interface, FPGA acquisition unit and ARM processing are single Member;
The FPGA acquisition unit connects external image sensing device by the HDMI interface, uses LVDS agreement and described outer Portion's image sensing device exchange image data, and described image data are exported to ARM processing unit;
The ARM processing unit receives, processing image data, and the image data that exports that treated;
The FPGA acquisition unit includes synchronised clock configuration module, general controls bus module, LVDS picture signal reception mould Block writes memory modules and write bus module;
The synchronised clock configuration module configures the external image sensing device by the HDMI interface with SPI serial protocol Synchronised clock polarity and phase;
At the general controls bus module and the synchronised clock configuration module, LVDS picture signal receiving module and ARM Manage unit connection, for configure the synchronised clock configuration module, LVDS picture signal receiving module synchronised clock polarity and Phase, and slow data transmission is carried out with ARM processing unit;The general controls bus module is by reading, configuring FPGA Internal register with synchronised clock configuration module and LVDS picture signal receiving module;
The LVDS picture signal receiving module receives the figure of the external image sensing device output by the HDMI interface Memory modules are write to described as data and its corresponding synchronous code, and to output after described image data progress serioparallel exchange;
The memory modules of writing are by the described image data buffer storage after serioparallel exchange to internal storage, then from the storage inside Described image data are read in device and are exported to write bus module;
The write bus module is connect with the ARM processing unit, for carrying out high-speed data biography with the ARM processing unit It is defeated.
2. image acquisition and processing device according to claim 1, which is characterized in that the ARM processing unit includes data Processing module, common status bus interface, the first high speed bus interface and ethernet module;
The common status bus interface connects the general controls bus module, writes described in the first high speed bus interface connection total Wire module;
The data processing module is connect with the common status bus interface, first high speed bus interface;
The ethernet module is connect with the data processing module, will be described by Transmission Control Protocol for connecting outer computer Image data that treated is transmitted to the outer computer.
3. image acquisition and processing device according to claim 2, which is characterized in that further include and the data processing module Connection, for storing the data storage cell of image, program data, the data storage cell includes that SDRAM and FLASH dodges It deposits.
4. image acquisition and processing device according to claim 3, which is characterized in that the ARM processing unit further includes Two high speed bus interfaces.
The FPGA acquisition unit further include: read bus module, rdma read module, time sequence status generation module and TMDS signal Conversion module;
The read bus module is connected with second high speed bus interface, for carrying out high speed number with the ARM processing unit According to transmission;
The rdma read module reads the data by the read bus module and second high speed bus interface and stores list Image data in member;
The time sequence status generation module is connected with the rdma read module, when for generating standard corresponding with resolution ratio Sequence, and described image data are exported according to the standard time sequence of generation to the TMDS signal conversion module;
Output to external display is shown after the TMDS signal conversion module is used to being converted to described image data into TMDS signal Show.
5. a kind of object of which movement image capturing system, which is characterized in that including image sensing device and such as Claims 1 to 4 Described in any item image acquisition and processing devices;
Described image sensing device, comprising:
Camera lens for shooting;
The photoelectric converter of the lens imaging position is set;And
It is used for transmission the communication interface of data;
The image that the light of subject reflection is formed after the lens focus is fallen on the photoelectric converter, the light Electric transducer converts the image into electric signal and exports to the communication interface;
The electric signal is LVDS signal, and the communication interface is included HDMI interface and exchanged with LVDS agreement with external equipment Data.
Output to described image acquisition process fills after the image that shooting obtains is converted into LVDS signal by described image sensing device Set carry out image procossing.
6. object of which movement image capturing system according to claim 5, which is characterized in that described image sensing device also wraps The power circuit being connected with the photoelectric converter is included, the communication interface is also used to connect external power supply, the power supply Circuit is connected with the communication interface.
7. object of which movement image capturing system according to claim 5, which is characterized in that the system is binocular vision system System, including two image sensing devices, an image acquisition and processing device and a plurality of HDMI connecting line;Described two images pass The communication interface of induction device is connected by independent HDMI connecting line with the HDMI interface of described image acquisition processing device respectively.
8. object of which movement image capturing system according to claim 7, which is characterized in that further include for improving the figure As the light compensating apparatus of sensing device environment resistant light jamming performance.
CN201610856146.5A 2016-09-27 2016-09-27 Image acquisition and processing device and object of which movement image capturing system Expired - Fee Related CN106375642B (en)

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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107277384B (en) * 2017-05-19 2019-11-12 中国科学院长春光学精密机械与物理研究所 High-resolution video satellite imaging equipment
CN107205124A (en) * 2017-06-28 2017-09-26 高感(北京)科技有限公司 A kind of many camera lens oblique photograph device and method
CN107370924B (en) * 2017-07-18 2020-06-19 西安电子科技大学 Image acquisition system
WO2020037628A1 (en) * 2018-08-23 2020-02-27 深圳市大疆创新科技有限公司 Data acquisition system, transmission and conversion circuit, and mobile platform
CN114942022B (en) * 2022-07-25 2022-10-21 中国人民解放军国防科技大学 Bionic polarized light compass integrated design and navigation information real-time processing method
CN116824068B (en) * 2023-08-30 2024-01-09 深圳大学 Real-time reconstruction method, device and equipment for point cloud stream in complex dynamic scene

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101662578B (en) * 2008-08-29 2011-10-19 佳能株式会社 Image processing apparatus and control method therefor
CN102629968A (en) * 2012-04-11 2012-08-08 湖南镭目科技有限公司 Image processing device and method as well as system
CN105611270A (en) * 2015-12-18 2016-05-25 华中科技大学 Binocular vision auto-stereoscopic display system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0226014D0 (en) * 2002-11-08 2002-12-18 Nokia Corp Camera-LSI and information device
US7855727B2 (en) * 2004-09-15 2010-12-21 Gyrus Acmi, Inc. Endoscopy device supporting multiple input devices
JP2012089920A (en) * 2010-10-15 2012-05-10 Hitachi Kokusai Electric Inc Image pick-up device
CN104427232B (en) * 2013-08-30 2017-11-24 安凯(广州)微电子技术有限公司 A kind of method, apparatus and system for realizing IMAQ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101662578B (en) * 2008-08-29 2011-10-19 佳能株式会社 Image processing apparatus and control method therefor
CN102629968A (en) * 2012-04-11 2012-08-08 湖南镭目科技有限公司 Image processing device and method as well as system
CN105611270A (en) * 2015-12-18 2016-05-25 华中科技大学 Binocular vision auto-stereoscopic display system

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