CN106230577A - A kind of method improving intelligent network lotus interactive terminal many plates resolution - Google Patents
A kind of method improving intelligent network lotus interactive terminal many plates resolution Download PDFInfo
- Publication number
- CN106230577A CN106230577A CN201610636025.XA CN201610636025A CN106230577A CN 106230577 A CN106230577 A CN 106230577A CN 201610636025 A CN201610636025 A CN 201610636025A CN 106230577 A CN106230577 A CN 106230577A
- Authority
- CN
- China
- Prior art keywords
- clock
- microsecond
- millisecond
- relative time
- enumerator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 240000002853 Nelumbo nucifera Species 0.000 title claims abstract description 22
- 235000006508 Nelumbo nucifera Nutrition 0.000 title claims abstract description 22
- 235000006510 Nelumbo pentapetala Nutrition 0.000 title claims abstract description 22
- 230000002452 interceptive effect Effects 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 title claims abstract description 18
- 230000001360 synchronised effect Effects 0.000 claims abstract description 23
- 238000004891 communication Methods 0.000 claims abstract description 12
- 239000013078 crystal Substances 0.000 claims abstract description 6
- 238000012545 processing Methods 0.000 claims description 6
- VIKNJXKGJWUCNN-XGXHKTLJSA-N norethisterone Chemical compound O=C1CC[C@@H]2[C@H]3CC[C@](C)([C@](CC4)(O)C#C)[C@@H]4[C@@H]3CCC2=C1 VIKNJXKGJWUCNN-XGXHKTLJSA-N 0.000 claims description 4
- 238000011017 operating method Methods 0.000 claims description 4
- 230000011664 signaling Effects 0.000 claims description 4
- 238000006073 displacement reaction Methods 0.000 claims description 3
- 238000005096 rolling process Methods 0.000 claims description 3
- 230000006641 stabilisation Effects 0.000 claims description 3
- 238000011105 stabilization Methods 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/28—Timers or timing mechanisms used in protocols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
- H04L2012/40215—Controller Area Network CAN
Abstract
The present invention relates to a kind of method improving intelligent network lotus interactive terminal many plates resolution, belong to network communication technology field.The method by be respectively configured MCU, crystal oscillator, clock chip, a mainboard of memorizer and some from plate by the CAN intelligent network lotus interactive terminal that constitutes of communication connection, mainboard and some be further connected with clock synchronous bus between plate.Synchronizing signal is started the most immediately at first millisecond of moment clock synchronous bus after when due to the fact that CAN pair, keep Tong Bu with mainboard after being reset by its corresponding microsecond timer, achieve Optimum Matching between the two, and introduce microsecond timing and ensure that the synchronization of " millisecond " level, the CAN interval synchronizing signal of 1 second avoids safely the impact of components and parts individual variation, therefore significantly improves the SOE resolution overall to intelligent network lotus interactive terminal.
Description
Technical field
The present invention relates to one and put forward high-resolution method, especially a kind of intelligent network many plates of lotus interactive terminal that improve are differentiated
The method of rate, belongs to network communication technology field.
Background technology
Intelligent network lotus interactive terminal be a kind of based on high-speed network communication for the purpose of quickly response, for a plurality of for distribution
The collection of line electricity tolerance, the real-tune TT & C device of control.Intelligent network lotus interactive terminal is led to from plate by one piece of mainboard and some pieces
Cross high-speed CAN bus and connect and compose that (see application number 201310124359.5, " a kind of net lotus based on intelligent grid is mutual for title
Dynamic multi-dimensional operation system " Chinese patent literature), mainboard is responsible for and master station communication, is responsible for collection from plate and includes in power distribution room one
Secondary device running status, control device action signal and warning signal at data letters such as the remote measurement of interior various events, remote signalling amounts
Breath.The correctness of these information directly affects the method for operation of system and the decision-making of dispatcher, the safety and stability to electrical network
Run significant.
At present, the development of power system wanting SOE (Sequence Of Event, i.e. event sequence) resolution
Ask more and more higher, although the resolution problem of single plate SOE solves (to see Application No. 201310627487.1, title substantially
Chinese patent literature for " a kind of method improving remote terminal unit SOE temporal resolution "), but owing to each plate uses independent
Processor and crystal oscillator, and the individual variation between these components and parts cannot ensure that the clock between many plates reaches Millisecond and synchronizes, because of
The resolution problem of this many plate SOE is not the most properly settled, and the SOE that intelligent network lotus interactive terminal is overall is differentiated by result
Rate has a negative impact.
Summary of the invention
It is an object of the invention to: the problem existed for above-mentioned prior art, propose one and ensure clock one between many plates
The method improving intelligent network lotus interactive terminal many plates resolution of cause property, thus the operational decisions offer for power system is more as the criterion
Data message the most reliably.
In order to reach object above, the present invention improves the method for intelligent network lotus interactive terminal many plates resolution by joining respectively
Put MCU, crystal oscillator, clock chip, a mainboard of memorizer and some intelligent networks constituted from plate by CAN communication connection
In lotus interactive terminal, described mainboard and some be further connected with clock synchronous bus between plate；
Described mainboard operating procedure is:
The first step, power on after read clock chip absolute clock and be converted to relative time clock form write specified memory region；
Described relative time clock contains microsecond enumerator, millisecond counter and stepping counter；
Second step, configure 100 microsecond hardware and interrupt, and when controlling every time to enter interrupt processing state, by the microsecond of relative time clock
Enumerator adds 100 microseconds；When microsecond enumerator arrives 1000, millisecond counter adds 1, simultaneously microsecond counter O reset；When milli
When second enumerator arrives 60000, stepping counter adds 1, and millisecond counter resets simultaneously；
3rd step, the traffic rate of configuration CAN are 1Mbps, and control communication and the process time of message during CAN broadcast pair
In 200～300 microseconds；
4th step, configurable clock generator synchronous bus are output mode；
5th step, judge the stepping counter of relative time clock counts whether integral multiple equal to 5 and millisecond counter and microsecond
The counting of enumerator is equal to 0, as the most directly carried out the 6th step；The most then by ethernet channel and SNTP(Simple
Network Time protocol SNTP) server is when carrying out network pair, pair time success after, will be
New clock, with absolute clock form write clock chip, writes specified memory region with relative time clock form simultaneously, then carries out the
Six steps；
6th step, when the second level rolling counters forward of relative time clock changes, by CAN use relative time clock form to respectively from
Instruction when plate sends broadcast pair, completes in 200～300 microseconds；
7th step, the millisecond counter judging relative time clock and microsecond enumerator the most respectively etc. 1 and 0, as the most directly carried out
8th step；The most then by clock synchronous bus, current output level is negated, then carry out the 8th step；
8th step, receive the SOE from plate active upload, store and select a good opportunity and upload main website；Return the 5th step circular flow；
Described from plate operating procedure it is:
Step one, power on after initialize the relative time clock that the form in internal memory is consistent with mainboard；
Step 2, configure 100 microsecond hardware and interrupt, and when controlling every time to enter interrupt processing state, by the microsecond of relative time clock
Enumerator adds 100 microseconds；When microsecond enumerator arrives 1000, millisecond counter adds 1, simultaneously microsecond counter O reset；When milli
When second enumerator arrives 60000, stepping counter adds 1, and millisecond counter resets simultaneously；
Step 3, the traffic rate of configuration CAN mate with mainboard traffic rate；
Step 4, configurable clock generator synchronous bus are input pattern；
Step 5, by CAN receive mainboard send broadcast pair time instruction, write relative time clock region of memory；
Step 6, judge whether level negates clock synchronous bus, as the most directly carried out step 7；The most then millisecond is counted
Device and microsecond enumerator are respectively modified as 1 and 0, then carry out step 7；
Step 7, judge remote signalling state whether occur displacement and exceed the stabilization time, as otherwise returned step 5, the most then take work as
The time of front relative time clock generates SOE and is uploaded to mainboard by CAN, returns again to step 5.
Due to the fact that and take following unique technological means, therefore significantly improve intelligent network lotus interactive terminal entirety
SOE resolution:
1, the Optimum Matching on the one hand traffic rate achieving CAN and clock synchronous bus is up to 1MbpsCAN longitudinally
There is the call duration time of 200-300 microsecond, and respectively the time of message determined by the running status that its program is current when plate process pair,
Being usually present 100-200 microsecond error, therefore synthetic error is up to 300-500 microsecond.Eliminating this synthetic error relies on clock same
Step bus has been mated with CAN.After the present invention completes once CAN pair, synchronize at first millisecond of moment clock
Bus starts synchronizing signal the most immediately, keeps Tong Bu, the most between the two with mainboard after being reset by its corresponding microsecond timer
Achieve Optimum Matching.
2, introduce microsecond timing, make clock be provided with minimum scale the most accurately, fixed with the Millisecond of prior art
Time compare, the synchronization of " millisecond " level can be guaranteed with the synchronization operational precision of Microsecond grade.
3, the CAN interval synchronizing signal of 1 second can avoid the impact of components and parts individual variation safely, it is ensured that realizes
Millisecond synchronizes.
Accompanying drawing explanation
The present invention is further illustrated below in conjunction with the accompanying drawings.
Fig. 1 is the mainboard operational flow diagram of one embodiment of the invention.
Fig. 2 be one embodiment of the invention from plate operational flow diagram.
Sequential chart when Fig. 3 is SNTP pair of Fig. 1, Fig. 2 embodiment.
Sequential chart when Fig. 4 is the high-speed CAN bus/clock synchronous bus pair of Fig. 1, Fig. 2 embodiment.
Detailed description of the invention
Embodiment one
The present embodiment improves the method for intelligent network lotus interactive terminal many plates resolution by being respectively configured MCU, crystal oscillator, clock core
Sheet, a mainboard of memorizer and some from plate by CAN communication connection constitute intelligent network lotus interactive terminal, mainboard
And some between plate, it is further connected with clock synchronous bus.Mainboard runs shown in Figure 1, sequential, height when relate to SNTP pair
During speed CAN/clock synchronous bus pair, sequential sees Fig. 3, Fig. 4, and carrying out practically step is:
The first step, power on after read the absolute clock of clock chip immediately, absolute clock is made up of six parts: byYear uses 1
In byte representation year, byMonth used for the 1 byte representation moon, and byDay used for 1 byte representation day, when byHour uses 1 byte representation,
ByMinute uses 1 byte representation to divide, and bySecond used for 1 byte representation second, and absolute clock data structure is as follows:
Struct VAbsoluteClock/* absolute clock */
{
BYTE byYear;/ * */
BYTE byMonth;/ * month */
BYTE byDay;/ * day */
BYTE byHour;* during/*/
BYTE byMinute;/ * divide */
BYTE bySecond;/ * second */
};
Reading the absolute clock of clock chip and be converted to relative time clock form write specified memory region, relative time clock contains micro-
Second enumerator, millisecond counter and stepping counter.It is specially after reading absolute clock success, absolute clock is converted to relatively
Block pattern, relative time clock represents the relative time clock number walked from 1 day January in 2000, relative time clock is write specified memory
Region.Relative time clock is made up of three partial contents: stepping counter dwMinute uses 4 bytes, represents from January 1st, 2000
The number of minutes risen；Millisecond counter wMSecond uses 2 bytes, represents the current millisecond number less than 1 minute；Microsecond enumerator
WUSecond uses 2 bytes, represents the current microsecond number less than 1 millisecond, and relative time clock data structure is as follows:
Struct VRelativeClock/* relative time clock */
{
DWORD dwMinute;/ * stepping counter, the number of minutes * from 1 day January in 2000/
WORD wMSecond;/ * millisecond counter, the millisecond number * less than 1 minute/
WORD wUSecond;/ * microsecond enumerator, the microsecond number * less than 1 millisecond/
};
Second step, configure 100 microsecond hardware and interrupt, and when controlling every time to enter interrupt processing state, by the microsecond of relative time clock
Enumerator wUSecond adds 100 microseconds；When microsecond enumerator wUSecond arrives 1000, millisecond counter wMSecond adds 1,
Microsecond enumerator wUSecond resets simultaneously；When millisecond counter wMSecond arrives 60000, stepping counter dwMinute
Adding 1, millisecond counter resets simultaneously；
3rd step, the traffic rate of configuration CAN are 1Mbps, and control communication and the process time of message during CAN broadcast pair
In 200～300 microseconds；
4th step, configurable clock generator synchronous bus are output mode；
5th step, judge the stepping counter dwMinute of relative time clock counts whether integral multiple equal to 5 and millisecond counting
The counting of device wMSecond and microsecond enumerator wUSecond is equal to 0, as the most directly carried out the 6th step；The most then by with
Too Netcom road and SNTP(Simple Network Time protocol SNTP) server carries out network pair
Time, pair time success after, will current up-to-date clock with absolute clock form write clock chip, simultaneously with the write of relative time clock form
Specified memory region, then carry out the 6th step；
6th step, when relative time clock dwMinute second level rolling counters forward change time (being equivalent to be spaced 1 second), total by CAN
Line uses relative time clock form to respectively instruction when plate sends broadcast pair, completes in 200～300 microseconds；
7th step, the millisecond counter wMSecond judging relative time clock and microsecond enumerator are no 1 and such as respectively of wUSecond
0, as the most directly carried out the 8th step；The most then by clock synchronous bus, current output level is negated, then carry out the 8th step；
8th step, receive the SOE from plate active upload, store and select a good opportunity and upload main website；Return the 5th step circular flow.
For reducing cost, connect with mainboard high-speed CAN bus, clock synchronous bus communications is each from the plate relative mainboard of configuration
Less, mainly include MCU, crystal oscillator etc., its corresponding running sees Fig. 2, particularly as follows:
Step one, power on after initialize the relative time clock that the form in internal memory is consistent with mainboard；
Step 2, configure 100 microsecond hardware and interrupt, and when controlling every time to enter interrupt processing state, by the microsecond of relative time clock
Enumerator wUSecond adds 100 microseconds；When microsecond enumerator wUSecond arrives 1000, millisecond counter wMSecond adds 1,
Microsecond enumerator wUSecond resets simultaneously；When millisecond counter wMSecond arrives 60000, stepping counter dwMinute
Adding 1, millisecond counter wMSecond resets simultaneously；
Step 3, the traffic rate of configuration CAN mate with mainboard traffic rate, enable to normally receive mainboard pair time
Instruction；
Step 4, configurable clock generator synchronous bus are input pattern；
Step 5, by CAN receive mainboard send broadcast pair time instruction, write relative time clock region of memory；
Step 6, judge whether level negates clock synchronous bus, as the most directly carried out step 7；The most then millisecond is counted
Device and wMSecond microsecond enumerator wUSecond are respectively modified as 1 and 0, then carry out step 7；
Step 7, judge remote signalling state whether occur displacement and exceed the stabilization time, as otherwise returned step 5, the most then take work as
The time of front relative time clock generates SOE and is uploaded to mainboard by CAN, returns again to step 5.
So, CAN and clock synchronous bus obtain Perfect Matchings, after completing once CAN pair, at first millisecond
Moment clock synchronous bus coordinates startup synchronizing signal the most immediately, corresponding microsecond timer clearing is processed, and mainboard keeps
Synchronize.Microsecond timer ensure that the synchronization of " millisecond " as the minimum scale of clock.And CAN is spaced the synchronization letter of 1 second
Number eliminate the impact of individual variation between components and parts, further ensure Millisecond and synchronize.Visible, the present embodiment is properly settled
Long-standing non-precise synchronization problem between the intelligent network many plates of lotus interactive terminal, and then it is many to improve intelligent network lotus interactive terminal
Plate resolution, the operational decisions for power system provides data message accurately and reliably.
Claims (3)
1. the method improving intelligent network lotus interactive terminal many plates resolution, by be respectively configured MCU, crystal oscillator, clock chip,
One mainboard of memorizer and some from the intelligent network lotus interactive terminal that plate is consisted of CAN communication connection, its feature
It is: described mainboard and some be further connected with clock synchronous bus between plate；
Described mainboard operating procedure is:
The first step, power on after read clock chip absolute clock and be converted to relative time clock form write specified memory region；
Described relative time clock contains microsecond enumerator, millisecond counter and stepping counter；
Second step, configure 100 microsecond hardware and interrupt, and when controlling every time to enter interrupt processing state, by the microsecond of relative time clock
Enumerator adds 100 microseconds；When microsecond enumerator arrives 1000, millisecond counter adds 1, simultaneously microsecond counter O reset；When milli
When second enumerator arrives 60000, stepping counter adds 1, and millisecond counter resets simultaneously；
3rd step, the traffic rate of configuration CAN are 1Mbps, and control communication and the process time of message during CAN broadcast pair
In 200～300 microseconds；
4th step, configurable clock generator synchronous bus are output mode；
5th step, judge the stepping counter of relative time clock counts whether integral multiple equal to 5 and millisecond counter and microsecond
The counting of enumerator is equal to 0, as the most directly carried out the 6th step；The most then carried out with SNTP server by ethernet channel
During network pair, pair time success after, will current up-to-date clock with absolute clock form write clock chip, while with relative time clock lattice
Formula write specified memory region, then carry out the 6th step；
6th step, when the second level rolling counters forward of relative time clock changes, by CAN use relative time clock form to respectively from
Instruction when plate sends broadcast pair, completes in 200～300 microseconds；
7th step, the millisecond counter judging relative time clock and microsecond enumerator the most respectively etc. 1 and 0, as the most directly carried out
8th step；The most then by clock synchronous bus, current output level is negated, then carry out the 8th step；
8th step, receive the SOE from plate active upload, store and select a good opportunity and upload main website；Return the 5th step circular flow；
Described from plate operating procedure it is:
Step one, power on after initialize the relative time clock that the form in internal memory is consistent with mainboard；
Step 2, configure 100 microsecond hardware and interrupt, and when controlling every time to enter interrupt processing state, by the microsecond of relative time clock
Enumerator adds 100 microseconds；When microsecond enumerator arrives 1000, millisecond counter adds 1, simultaneously microsecond counter O reset；When milli
When second enumerator arrives 60000, stepping counter adds 1, and millisecond counter resets simultaneously；
Step 3, the traffic rate of configuration CAN mate with mainboard traffic rate；
Step 4, configurable clock generator synchronous bus are input pattern；
Step 5, by CAN receive mainboard send broadcast pair time instruction, write relative time clock region of memory；
Step 6, judge whether level negates clock synchronous bus, as the most directly carried out step 7；The most then millisecond is counted
Device and microsecond enumerator are respectively modified as 1 and 0, then carry out step 7；
Step 7, judge remote signalling state whether occur displacement and exceed the stabilization time, as otherwise returned step 5, the most then take work as
The time of front relative time clock generates SOE and is uploaded to mainboard by CAN, returns again to step 5.
A kind of method improving intelligent network lotus interactive terminal many plates resolution, it is characterised in that: institute
State absolute clock data structure as follows:
Struct VAbsoluteClock/* absolute clock */
{
BYTE byYear;/ * */
BYTE byMonth;/ * month */
BYTE byDay;/ * day */
BYTE byHour;* during/*/
BYTE byMinute;/ * divide */
BYTE bySecond;/ * second */
}。
A kind of method improving intelligent network lotus interactive terminal many plates resolution the most according to claim 1 or claim 2, its feature exists
In: described relative time clock data structure is as follows:
Struct VRelativeClock/* relative time clock */
{
DWORD dwMinute;/ * stepping counter, the number of minutes * from 1 day January in 2000/
WORD wMSecond;/ * millisecond counter, the millisecond number * less than 1 minute/
WORD wUSecond;/ * microsecond enumerator, the microsecond number * less than 1 millisecond/
}。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610636025.XA CN106230577B (en) | 2016-08-05 | 2016-08-05 | Method for improving resolution ratios of multiple boards of intelligent network charge interactive terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610636025.XA CN106230577B (en) | 2016-08-05 | 2016-08-05 | Method for improving resolution ratios of multiple boards of intelligent network charge interactive terminal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106230577A true CN106230577A (en) | 2016-12-14 |
| CN106230577B CN106230577B (en) | 2017-05-24 |
Family
ID=57547735
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610636025.XA Active CN106230577B (en) | 2016-08-05 | 2016-08-05 | Method for improving resolution ratios of multiple boards of intelligent network charge interactive terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106230577B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1801023A (en) * | 2005-11-14 | 2006-07-12 | 杨卫民 | Multi-event sequential recording and testing system |
| CN102081400A (en) * | 2011-02-17 | 2011-06-01 | 北京和利时系统工程有限公司 | Sequence of event (SOE) recording module and adjusting method thereof |
| CN105450323A (en) * | 2015-11-11 | 2016-03-30 | 杭州和利时自动化有限公司 | SOE time synchronization control method and system |
-
2016
- 2016-08-05 CN CN201610636025.XA patent/CN106230577B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1801023A (en) * | 2005-11-14 | 2006-07-12 | 杨卫民 | Multi-event sequential recording and testing system |
| CN102081400A (en) * | 2011-02-17 | 2011-06-01 | 北京和利时系统工程有限公司 | Sequence of event (SOE) recording module and adjusting method thereof |
| CN105450323A (en) * | 2015-11-11 | 2016-03-30 | 杭州和利时自动化有限公司 | SOE time synchronization control method and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106230577B (en) | 2017-05-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103248471B (en) | Clock synchronizing method based on PTP protocol Yu Reflective memory network | |
| CN110493744A (en) | A kind of synchronous data sampling method and system of master-slave radio sensor | |
| CN203166515U (en) | Large-scale regional inter-power-grid splitting control system | |
| CN201532575U (en) | Timing system of distributive industrial monitoring apparatus | |
| EP2619935B1 (en) | Device and method for providing a global time infomration in an event controlled bus communication | |
| EP3170285B1 (en) | Method for determining a propagation time of a telegram in a communication network, and corresponding network components | |
| EP3155736B1 (en) | Method for transmission of timing messages in a communication network, network component and communication network | |
| CN105071535B (en) | A kind of the time synchronization management system and implementation method of network system | |
| US9324122B2 (en) | Voting scheme for time alignment | |
| CN105049146A (en) | Accurate clock synchronization time-setting method for large PLC system | |
| CN109302255A (en) | Time synchronization control method, device, system and computer readable storage medium | |
| CN108206683A (en) | A kind of dynamic compensated pulse circuit | |
| CN112671598B (en) | Special algorithm hardware module for electric power suitable for electric power system control protection device | |
| CN106230577A (en) | A kind of method improving intelligent network lotus interactive terminal many plates resolution | |
| CN104994034B (en) | A kind of receiving/transmission method of the point-to-point SV messages of combining unit | |
| CN104901758A (en) | Double-plane clock synchronization method applied to wide-area protection control system | |
| CN205986916U (en) | Improve terminal of many boards of intelligent network lotus interactive terminal resolution ratio | |
| CN110429558A (en) | A kind of three-phase recording, which synchronizes, looks for point methods, device and equipment | |
| CN106385299B (en) | The master-salve clock synchronous method of intelligent substation maintenance service category information background stream | |
| CN205195718U (en) | Embedded network synchronization system based on FPGA | |
| CN105388780B (en) | A kind of IRIG-B000 code simulator | |
| CN111314006B (en) | Time delay curve fitting method based on non-time-scale out-of-limit data transmission | |
| CN205450869U (en) | Clock synchronization circuit between multimode group | |
| CN105610633A (en) | Self-sampling system and method for real-time performance in communication equipment | |
| CN109586978B (en) | Bus topology network ad hoc network method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20231225 Address after: No. 128, Jiangjun Avenue, Jiangning District, Nanjing, Jiangsu 210000 Patentee after: JIANGSU SUYUAN GUANGYI SCIENCE & TECHNOLOGY Co.,Ltd. Address before: No.86 runqi Road, Dongshan street, Jiangning District, Nanjing City, Jiangsu Province 211103 Patentee before: ELEFIRST SCIENCE & TECH Co.,Ltd. |
|
| TR01 | Transfer of patent right |