CN205986916U - Improve terminal of many boards of intelligent network lotus interactive terminal resolution ratio - Google Patents

Improve terminal of many boards of intelligent network lotus interactive terminal resolution ratio Download PDF

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Publication number
CN205986916U
CN205986916U CN201620999171.4U CN201620999171U CN205986916U CN 205986916 U CN205986916 U CN 205986916U CN 201620999171 U CN201620999171 U CN 201620999171U CN 205986916 U CN205986916 U CN 205986916U
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mcu
clock
terminal
bus
intelligent network
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CN201620999171.4U
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戴成涛
王义辉
李贵清
陈二利
高阳
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Elefirst Science & Tech Co Ltd
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Elefirst Science & Tech Co Ltd
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Abstract

The utility model provides an improve terminal of many boards of intelligent network lotus interactive terminal resolution ratio, including configuration MCU, the crystal oscillator, clock chip, a mainboard and a plurality of slave plate of memory and memory, connect through CAN bus communication between mainboard and the slave plate, the CAN bus includes CAN communication chip and opto -coupler, the CAN bus is connected through CAN communication chip to MCU's TTL level end, realize MCU's TTL level signal and the difference level signal's in the CAN bus interconversion, light coupling connects MCU's IO mouth line, and the signal of telecommunication that sends MCU turns into the light signal to trun into electric signal transmission to slave plate once more to, MCU's IIC bus connection clock chip realizes reading and setting up of the interior absolute clock of clock chip, MCU connects the memory through 16 data bus, realizes the storage of the interior relative clock of clock chip and reads. This terminal has realized that the optimum of CAN bus and clock synchronization bus matches to introduced the microsecond and regularly ensured the synchronization of " millisecond " level, shown and improving the holistic SOE resolution ratio to intelligent network lotus interactive terminal.

Description

A kind of terminal improving intelligent network lotus interactive terminal many plates resolution
Technical field
This utility model is related to one kind and puies forward high-resolution terminal, especially a kind of raising many plates of intelligent network lotus interactive terminal The terminal of resolution, belongs to network communication technology field.
Background technology
Intelligent network lotus interactive terminal is a kind of high- speed network communication that is based on for the purpose of quick response, for a plurality of confession distribution The collection of circuit electric parameters, the real-tune TT & C device controlling.Intelligent network lotus interactive terminal is led to from plate by one piece of mainboard and some pieces Cross high-speed CAN bus to connect and compose(Referring to application number 201310124359.5, title《A kind of net lotus based on intelligent grid is mutual Dynamic multidimensional runs terminal》Chinese patent literature), mainboard is responsible for and master station communication, is responsible for collection from plate and includes one in power distribution room Secondary device running status, control device actuating signal and warning signal are in the data such as the remote measurement of interior various events, remote signalling amount letter Breath.The correctness of these information directly affects the method for operation of terminal and the decision-making of dispatcher, the safety and stability to electrical network Run significant.
At present, the continuous development of electric power terminal is to SOE(Sequence Of Event, i.e. event sequence)Resolution will Seek more and more higher although the resolution problem of single plate SOE solves substantially(Referring to Application No. 201310627487.1, title For《A kind of method improving remote terminal unit SOE temporal resolution》Chinese patent literature), but because each plate is using independent Processor and crystal oscillator, and the individual variation between these components and parts cannot ensure that the clock between many plates reaches Millisecond synchronization, because The resolution problem of this many plate SOE is not properly settled all the time, and result is differentiated to the overall SOE of intelligent network lotus interactive terminal Rate has a negative impact.
Utility model content
The purpose of this utility model is:The problem existing for above-mentioned prior art, when proposing a kind of guarantee between many plates The conforming terminal improving intelligent network lotus interactive terminal many plates resolution of clock, thus provide more for the operational decisions of electric power terminal For accurately and reliably data message.
In order to reach object above, provide a kind of terminal improving intelligent network lotus interactive terminal many plates resolution, including joining Put MCU, crystal oscillator, clock chip, memorizer and internal memory a mainboard and some from plate, mainboard and between plate pass through CAN total Line communication connects, and CAN includes CAN communication chip and optocoupler, and the Transistor-Transistor Logic level end of MCU connects CAN by CAN communication chip Bus, for realizing the mutual conversion of the differential level signal on the Transistor-Transistor Logic level signal and CAN of MCU;Optocoupler connects MCU I O port line, for MCU is sent the signal of telecommunication be converted into optical signal, and be returned to electric signal transmission to from plate;MCU's Iic bus connect clock chip, for realizing the reading of absolute clock and setting in clock chip;It is total that MCU passes through 16 data Line connects internal memory, for realizing the storage of relative time clock and reading in clock chip.
Preferred version of the present utility model is:Model STM32F407ZET6 of MCU, the model of CAN communication chip SN65HVD235D, model TLP185GB of optocoupler, model RX-8025T of clock chip, the model of internal memory MT47H32M16HR-25EIT:G.
Preferably, MCU connects main website and SNTP server respectively by ethernet communication chip, for network number on MCU According to transmission, realize SOE network and report, during SNTP network pair.
It is highly preferred that model DP83848IVV of ethernet communication chip.
Preferably, crystal oscillator connects the crystal oscillator end of MCU, for providing timeticks for MCU, realizes interrupt processing.
It is highly preferred that model SMAC3225-12MHz of crystal oscillator.
Preferably, relative time clock includes microsecond enumerator, millisecond counter and stepping counter, microsecond enumerator, millisecond Enumerator and stepping counter have data and go forward one by one step by step state.
This utility model has the beneficial effect that:
1st, achieve CAN and the Optimum Matching one side traffic rate of clock synchronous bus is up to 1MbpsCAN Longitudinally there is a call duration time of 200-300 microsecond, and the time of each message when plate is processed pair is by the current running status of its program Determine, be usually present 100-200 microsecond error, therefore synthetic error is up to 300-500 microsecond.When eliminating the dependence of this synthetic error Clock synchronous bus was completed with mating of CAN.After the completion of the present invention is when CAN pair, in first millisecond of moment clock Synchronous bus just starts synchronizing signal immediately, will its corresponding microsecond timer reset after keep synchronous with mainboard, therefore both Between achieve Optimum Matching.
2nd, introduce microsecond timing, make clock be provided with more accurately minimum scale, fixed with the Millisecond of prior art When compare, the synchronization of " millisecond " level can be guaranteed with the synchronous operational precision of Microsecond grade.
3rd, the CAN interval synchronizing signal of 1 second can safely avoid the impact of components and parts individual variation it is ensured that realizing Millisecond is synchronous.
Brief description
Below in conjunction with the accompanying drawings this utility model is further described.
Fig. 1 is structural schematic block diagram of the present utility model.
Specific embodiment
Embodiment one
A kind of terminal of raising intelligent network lotus interactive terminal many plates resolution that the present embodiment provides, as shown in figure 1, include Configuration MCU, crystal oscillator, a mainboard of clock chip, memorizer and internal memory and some from plate, mainboard and between plate pass through CAN Bus communication connects, and CAN includes CAN communication chip and optocoupler, and the Transistor-Transistor Logic level end of MCU is connected by CAN communication chip CAN, for realizing the mutual conversion of the differential level signal on the Transistor-Transistor Logic level signal and CAN of MCU;Optocoupler connects The I O port line of MCU, for MCU is sent the signal of telecommunication be converted into optical signal, and be returned to electric signal transmission to from plate; The iic bus of MCU connect clock chip, for realizing the reading of absolute clock and setting in clock chip;MCU passes through 16 digits Connect internal memory according to bus, for realizing the storage of relative time clock and reading in clock chip.
Model STM32F407ZET6 of MCU, model SN65HVD235D of CAN communication chip, the model of optocoupler TLP185GB, model RX-8025T of clock chip, model MT47H32M16HR-25EIT of internal memory:G.
MCU connects main website and SNTP server respectively by ethernet communication chip, for the biography of network data on MCU Defeated, realize SOE network and report, during SNTP network pair.
Model DP83848IVV of ethernet communication chip.
Crystal oscillator connects the crystal oscillator end of MCU, for providing timeticks for MCU, realizes interrupt processing.
It is highly preferred that model SMAC3225-12MHz of crystal oscillator.
Relative time clock includes microsecond enumerator, millisecond counter and stepping counter, microsecond enumerator, millisecond counter and Stepping counter has data and goes forward one by one step by step state, and configuration 100 microsecond hardware interrupt, and controls the interrupt processing state that enters every time When, the microsecond enumerator of relative time clock is added 100 microseconds;When microsecond enumerator reaches 1000, millisecond counter adds 1, simultaneously Microsecond counter O reset;When millisecond counter reaches 60000, stepping counter adds 1, and millisecond counter resets simultaneously.
Integral multiple and millisecond counter and the microsecond meter whether being equal to 5 is counted in the stepping counter judging relative time clock The counting of number device is equal to 0, such as otherwise adopts relative time clock form to each instruction when plate sends broadcast pair by CAN, Complete in 200~300 microseconds;Then pass through ethernet channel and SNTP in this way(Simple Network Time protocol SNTP)When server carries out network pair, pair when success after, currently up-to-date clock is write with absolute clock form Enter clock chip, specified memory region is write with relative time clock form simultaneously, then relative time clock form pair is adopted by CAN Each instruction when plate sends broadcast pair, completes in 200~300 microseconds;
Judge the millisecond counter of relative time clock and microsecond enumerator whether respectively etc. 1 and 0, such as otherwise directly receive from The SOE of plate active upload, store and select a good opportunity upload main website;Then by clock synchronous bus, current output level is negated in this way, Receive the SOE from plate active upload again, store and select a good opportunity upload main website cycle criterion.
Achieve CAN and the Optimum Matching one side traffic rate up to 1MbpsCAN of clock synchronous bus indulges To the call duration time having 200-300 microsecond, and respectively when plate process pair, the time of message is determined by the current running status of its program Fixed, it is usually present 100-200 microsecond error, therefore synthetic error is up to 300-500 microsecond.Eliminate this synthetic error and rely on clock Synchronous bus was completed with mating of CAN.After the completion of the present invention is when CAN pair, same in first millisecond of moment clock Step bus just starts synchronizing signal immediately, will its corresponding microsecond timer reset after keep synchronous with mainboard, therefore both it Between achieve Optimum Matching.
In addition to the implementation, this utility model can also have other embodiment.All employing equivalents or equivalent change Change the technical scheme of formation, all fall within the protection domain of this utility model requirement.

Claims (7)

1. a kind of terminal improving intelligent network lotus interactive terminal many plates resolution, including configuration MCU, crystal oscillator, clock chip, storage One mainboard of device and internal memory and some from plate, described mainboard and described between plate by CAN communicate connect, its feature It is, described CAN includes CAN communication chip and optocoupler, and the Transistor-Transistor Logic level end of described MCU is by described CAN communication chip even Connect described CAN, for realizing the mutual of differential level signal on the Transistor-Transistor Logic level signal and described CAN of described MCU Conversion;Described optocoupler connects the I O port line of described MCU, for described MCU is sent the signal of telecommunication be converted into optical signal, and again Secondary switch to electric signal transmission to described from plate;The iic bus of described MCU connect described clock chip, are used for realizing clock chip The reading of interior absolute clock and setting;Described MCU passes through 16 bit data bus and connects described internal memory, is used for realizing in clock chip The storage of relative time clock of conversion and reading.
2. according to claim 1 a kind of improve intelligent network lotus interactive terminal many plates resolution terminal it is characterised in that Model STM32F407ZET6 of described MCU, model SN65HVD235D of described CAN communication chip, the type of described optocoupler Number be TLP185GB, model RX-8025T of described clock chip, model MT47H32M16HR-25EIT of described internal memory: G.
3. according to claim 1 a kind of improve intelligent network lotus interactive terminal many plates resolution terminal it is characterised in that Described MCU connects main website and SNTP server respectively by ethernet communication chip, for the biography of network data on described MCU Defeated, realize SOE network and report, during SNTP network pair.
4. according to claim 3 a kind of improve intelligent network lotus interactive terminal many plates resolution terminal it is characterised in that Model DP83848IVV of described ethernet communication chip.
5. according to claim 1 a kind of improve intelligent network lotus interactive terminal many plates resolution terminal it is characterised in that Described crystal oscillator connects the crystal oscillator end of described MCU, for providing timeticks for MCU, realizes interrupt processing.
6. according to claim 5 a kind of improve intelligent network lotus interactive terminal many plates resolution terminal it is characterised in that Model SMAC3225-12MHz of described crystal oscillator.
7. a kind of terminal improving intelligent network lotus interactive terminal many plates resolution according to claim 1, when described relative Clock includes microsecond enumerator, millisecond counter and stepping counter, described microsecond enumerator, described millisecond counter and described point Level enumerator has data and goes forward one by one step by step state.
CN201620999171.4U 2016-08-31 2016-08-31 Improve terminal of many boards of intelligent network lotus interactive terminal resolution ratio Active CN205986916U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108258680A (en) * 2017-12-29 2018-07-06 江苏方天电力技术有限公司 A kind of universal distributed fast cut back interface arrangement

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108258680A (en) * 2017-12-29 2018-07-06 江苏方天电力技术有限公司 A kind of universal distributed fast cut back interface arrangement

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