CN106229407A - A kind of high concordance resistance-variable storing device and preparation method thereof - Google Patents

A kind of high concordance resistance-variable storing device and preparation method thereof Download PDF

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CN106229407A
CN106229407A CN201610809598.8A CN201610809598A CN106229407A CN 106229407 A CN106229407 A CN 106229407A CN 201610809598 A CN201610809598 A CN 201610809598A CN 106229407 A CN106229407 A CN 106229407A
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resistance
storing device
variable storing
metal
electrode
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CN106229407B (en
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蔡茂
蔡一茂
王宗巍
黄如
康健
方亦陈
喻志臻
杨雪
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Peking University
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/041Modification of switching materials after formation, e.g. doping
    • H10N70/043Modification of switching materials after formation, e.g. doping by implantation

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  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

The present invention provides a kind of high conforming resistive memory and preparation method thereof, belongs to cmos vlsi technical field.This resistance-variable storing device includes substrate and the bottom electrode resistance changing film upper electrode arrangement being positioned on substrate, bottom electrode is positioned at substrate, being resistance changing film between upper and lower electrode, the local doping metals of described resistance changing film, described doped region is 50% the 10% of device working region.The passage on earth of resistance-variable storing device of the present invention is more prone to form fusing in the region of localization doping, thus randomly generating and fusing of conductive channel is limited in the region adulterated in local, effectively reduce the randomness of conductive channel, thus improve the concordance of resistance-variable storing device.

Description

A kind of high concordance resistance-variable storing device and preparation method thereof
Technical field
The invention belongs in quasiconductor (semiconductor) and cmos vlsi (ULSI) is non-volatile Property memorizer (Non-volatile Memory) technical field, is specifically related to one and has high conforming resistance-variable storing device The device structure design of (resistive random access memory) and preparation method thereof.
Background technology
Since transistor invention, the development of semiconductor and IC technology promotes whole information industry or even science and technology Progress.Since nearly half a century, it then follows the prediction of Moore's Law, memory device integrated level based on CMOS technology is with every 18 The speed that the moon doubles quickly increases.Constantly reduce however as characteristic size, after nano-scale node, at present The size reduction of main flow memorizer is all up to the limit.Tradition non-volatility memorizer faces during size persistently reduces Increasing challenge, the random fluctuation such as parameter dramatically increases, and integrity problem is increasingly serious.Account for Vehicles Collected from Market main The flash memory (flash) of share, due to the restriction at aspects such as size reduction, power consumption and speed, can not fully meet non-volatile Property memorizer development requirement.Various new non-volatility memorizer technology is arisen at the historic moment, including ferroelectric memory (FeRAM), Magnetic memory (MRAM), phase transition storage (PRAM), resistance-variable storing device (RRAM) etc..Resistance-variable storing device is in high integration, low merit The advantage of the aspects such as consumption and read or write speed has made the contenders in memorizer of new generation.But the skill that RRAM is current Art development also has certain gap from reality application, and its technological challenge faced specifically includes that device consistency problem, switching speed Optimize.The present invention i.e. proposes solution for problem above.
Resistance-variable storing device relies on and realizes high-impedance state (" 0 " state) and low resistance state (" 1 " shape under different applied voltage excitation State) between reversible State Transferring, high-impedance state and low resistance state can be kept after removing voltage drive, thus realize the non-of data Volatile storage.Resistance-variable storing device is made up of the sandwich structure of the metal-change resistance layer-metal of simple in construction, therefore can lead to Cross simple crossbar structure to realize ultra-large and very high-density resistance-variable storing device array, reduce owing to increasing crystalline substance Body pipe is as the area consumption selecting pipe to be brought, and its characteristic size area can be reduced to 4F2.Additionally, integration density is permissible Form 3D structure by stacked multilayer crossbar structure further and obtain huge lifting.
Yet with the feature randomly generating and fusing that has of the conductive channel in resistance-variable storing device, device therefore can be caused The concordance of part comes into question, the parameters of i.e. corresponding resistive, as operation voltage, high-impedance state and low resistance state resistance etc. can be not Fluctuate with in device switching process different with same device.It is integrated close that the characteristic of this instability constrains resistance-variable storing device The raising of degree, too increases the difficulty of periphery circuit design simultaneously, therefore reduces device undulatory property, boost device concordance for The commercial application of resistance-variable storing device has great significance.The present invention i.e. proposes solution party mainly for above consistency problem Case.
Summary of the invention
The present invention proposes a kind of based on using traditional cmos process to realize having high conforming resistive memory, To reducing the brought problem that randomly generates and fuse of resistance-variable storing device conductive channel.
The technical solution used in the present invention is as follows:
A kind of high concordance resistance-variable storing device, electric including substrate and the lower electrode-resistance changing film-upper strata being positioned on substrate Electrode structure, lower electrode is positioned at substrate, is resistance changing film between upper and lower layer electrode, and doped region is device working region 50% the 10% of (the resistance changing film region between upper/lower electrode).
Further, doped region is positioned at the center of device working region.
Further, described doping metals is element ordinal more than the element of metal in metal-oxide in resistive material Ordinal number.
Further, the metal-doped dosage range (10 of resistance changing film10—1025/cm3), design parameter can be according to device The scope of part operation electric current carries out calculating adjustment.
Further, described electrode-change resistance layer-electrode structure can be Metal-Insulator-Metal capacitance structure, Metal-Semiconductor-Metal capacitance structures etc., use simple " sandwich " structure.
Alternatively, described electrode is realized by semiconductor CMOS process by metal material.Described electrode can use multiple gold Belong to material, such as Ti, Al, Au, W, Cu and TiN etc..
Alternatively, described resistance changing film i.e. intermediate functional layer can use the transition metal oxide with excellent resistive characteristic And other oxides, such as TaOx、HfOx、SiOx, or SrTiO3Deng;May be used without organic material, such as parylene etc..
Alternatively, described substrate can use Si or SiO2Substrate.
The method that another object of the present invention is to prepare above-mentioned high concordance resistance-variable storing device, comprises the steps:
1) on substrate, define the figure of bottom electrode;Use the method deposit metal of magnetron sputtering, peel off and form lower electricity Pole;
2) mode of sputtering is used to deposit resistance changing film;
3) photoetching is utilized to define the region of local doping on a photoresist;
4) mode of ion implanting is used to carry out metal-doped to resistance changing film;
5) electrode and bottom electrode fairlead figure in definition, deposits metal electrode, peels off the upper electrode of formation and bottom electrode draws Portal, prepare resistance-variable storing device as claimed in claim 1.
The present invention improves the concordance of resistance-variable storing device not by the simple impurity that introduces, but passes through localization Doped metallic elements, by being locally implanted region, Implantation Energy, implantation dosage and choosing this four dimensions of special metal element ginseng The common effect of number, thus reach to improve the conforming purpose of device.By optimizing and revising of above parameter, resistance-variable storing device Passage is more prone to form fusing in the region of localization doping on earth, thus by the restriction that randomly generates and fuse of conductive channel In the region of local doping, effectively reduce the randomness of conductive channel, thus improve the concordance of resistance-variable storing device.Resistive Store conforming raising the integration density of storage array and the scale of mass production of resistance-variable storing device are had great significance.
Accompanying drawing explanation
Fig. 1 present invention uses current-voltage (I-V) characteristic of its resistive process that traditional DC Sweep mode obtains to show It is intended to;
Fig. 2-6 is corresponding to the enforcement step of embodiment;
Fig. 7 is the legend of Fig. 2-Fig. 6;
Fig. 8 is embodiment of the present invention experimental result schematic diagram.
Detailed description of the invention
Below in conjunction with the accompanying drawings and specific embodiment, the present invention is described further.
Example below is respectively adopted TaOxRealize high concordance resistive with Au deposit respectively as change resistance layer and injection element The preparation of memory device.Provide the material that critical process step is used, and provide the embodiment of high concordance resistive memory.
Resistance-variable storing device based on tantalum oxide has the memory performance of excellence, including durability, ultrafast the opening of superelevation Close speed and good retention performance.Additionally, tantalum oxide also has the features such as heat stability height, chemical property torpescence.Gold is made For highly stable inert metal element, being incorporated in tantalum oxide as impurity can be not oxidized, such that it is able at specific bar Formed nanocrystalline under part so that conductive channel tends to be formed and fusing along the region with gold doping.Two bi-materials Dominant Facies combines, and adds the design of physical mechanism aspect and the technological parameter of optimization, can realize improving resistance-variable storing device consistent The purpose of property, lifting and large-scale production for resistance-variable storing device crossbar array of structures integration density have important meaning Justice.
Specific embodiment is as follows:
1) select the backing material used, can select according to purposes;Such as select Si substrate;
2) lithographic definition goes out bottom electrode figure, and uses PVD or evaporation deposition lower metal electrode, and lower electrode material can be Pt, TaN, Ir etc., as shown in Figure 2;
3) PVD reactive sputtering method is used to prepare one layer of resistance changing film material: concrete material can be TaOx, HfOx etc., Thickness is between 30nm-100nm, as shown in Figure 3;
4) lithographic definition goes out the region of local doping, i.e. the symmetrical centre district in upper and lower electrode crossing (folding) region of device Territory, injecting area is that device area i.e. goes up 1/2nd of electrode area, and uses ion implanting to inject Au+Ion, such as Fig. 4 institute Show;
5) lithographic definition goes out bottom electrode fairlead, under using the method for dry etching to etch on the figure defining out Electrode fairlead, etch thicknesses is the resistive material deposited and the sum of energy band decorative layer material thickness, and removes photoresist, as Shown in Fig. 5;
6) electrode pattern in photoetching on the basis of superincumbent, and use PVD or evaporation deposition electrode of metal, upper electrode material Material can be Ta, TiN etc., peels off and forms upper electrode pattern, as shown in Figure 6.
For the resistance-variable storing device using said method to prepare, use its resistive mistake that traditional DC Sweep mode obtains Current-voltage (I-V) characteristic of journey is as shown in Figure 1: in figure 1 device under the excitation of forward voltage by high-impedance state to low-resistance The transition process of state;2 low resistance states keep process;3 devices under the excitation of negative voltage by low resistance state to high-impedance state Transition process;4 high-impedance states keep process.
Make the bottom electrode ground connection of device, then the voltage going up electrode can control the resistance of memorizer so that it is occur high resistant and Conversion between low-resistance, i.e. memorizer " 0 ", the conversion between " 1 " two states, it was demonstrated that can the resistive in the middle of electrode knot press from both sides The surface of layer realizes resistive effect should.As shown in Figure 8, the distribution table funerary objects part of operation voltage and high low resistance state has extraordinary one Cause property, it was demonstrated that the technical program can effectively improve the concordance of resistance-variable storing device.
Above example is only limited in order to technical scheme to be described, the ordinary skill of this area Technical scheme can be modified or equivalent by personnel, without departing from the spirit and scope of the present invention, and this The protection domain of invention should be as the criterion with described in claim.

Claims (10)

1. a resistance-variable storing device, it is characterised in that include substrate and the bottom electrode-resistance changing film-upper electrode being positioned on substrate Structure, bottom electrode is positioned at substrate, is resistance changing film between upper and lower electrode, the local doping metals of described resistance changing film, institute State that doped region is device working region 50% 10%.
2. resistance-variable storing device as claimed in claim 1, it is characterised in that described doped region is positioned in device working region Heart position.
3. resistance-variable storing device as claimed in claim 1, it is characterised in that described bottom electrode-resistance changing film-upper electrode arrangement is Metal-Insulator-Metal capacitance structure or Metal-Semiconductor-Metal capacitance structure.
4. resistance-variable storing device as claimed in claim 1, it is characterised in that described resistance changing film uses the transition gold of resistive characteristic Belong to oxide.
5. resistance-variable storing device as claimed in claim 3, it is characterised in that transition metal oxide is TaOx、HfOx、SiOx, or Person SrTiO3
6. resistance-variable storing device as claimed in claim 3, it is characterised in that it is thin that described doping metals is that element ordinal is more than resistive The element ordinal of metal in the metal-oxide of film.
7. resistance-variable storing device as claimed in claim 1, it is characterised in that described resistance changing film uses organic material parylene。
8. resistance-variable storing device as claimed in claim 1, it is characterised in that described electrode uses Ti, Al, Au, W, Cu or TiN.
9. resistance-variable storing device as claimed in claim 1, it is characterised in that described substrate uses Si or SiO2Substrate.
10. a preparation method for resistance-variable storing device as claimed in claim 1, comprises the steps:
1) on substrate, define the figure of bottom electrode;Use the method deposit metal of magnetron sputtering, peel off and form bottom electrode;
2) mode of sputtering is used to deposit resistance changing film;
3) photoetching is utilized to define the region of local doping on a photoresist;
4) mode of ion implanting is used to carry out metal-doped to resistance changing film;
5) electrode and bottom electrode fairlead figure in definition, deposits metal electrode, peels off and forms upper electrode and bottom electrode fairlead, Prepare resistance-variable storing device as claimed in claim 1.
CN201610809598.8A 2016-09-08 2016-09-08 A kind of high consistency resistance-variable storing device and preparation method thereof Active CN106229407B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106910822A (en) * 2017-03-17 2017-06-30 电子科技大学 A kind of resistance changing film memory and preparation method thereof
CN113088912A (en) * 2021-04-05 2021-07-09 大连理工大学 Silicon-doped magnetron sputtering process for improving reliability of TaOx-based resistive random access memory
WO2022105606A1 (en) * 2020-11-19 2022-05-27 International Business Machines Corporation Resistive switching memory cell

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101257089A (en) * 2007-01-04 2008-09-03 三星电子株式会社 Resistive random access memory and manufacturing method for the same
CN101826598A (en) * 2010-05-05 2010-09-08 北京大学 Polymorphic organic resistive random access memory and preparation method
CN103117359A (en) * 2013-02-07 2013-05-22 北京大学 High-reliability nonvolatile memory and preparation method thereof
CN103227284A (en) * 2013-05-09 2013-07-31 北京大学 High-consistency high-speed resistive random access memory (RRAM) and producing method thereof
CN103594622A (en) * 2013-11-28 2014-02-19 北京大学 High-consistency resistive random access memory structure and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101257089A (en) * 2007-01-04 2008-09-03 三星电子株式会社 Resistive random access memory and manufacturing method for the same
CN101826598A (en) * 2010-05-05 2010-09-08 北京大学 Polymorphic organic resistive random access memory and preparation method
CN103117359A (en) * 2013-02-07 2013-05-22 北京大学 High-reliability nonvolatile memory and preparation method thereof
CN103227284A (en) * 2013-05-09 2013-07-31 北京大学 High-consistency high-speed resistive random access memory (RRAM) and producing method thereof
CN103594622A (en) * 2013-11-28 2014-02-19 北京大学 High-consistency resistive random access memory structure and manufacturing method thereof

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106910822A (en) * 2017-03-17 2017-06-30 电子科技大学 A kind of resistance changing film memory and preparation method thereof
WO2022105606A1 (en) * 2020-11-19 2022-05-27 International Business Machines Corporation Resistive switching memory cell
US11456416B2 (en) 2020-11-19 2022-09-27 International Business Machines Corporation Resistive switching memory cell
GB2616558A (en) * 2020-11-19 2023-09-13 Ibm Resistive switching memory cell
CN113088912A (en) * 2021-04-05 2021-07-09 大连理工大学 Silicon-doped magnetron sputtering process for improving reliability of TaOx-based resistive random access memory
CN113088912B (en) * 2021-04-05 2021-12-07 大连理工大学 Silicon-doped magnetron sputtering process for improving reliability of TaOx-based resistive random access memory

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