CN106209148B - Multifunctional radio-frequency module common port system - Google Patents
Multifunctional radio-frequency module common port system Download PDFInfo
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- CN106209148B CN106209148B CN201610512120.9A CN201610512120A CN106209148B CN 106209148 B CN106209148 B CN 106209148B CN 201610512120 A CN201610512120 A CN 201610512120A CN 106209148 B CN106209148 B CN 106209148B
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Abstract
The invention discloses a kind of Multifunctional radio-frequency module common port systems, belong to field of communication technology.The present invention includes system control management module, general purpose interface bus module and general radio frequency module；Wherein system control management module is communicated by synchronous bus with general purpose interface bus module, and sending system message, control instruction and data are used for, while receiving and handling self-test, status information that general radio frequency module is reported by general purpose interface bus module；General purpose interface bus module is the bridge of system control management module and general radio frequency intermodule, the forwarding and processing of completion system control instruction and data forwarding；General radio frequency module is for the transmitting-receiving of radiofrequency signal, the modulation /demodulation of Up/Down Conversion, baseband signal, and executes the control instruction etc. that system control management module issues.The present invention is used for radio communication, navigation and monitoring system, can effectively reduce System Integration Test amount, improve the stability of system.
Description
Technical field
The invention belongs to fields of communication technology, and in particular to one kind being applied to composite type radio communication, navigation and monitoring
The Multifunctional radio-frequency module common port of system.
Background technology
Radio communication, navigation and monitoring system (hereinafter referred to as CNS systems) are the important sets of civil avionics system
At part, wherein communication function includes mainly empty day, vacant lot, absolutely empty speech and data communication；Navigation feature is responsible for aircraft
Process, long range radio navigation, satellite navigation, approach, anticollision alarm, air traffic control, function for monitoring are responsible for aircraft
The supervision of the monitoring and safety in course is referred to as aircraft due to core status of the CNS systems in civil avionics system
" ear " and " eyes ".It is several to experienced early stage formula, discrete, association type and composite type for CNS systems from the aspect of system architecture
A developing stage.The early stage formula CNS structure and function of system is relatively simple, meets some and flies and get in touch with substantially needs, mainly
Including equipment such as airborne station, telecompasses；With the end of World War II and the arrival of jet age, many countries greatly develop
There is airborne radar, Doppler and inertia self-aid navigation, electronic display unit, instrument-landing-system in avionics
Etc. new technologies, CNS systems enter the discrete epoch.After the 1970s with the promotion of scientific and technological revolution tide and computer,
Revolutionary leap has occurred in the development of data bus technology, CNS systems, and development cost is greatly lowered, system processing power
It increases substantially, and starts that digitization system is widely used, CNS systems enter the association type epoch；Up in the 1990s,
The CNS systems that digital information processing and transmission have been popularized very much start to develop to modularization, synthesization direction, in system mutually
Connection is increasingly complicated.It is with rear combined structure that Field Replaceable Unit (LRU) is representative and with external replaceable module (LRM)
The composite type structure of representative is two kinds of principal modes in this stage, and the latter is also referred to as synthetic aviation electronic (IMA).It is comprehensive
Formula CNS systems have the characteristics that open system architecture (OSA), synthesization, integrated, modularization, standardized, apply in civilian visitor
Very big benefit is produced on machine, improves seating plane radio communication, navigation and the reliability and robustness that monitor task, together
When also reduce the life cycle cost of aircraft.
Composite type CNS systems by signal processing flow be divided into antennal interface, radiofrequency signal exchange, radio-frequency front-end (including
Radio frequency RF excitation and reception), digital intermediate frequency exchanges, parts, the wherein antennal interface and radio frequency such as signal processing and data processing swash
Encourage, receiving portion is made of the radio-frequency module of a large amount of different frequency range, the control interface of these modules is received by system bus
The control instruction of system, to system sending module status system itself.If by each Module manufacturers designed, designed system control interface
Unit, each manufacturer's technical solution, circuit design are different, will produce problems with：1) intercommunication problem：Each Cheng Yan manufacturers design energy
Power, technical solution are different, and the general-purpose interface of design can in bus interface level, data/control sequential, data frame format, communication
Can be had differences by property etc., this species diversity can bring system bus robustness, stability adverse effect, and it is various not
Same interface level, signal transmitting and receiving format and requirement generates insurmountable communication issue to system-level joint conference；2) off-gauge
Communication interface increases design difficulty：Since the understanding of CNS system architectures, working method and control sequential is not filled by each Cheng Yan manufacturers
Point, it is difficult to ensure that designing the general-purpose interface that fault-tolerant ability is strong, reliable and stable, increase the difficulty of module design；3) system is surveyed
Examination is complicated：The test of communication interface is a complicated test, and the wherein projects such as interface level, data frame format are easy to be surveyed
Examination, but it is related to the error detection of communication interface integrality and robustness, test that is fault-tolerant, retransmitting the functions such as recovery, if each module
Interface design disunity and need to individually test, not only the construction of test environment is difficult, but also it is huge to test the complicated workload of content.
Invention content
The goal of the invention of the present invention is：In view of the above problems, provide that a kind of Multifunctional radio-frequency module is general to be connect
Port system, interaction and processing for CNS systems to each general radio frequency module data, control information.
The Multifunctional radio-frequency module common port system of the present invention, including system control management module, general purpose interface bus
Module and general radio frequency module；
System control management module communicated with general purpose interface bus module by synchronous bus, be used for sending system message,
Control instruction and data, while receiving and handling self-test, state that general radio frequency module is reported by general purpose interface bus module
Information；
General purpose interface bus module includes receiving counting unit, hair counting unit, data processing unit, Mathematical model control unit, multichannel
Multiplexing Unit receives number buffer unit, hair number buffer unit and bus control unit, wherein receives counting unit and is connect by synchronous bus
Frame load is sent to data processing unit, the frame information packet after frame information of the receipts from system control management module and parsing
Include system message, control command and data；Data processing unit parses frame load, parsing data is obtained, based on parsing
Data type is forwarded：Mathematical model control order is sent to Mathematical model control unit, it is single that baseband signal is sent to multiplexing
System message, bus control commands and parameter are sent to bus control unit by member by receiving number buffer unit；Wherein, digital-to-analogue
Control unit is used for general radio frequency module forwards Mathematical model control order；Multiplexer unit for data processing unit with it is general
The channel selecting of data transmission and multiplexing between radio-frequency module；Bus control unit is used for data processing unit and general radio frequency
The bus transfer of intermodule controls, as the parsing of bus communication protocol, data bit over-sampling are adjudicated, the setting of bus parameter (such as
Adaptive baud rate detection, data frame length, stop position control etc.)；Meanwhile bus control unit is received by bus from logical
It is forwarded to data processing unit with the self-test of radio-frequency module, status information, and by sending out number buffer unit；Data processing unit will
The self-test of reception, status information, which are packaged framing information and send, gives hair counting unit；Sending out counting unit will be from data processing unit
Frame information is sent to system by synchronous bus and controls management module；
General radio frequency module includes digital-to-analogue driving unit, D/A conversion unit, bus adaption unit, radio frequency pretreatment list
Member；Wherein, digital-to-analogue driving unit is used to complete the front end matching of digital-to-analogue conversion, the Mathematical model control that will be received from Mathematical model control unit
The running parameter of order control D/A conversion unit, and the baseband signal received from multiplexer unit is transmitted to digital-to-analogue conversion
Unit；D/A conversion unit is used for the digital-to-analogue or analog-to-digital conversion of baseband signal：In the state of transmission, the digital baseband of reception is believed
Number carrying out digital-to-analogue (DA) converts, and transformed analog baseband signal is sent to RF pre-processing unit；In reception state,
Modulus (AD) is carried out to the analog baseband signal from RF pre-processing unit to convert, and transformed digital baseband signal is led to
It crosses digital-to-analogue driving unit and is sent to multiplexer unit；Bus adaption unit is for general radio frequency module and general purpose interface bus mould
Bus interface adaptation between block, the parsing of bus data agreement, and the bus marco received by bus control unit is ordered
It enables and parameter is forwarded to RF pre-processing unit, control the running parameter of RF pre-processing unit；Bus adaption unit is logical simultaneously
Cross bus control unit, hair number change into unit, data processing unit, hair counting unit to system control management module passback self-test,
Status information.
RF pre-processing unit to the baseband signal received by D/A conversion unit carry out transmitting modulation treatment (including letter
The processing such as number modulation, up-conversion, signal filtering, power amplification) it is radiated by transmitting antenna；It is penetrated to what is received by reception antenna
Frequency signal carries out reception demodulation process (including signal demodulation, down coversion, useful signal extraction, signal filtering, power amplification etc.
Reason), it obtains analog baseband signal and is sent to D/A conversion unit.
Each BIT also to reception of data processing unit bus control unit of the general purpose interface bus module of the present invention
Over-sampling (such as 16 times, 32 times) is carried out, using BIT center position odd number pulses as sampling window, to adopting in window
Sample value carries out ballot judgement with each BIT of the level value of determination, effectively avoids unitary sampling uncertainty, reduces logical
Believe the bit error rate, improves the communication reliability of bus.
When the D/A conversion unit of the general radio frequency module of the present invention is AD converted analog baseband signal, using two-way
ADC is sampled respectively and multiplexed unit is sent to the data processing unit of general purpose interface bus module；Data processing unit
Self-adaptation clock is carried out to the baseband signal of reception and is adapted to calibration process：By two-way sampled result all the way as the ginseng of filter
Signal is examined, all the way as the input signal of filter；Input signal is calculated relative to reference to letter using lowest mean square root LMS algorithm
Number clocking error, and adaptive-filtering processing is carried out to clocking error and input signal, obtains self-adaptation clock mismatch calibration
The sampled signal of processing.The present invention calibrates for error to data after multichannel AD samplings, is utilized using time-division alternating AD structure
Multi-disc low speed, high-precision ADC, parallel processing analog input signal sample self-adaptation clock mismatch calibration algorithm, are ensureing to adopt
Under the premise of sample precision, system-level sampling rate is not reduced, and parallel organization need not increase the difficulty of monolithic design, so that it may to reach
To high speed, high-precision systematic sampling.
Since avionic device working electromagnet environment is complicated, serial communication is by electromagnetic interference around, crystal oscillator proper time
The factors such as clock drift influence, and communication data position will appear time deviation, when this deviation is more than thresholding by certain time accumulation
Afterwards, it may result in sampling dislocation.The bus control unit real-time statistics and general radio frequency of the general purpose interface bus module of the present invention
The data bit deviation of intermodule communication, and whether cycle detection current statistic result is more than threshold value, if being then modified processing,
To effectively reduce the sample error caused by data bit deviation.Through practical measuring and calculating, when the statistical result of data bit deviation
No more than bit-time ± 5% when, reception data that Universal Serial Interface can be reliable and stable.
Further, in the bus adaption unit of general radio frequency module and general purpose interface bus module into row data communication
When, advanced row baud rate detection, then carry out data transmission, wherein baud rate detection process is：General purpose interface bus module it is total
Line traffic control unit receives request sequence to general radio frequency module request training sequence, the bus adaption unit of general radio frequency module
Afterwards, general radio frequency module sends one section of training sequence, bus control unit to the bus control unit of general purpose interface bus module
Received training sequence simultaneously carries out over-sampling processing, carries out time domain to the transformation results of frequency domain to over-sampling result, searches most substantially
Frequency centered on corresponding Frequency point is spent, after the baud rate that general purpose interface bus module is reset based on centre frequency, to bus
Adaptation unit sends inquiry frame and waits to be answered, if receiving acknowledgement frame, baud rate detects successfully；Otherwise general radio frequency is asked
Module retransmits training sequence, re-starts baud rate detection.
Based on above-mentioned baud rate detection process, can realize in the case where the baud rate of other side need not be known in advance,
Adaptive completion baud rate detection and data transmit-receive.It is this adaptive as the bridge of general radio frequency module and intersystem communications
Answer baud rate serial ports to can adapt to the radio-frequency module of various different baud rates, level nature, improve system compatibility and can
Autgmentability.Simultaneously in special secret communication occasion, radio-frequency module needs stochastic transformation baud rate, current without reporting system
Baud rate energy direct communication, improves the reliability and robustness of the communication of CNS system secrecies.
In conclusion by adopting the above-described technical solution, the beneficial effects of the invention are as follows：The present invention is logical for CNS systems
With between radio-frequency module, interconnecting between module and system provides unified communications platform, reduce System Integration Test amount, carry
The high stability of system, meets the design needs of blocking criteria.
Description of the drawings
Fig. 1 is the system structure diagram of the specific embodiment of the invention；
Fig. 2 is the data transmit-receive flow chart of Multifunctional radio-frequency module common port system of the present invention in specific implementation mode.
Fig. 3 is in specific implementation mode, and the level sampling ballot of Multifunctional radio-frequency module common port system of the present invention is sentenced
Certainly scheme.
Fig. 4 is in specific implementation mode, and the AD adaptive algorithms of Multifunctional radio-frequency module common port system of the present invention are former
Reason figure.
Fig. 5 is the data bit deviation calibration of Multifunctional radio-frequency module common port system of the present invention in specific implementation mode
Figure.
Fig. 6 is in specific implementation mode, and the adaptive baud rate of Multifunctional radio-frequency module common port system of the present invention is former
Reason figure.
Specific implementation mode
To make the object, technical solutions and advantages of the present invention clearer, with reference to embodiment and attached drawing, to this hair
It is bright to be described in further detail.
Refering to fig. 1.In a most preferred embodiment described below, Multifunctional radio-frequency module common port system of the invention
System includes system control management module, general purpose interface bus module, general radio frequency module.System controls management module using high speed
Digital signal processing chip is communicated as master control core, by synchronous bus with general purpose interface bus module, completes system control
Instruction and data issues, such as configuration system operating mode, running parameter control command.It receives and is connect from versabus simultaneously
The reply data frame of mouth mold block, the status information reported, such as acquisition system working condition, health status.
General purpose interface bus module is the bridge of system control management module and general radio frequency intermodule, completes system control
The forwarding and processing of order.Wherein, it receives counting unit and receives data frame and command frame from synchronous bus, to frame information (data
Frame and command frame) it is cached and is parsed, and valid frame load is transmitted to data processing unit.Data processing unit is to frame load
Parsing and processing will parse data and be divided into AD data (i.e. number or the baseband signal of simulation), AD control commands (including digital-to-analogue turn
Change control command and analog-to-digital conversion control command), bus control commands, and AD control commands are transmitted to AD controllers, completed pair
The control and management of the general radio frequency modules A D of rear end；AD data are transmitted to multiplex controller, when for data interaction
The data interaction of general purpose interface bus module and general radio frequency intermodule is realized in channel selecting and multiplexing；By bus marco
Order, which is transmitted to, receives number buffer unit (read-write mode is set as FIFO) caching, by bus control unit through versabus after caching
It is transmitted to the bus adaption unit of the general radio frequency module of rear end, the relevant operating parameter for controlling RF pre-processing unit, such as：
Local frequency, wide and narrow strip selection, filter centre frequency value etc..In addition, bus adaption unit also passes through bus control unit, hair
Number changes unit, data processing unit, hair counting unit into system control management module passback self-test, status information, i.e. bus is suitable
Self-test, status information are sent to bus control unit by versabus with unit, are always control unit by the information of reception
Deposit hair number buffer unit (read-write mode is set as FIFO), so that data processing unit is read, and by the self-test of reading, state
Information package framing information is simultaneously sent to hair counting unit；The frame information of reception is sent to system by hair counting unit by synchronous bus
Control management module.
General radio frequency module includes digital-to-analogue driving unit (AD/DA driving units), (AD/DA conversions are single for D/A conversion unit
Member), bus adaption unit, RF pre-processing unit.
Wherein, digital-to-analogue driving unit completes the front end matching of digital-to-analogue conversion, receives the AD from general purpose interface bus module
The AD data that the AD control commands and multiplexer unit that controller is sent are sent, control the running parameter of D/A conversion unit,
Such as AD conversion precision, speed, valid data position and spurious-free dynamic range, sample rate, conversion accuracy, number of significant digit (ENOB),
Spurious-free dynamic range (SFDR) etc..
D/A conversion unit is used for the digital-to-analogue conversion of baseband signal：In the state of transmission, to from data processing unit
Digital baseband signal carries out DA conversions, and transformed baseband signal is sent to RF pre-processing unit；In reception state,
Analog baseband signal from RF pre-processing unit is AD converted, and transformed baseband signal is passed through into predistribution
General purpose interface bus module and the transmission channel of general radio frequency intermodule are sent to the data processing list of general purpose interface bus module
Member.
Bus adaption unit is for parsing bus data and coming from conventional data line interface to RF pre-processing unit forwarding
Bus control commands, control the running parameter of RF pre-processing unit, such as：Local frequency, wide and narrow strip selection, filter center
Frequency values etc.；The self-test of general radio frequency module, status information are sent to general purpose interface bus module by versabus simultaneously
Hair number buffer unit.
Baseband signal from D/A conversion unit is modulated by RF pre-processing unit, up-conversion, signal filter, work(
After the transmitting modulation treatment such as rate amplification, radiated to spatial domain by transmitting antenna；To the radiofrequency signal that is received by reception antenna into
Row demodulation, down coversion, useful signal extraction, signal filtering, power amplification etc. receive demodulation process, obtain analog baseband signal simultaneously
It is sent to D/A conversion unit.
Refering to Fig. 2.The data transmit-receive flow of Multifunctional radio-frequency module common port system of the present invention is：
Processor runs initialization function after starting, and it is outer to receive to initialize external I/O interface, configuration down trigger pattern
Portion is interrupted, subsequently into main flow.When judging there are data to enter transmission flow when sending, transmitter register, including setting are configured
Send baud rate, frame format, selection transmission level (such as RS422 level, RS485 level or RS232 level), verification mode etc.
Then parameter reads the data of hair number buffer unit and to data framing, increases frame head, postamble, frame source/destination address, verification
Information, a frame data start after being ready to sends program transmission data, and starts and receive timer waiting back information.If received
To response message, then response is judged for ACK frames or NAK frames, indicates that receiving side data verification failure request is returned if NAK frames
It passes, then framing and sends again.If being received as ACK frames indicates that recipient has been received by data and verifies successfully, success is sent,
Stop retransmitting.If not receiving any response frame information, judge whether reception is overtime, continues waiting for connecing if having not timed out
Response frame information is received, starts retransmission mechanism if time-out and data frame is retransmitted, response is not received yet more than 3 times if retransmitted
Frame retransmits and unsuccessfully stops retransmitting.
Enter reception flow when having determined data band and having come.Receiving register is configured first, including setting receives baud
The parameters such as rate, order caching size, down trigger mode, then start receiving process.Read the data of receipts number buffer unit simultaneously
It has detected whether frame head, has been continued waiting for if no frame head, detected that frame head begins to receive data, data are delayed
It deposits.And start Watch Dog Timer, judge whether receive is more than longest receiving time, if it exceeds longest receiving time then abandons
Current data packet parses the content frame being connected to if having not timed out and carries out CRC check, and NCK frames are returned if verifying failure
It asks sender to retransmit, data is transmitted to flow chart of data processing if verifying successfully, receive flow and terminate.
Refering to Fig. 3.Under the clock control of High Precision Crystal Oscillator output, docked by general purpose interface bus inside modules FPGA
The serial bus signal received carries out sampling judgement.In figure, (a) is the analog signal of universal serial bus, rate 3.125Mbit/
s；For analog signal due to being influenced by periphery electromagnetic environment, propagation path, burr can locally occur at random in signal, and high level is arranged
The benchmark of thresholding, low level thresholding as analog signal digital.(b) digital signal after being digitized into for analog signal, mould
The burr of quasi- signal is more than preset high level thresholding or is less than preset low level thresholding, is believed after digitlization
Number just it will appear " burr point "；If sampling instant just influences whether sampled result near burr point；(c) be over-sampling when
Clock signal, frequency are the high-speed pulse of 50MHz, and 16 times of over-samplings, each bit are carried out to the serial digital signal of 3.125MHz
Level continues 16 sampling periods；(d) it is ballot decision window that the width being arranged in FPGA is 16 sampling periods.To each
Bit level carries out 16 times of over-samplings, and the bit level value is determined with ballot decision algorithm.The specific method is as follows：Due to each
Bit level centre position is relatively stable point, and 16 times of over-samplings are carried out to each bit level, takes the sampling arteries and veins of middle section 7
Punching value makes decisions, and when the number that level is " 1 " is greater than or equal to 4, it is " 1 " to adjudicate the bit level value；When level is " 0 "
Number be greater than or equal to 4 when, then adjudicate the level value be " 0 "；The influence brought due to burr can be effectively filtered out in this way, greatly
It is big to reduce the bit error rate, improve the stability and robustness of bus.
Data processing unit further includes lowest mean square root LMS processing modules, by LMS processing modules to simulation to be sampled
Signal carries out self-adaptation clock mismatch calibration processing.Refering to Fig. 4, wherein X (t) is analog input signal to be sampled, through two-way
ADC channel ADC1, ADC2 are sampled respectively, and monolithic ADC sampling rates are 100Msps, defeated after sampling precision 16bit, AD sampling
Go out digital signal X1(k),X2(k), wherein digital signal X1(k) reference input as LMS processing modules handles mould by LMS
Clocking error is exported after blockAnd it willWith digital signal X2(k) it is sent into reconfigurable filter H together, calculates the number after calibration
Word signal Y1(k), it is time-multiplexed using digital multiplexer MUX, exports the AD samplings after final calibrated synthesis
Signal X (K), in the present embodiment, the frequency response of reconfigurable filter H is：Wherein Ω is angular frequency, when τ is
Clock error, TsFor sampling period (1/100M).
LMS processing modules the specific implementation process is as follows：
Step 1)：Calculate current channel sampling clock μi：Wherein the initial value of iterations i is 0,
Δi tIndicate clocking error when ith iteration calculates, Δ0 t=0；
Step 2)：Calculate the gradient of object function：According to formulaCalculating target function V,
Wherein N is the exponent number of reconfigurable filter H, and the value of N is 84 in the present embodiment.For the i-th step X2(k) reconstructed filter
The filtered signals of H, X1(k) it is reference-input signal.
To object function V derivations, the gradient of calculating target function VIts
InForPartial derivative；
Step 3) calculates the clocking error corresponding to i+1 time iterationWherein
The clocking error that the last iterative processing exports is denoted asAnd it exports.
Refering to Fig. 5, wherein 5 (a) is with reference to baud rate clock, 5 (b) is serial bus data, per frame by a start bit,
8 data bit, 1 stop position composition；5 (c) is practical reception baud rate clock.Bus data transfer is as schemed in the initial state
Shown in 5-1, with reference to baud rate rising edge transmission data, receiving terminal samples data according to baud rate is received transmitting terminal,
The center for receiving rising edge clock corresponding data bit every time, reliable and stable can be sampled, each bit level in this way
The bit wide time is A；And in actual working environment, due to by the frequency stability of periphery electromagnetic environment, crystal oscillator, precision and intrinsic
The factors such as drift influence, and serial bus data bit bit wide will produce time migration, and each bit level bit wide time becomes B (A
Not equal to B), this offset may result in sampling error after certain time accumulates more than 1/2 bit level bit wide.Such as
Shown in Fig. 5-2, the 1st rising edge clock corresponding data start bit, the 2nd rising edge clock corresponding data D0, the 3rd clock
Rising edge corresponding data D1, the 4th rising edge clock corresponding data D3 (correct position is data D2), at the 4th
Zhong Shangshengyanchu causes sample error due to clock and data dislocation.
The present invention detects bit wide deviation accumulated value by adaptive detection algorithm, when aggregate-value is more than predetermined threshold value,
Adaptive correction error of baud rate detects that bit wide deviation is more than threshold as shown in (c) of Fig. 5-2 at the 3rd rising edge clock
Advance correction baud rate when value changes the 4th rising edge clock initial position, allows rising edge clock and data D2 central points pair
Together, it is subsequently sequentially adjusted in rising edge clock position, ensures each rising edge clock and data center's aligned in position, reduces in this way
Mistake is received caused by being deviated due to data bit, improves the reliability of communication.
Refering to Fig. 6, wherein 6 (a) is adaptive baud rate record principle figure, for the serial ports of three kinds of different baud rates of diagram
Data, the bus control unit of general purpose interface bus module, which can detect, determines current demand signal baud rate, and makes corresponding
Adaptive reception is completed in adjustment.Fig. 6 (b) is adaptive baud rate implementation flow chart, arranges the bus adaption of general radio frequency module
When unit and general purpose interface bus module are into row data communication, the bus adaption unit of general radio frequency module first sends training sequence
It arranges, setting training sequence wraps 0xAA data, bus control unit received training sequence for 200 in this example, and uses 200M at a high speed
Clock carries out over-sampling to training sequence, carries out FFT transform to sampled result, obtains the amplitude-frequency characteristic of signal on frequency domain
Figure calculates centre frequency by searching for the corresponding Frequency point of amplitude peak, obtains resetting baud rate after calculating centre frequency,
Bus control unit sends inquiry frame to bus adaption unit and waits for recipient's response.If bus control unit receives response
The baud rate that frame indicates detects successfully, receives and dispatches double hairs according to current baud rate energy normal communication.If not receiving acknowledgement frame indicates inspection
Dendrometry loses, then request recipient retransmits training sequence, and baud rate is detected again using the above flow.
The above description is merely a specific embodiment, any feature disclosed in this specification, except non-specifically
Narration, can be replaced by other alternative features that are equivalent or have similar purpose；Disclosed all features or all sides
Method or in the process the step of, other than mutually exclusive feature and/or step, can be combined in any way.
Claims (5)
1. Multifunctional radio-frequency module common port system, which is characterized in that including system control management module, general purpose interface bus
Module and general radio frequency module；
System control management module is communicated by synchronous bus with general purpose interface bus module, for sending system message, control
Order and parameter, baseband signal, while receive and processing general radio frequency module reported by general purpose interface bus module self-test,
Status information；
General purpose interface bus module includes receiving counting unit, hair counting unit, data processing unit, Mathematical model control unit, multiplexing
Unit receives number buffer unit, hair number buffer unit and bus control unit；
Wherein, receive counting unit by synchronous bus receive from system control management module frame information and parsing after by frame load
It is sent to data processing unit, the frame information includes system message, control command and data；
Data processing unit parses frame load, obtains parsing data, is forwarded based on parsing data type：By digital-to-analogue
Control command is sent to Mathematical model control unit, and baseband signal is sent to multiplexer unit, and system message, bus marco are ordered
It enables and parameter is sent to bus control unit by receiving number buffer unit；Wherein, Mathematical model control unit is used for general radio frequency mould
Block forwards digital-to-analogue control command；Channel of the multiplexer unit for data processing unit and the transmission of general radio frequency intermodular data
Selection and multiplexing；Bus transfer of the bus control unit for data processing unit and general radio frequency intermodule controls；
Meanwhile bus control unit delays by self-test of the bus reception from general radio frequency module, status information, and by hair number
Memory cell is forwarded to data processing unit；The self-test of reception, status information are packaged framing information and concurrently sent by data processing unit
Give hair counting unit；
Frame information from data processing unit is sent to system by synchronous bus and controls management module by hair counting unit；
General radio frequency module includes digital-to-analogue driving unit, D/A conversion unit, bus adaption unit, RF pre-processing unit；
Wherein, digital-to-analogue driving unit is used to complete the front end matching of digital-to-analogue conversion, the digital-to-analogue control that will be received from Mathematical model control unit
The running parameter of system order control D/A conversion unit, and the baseband signal received from multiplexer unit is transmitted to digital-to-analogue and is turned
Change unit；
D/A conversion unit is used for the digital-to-analogue or analog-to-digital conversion of baseband signal：In the state of transmission, the digital baseband of reception is believed
Number digital-to-analogue conversion is carried out, and transformed analog baseband signal is sent to RF pre-processing unit；In reception state, to coming
Analog-to-digital conversion is carried out from the analog baseband signal of RF pre-processing unit, and transformed digital baseband signal is driven by digital-to-analogue
Moving cell is sent to multiplexer unit；
Bus adaption unit is adapted to for general radio frequency module with the bus interface of general purpose interface bus intermodule, bus data association
The parsing of view, and the bus control commands and parameter that are received by bus control unit are forwarded to RF pre-processing unit,
Control the running parameter of RF pre-processing unit；Simultaneously by bus control unit, hair number buffer unit, data processing unit,
Counting unit is sent out to system control management module passback self-test, status information；
It is logical that RF pre-processing unit carries out transmitting modulation treatment to the analog baseband signal after D/A conversion unit digital-to-analogue conversion
Cross transmitting antenna radiation；Reception demodulation process is carried out to the radiofrequency signal received by reception antenna, obtains analog baseband signal
And it is sent to D/A conversion unit.
2. the system as claimed in claim 1, which is characterized in that the bus control unit of general purpose interface bus module is also to receiving
Each BIT progress over-samplings, using BIT center position odd number pulses as sampling window, to the arteries and veins in sampling window
It rushes sampled value and carries out ballot judgement with each BIT of the level value of determination；
Wherein ballot, which is adjudicated, is specially：When level is that the number of " 1 " is greater than or equal in sampling windowWhen, adjudicate the ratio
Special level value is " 1 "；When the number that level is " 0 " is greater than or equal toWhen, then it is " 0 ", wherein M tables to adjudicate the level value
Show the impulse sampling value number in sampling window.
3. the system as claimed in claim 1, which is characterized in that the D/A conversion unit of general radio frequency module believes Analog Baseband
When number being AD converted, is sampled respectively using two-way ADC and multiplexed unit is sent to data processing unit；
Data processing unit carries out self-adaptation clock mismatch calibration processing to the baseband signal of reception：It will be in two-way AD sampled signals
Reference input of the sampled signals of AD all the way as lowest mean square root LMS processing modules, export clock after LMS processing modules
Error, and clocking error and another way AD sampled signals are sent into reconfigurable filter together, the digital signal after calibration is calculated,
It is time-multiplexed using digital multiplexer MUX, exports the AD sampled signals after final calibrated synthesis.
4. the system as claimed in claim 1, which is characterized in that the bus control unit real-time statistics of general purpose interface bus module
And the data bit deviation of general radio frequency intermodule communication, and cycle detection current statistic result whether be more than threshold value, if then into
Row correcting process.
5. the system as claimed in claim 1, which is characterized in that in the bus adaption unit and versabus of general radio frequency module
When interface module is into row data communication, advanced row baud rate detection, then carry out data transmission, wherein baud rate detection process is：
The data processing unit bus control unit of general purpose interface bus module is general to general radio frequency module request training sequence
After the bus adaption unit of radio-frequency module receives request, to the data processing unit bus control unit of general purpose interface bus module
One section of training sequence is sent, data processing unit bus control unit received training sequence simultaneously carries out over-sampling processing, is adopted to crossing
Sample result carries out time domain to the transformation results of frequency domain, searches frequency centered on the corresponding Frequency point of amplitude peak, is based on center
Frequency reset general purpose interface bus module baud rate after, to bus adaption unit send inquiry frame and wait it is to be answered, if receive
To acknowledgement frame, then baud rate detects successfully；Otherwise request general radio frequency module retransmits training sequence, re-starts baud rate inspection
It surveys.
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| CN106788920B (en) * | 2016-12-19 | 2019-08-23 | 珠海格力电器股份有限公司 | A kind of baud rate deviation detecting method, device and air conditioner indoor unit |
| CN106788907A (en) * | 2017-03-24 | 2017-05-31 | 湖南浩奇通讯技术有限公司 | Master-salve station communication baud rate Auto-matching |
| CN109510689B (en) * | 2018-12-25 | 2022-03-22 | 迈普通信技术股份有限公司 | Serial port communication method, device and system |
| CN110474674B (en) * | 2019-08-26 | 2024-03-22 | 北京国电高科科技有限公司 | Load data interface device for satellite communication |
| CN110808743B (en) * | 2019-10-30 | 2020-11-06 | 电子科技大学 | High-speed parallel signal processing method and device |
| WO2021042092A2 (en) * | 2020-02-27 | 2021-03-04 | Zeku, Inc. | Digital interface for frequency domain data transfer between baseband and radiofrequency modules |
| CN112073152B (en) * | 2020-09-15 | 2022-06-24 | 四川九洲空管科技有限责任公司 | FPGA anti-interference processing method for improving reliability of CHSI received data |
| CN112860690B (en) * | 2021-01-18 | 2023-05-05 | 山西省智慧交通研究院有限公司 | Radar data read-write adaptation method based on time sequence database |
| CN113259021B (en) * | 2021-04-30 | 2023-06-02 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Portable automatic receiving and transmitting testing device for aviation radio station |
| CN113746527A (en) * | 2021-08-04 | 2021-12-03 | 上海卫星工程研究所 | Intensive satellite multi-channel complex radio frequency link conditioning control device and method |
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| CN101945490A (en) * | 2010-09-03 | 2011-01-12 | 电子科技大学 | Software radio-based wireless communication system terminal equipment |
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