CN106209064B - Low-power consumption dynamic threshold comparator interface circuit and rectifier, wireless sensor - Google Patents
Low-power consumption dynamic threshold comparator interface circuit and rectifier, wireless sensor Download PDFInfo
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- CN106209064B CN106209064B CN201610531037.6A CN201610531037A CN106209064B CN 106209064 B CN106209064 B CN 106209064B CN 201610531037 A CN201610531037 A CN 201610531037A CN 106209064 B CN106209064 B CN 106209064B
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- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
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Abstract
The present invention relates to a kind of low-power consumption dynamic threshold comparator interface circuit and rectifiers, wireless sensor.The interface circuit includes: input terminal VIN, output end VAUX, first comparator circuit 11, the second comparator circuit 13, switching load circuit 15 and ground terminal GND；Second power switch MNS is electrically connected between input terminal VIN and ground terminal GND and its control terminal is electrically connected to the output end vo ut2 of the second comparator circuit 13；The non-inverting input terminal Vinp1 of first comparator circuit 11 is electrically connected to output end VAUX and inverting input terminal Vinn1 is electrically connected to input terminal VIN；The non-inverting input terminal Vinp2 of second comparator circuit 13 is electrically connected to ground terminal GND and inverting input terminal Vinn2 is electrically connected to input terminal VIN.The present invention is made of dynamic threshold comparator circuit and switching load circuit, and using dual comparator structure, whole design framework is simple, can effectively reduce operating voltage needed for circuit, reduces system power dissipation, is suitable for middle low-power consumption energy capturing systems.
Description
Technical field
The invention belongs to technical field of integrated circuits, and in particular to a kind of low-power consumption dynamic threshold comparator interface circuit and
Rectifier, wireless sensor.
Background technique
Since current most wireless sensor supplies energy, and wireless sensing body using traditional battery system
Product is small, and the self-contained energy content of battery is limited, is not able to satisfy long-term work needs.On the other hand, with more and more micro-
Oneself drops to microwatt level to power consumption product energy consumption so that microelectronic device collecting energy from environment, realize self-powered work oneself at
It is possible.
Micro-energy is obtained as a kind of emerging energy technology, especially suitable for need long term monitoring, working environment badly,
The occasions such as battery inconvenience replacement are same, such as the pressure monitoring in automobile tire, the structural health detection of aircraft and ship, train wheel track axis
The health detection held tracks the global pick device of wild animal, biomedical portable or implanted health equipment application etc.,
It is one of the research hotspot in current new-generation field, is up to arrived research shows that the micro-energy such as vibrational energy etc. in environment has
200μW/cm3Power density.Therefore acquisition micro-energy is that low power consuming devices power supply has good application prospect.Its principle is
The micro-energy in environment is collected and converted to electric energy using a series of energy collection technologies to be stored, thus for low-power consumption electricity
Energy needed for sub- equipment provides work, as the important means to save energy and protect environment, people are in multiple fields exhibition
It has opened the research to micro-energy collection technique and has applied work.Alternating current is generally after collecting due to micro-energy, therefore in reality
Rectifier must be used first to convert alternating current to direct current in circuit, then to the energy storage such as super capacitor or rechargeable battery member
Part charges, so that load uses.
The interface circuit of rectifier as the core cell in micro-energy acquiring technology, micro-energy that load will be collected by
Small AC signal is converted to the direct current signal that can be used directly, itself has to meet operating on low voltage condition, and can mention
Acquired energy is maximized for sufficiently large output voltage, provides work capacity for low-voltage equipment, meanwhile, itself consumption
Energy is also small as far as possible.
Therefore, how to design it is a kind of for micro-energy obtain low-power consumption dynamic threshold comparator interface circuit just become pole
Its is important.
Summary of the invention
In order to solve the above-mentioned problems in the prior art, the present invention provides a kind of low-power consumption dynamic threshold comparators
Interface circuit and rectifier, wireless sensor.The technical problem to be solved in the present invention is achieved through the following technical solutions:
An embodiment provides a kind of low-power consumption dynamic threshold comparator interface circuits 10, comprising: input
Hold VIN, output end VAUX, first comparator circuit 11, the second comparator circuit 13, switching load circuit 15 and ground terminal GND；
Wherein,
The switching load circuit 15 includes the first power switch MPS, the second power switch MNS, load capacitance CL and bears
Resistance RLOAD is carried, the first power switch MPS is electrically connected between the input terminal VIN and the output end VAUX and it
Control terminal is electrically connected to the output end vo ut1, the load capacitance CL and load resistance RLOAD of the first comparator circuit 11
And be serially connected with after connecing between the output end VAUX and the ground terminal GND, the second power switch MNS is electrically connected to described
Between input terminal VIN and the ground terminal GND and its control terminal is electrically connected to the output end of second comparator circuit 13
Vout2；
The non-inverting input terminal Vinp1 of the first comparator circuit 11 is electrically connected to the output end VAUX and anti-phase input
End Vinn1 is electrically connected to the input terminal VIN；
The non-inverting input terminal Vinp2 of second comparator circuit 13 is electrically connected to the ground terminal GND and anti-phase input
End Vinn2 is electrically connected to the input terminal VIN.
In one embodiment of the invention, the first comparator circuit 11 just compresses switch including power end VDD, first
P1, second just compressing switch P2, third just compressing switch P3, the 4th just compressing switch P4, the 5th just compressing switch P5, the first negative pressure switch
N1, the second negative pressure switch N2, third negative pressure switch N3, the 4th negative pressure switch N4；Wherein,
Described first just compressing switch P1, the first negative pressure switch N1 and the third negative pressure switch N3 concatenation after be electrically connected
Between the power end VDD and the ground terminal GND；Described second just compressing switch P2 and the second negative pressure switch N2 concatenation
It is electrically connected to the power end VDD and the first negative pressure switch N1 afterwards and concatenates the node to be formed with the third negative pressure switch N3
Between a1；Described first control terminal for just compressing switch P1 is electrically connected to the described second control terminal for just compressing switch P2；Described
The control terminal of one negative pressure switch N1 and the third negative pressure switch N3 are electrically connected to the reverse phase of the first comparator circuit 11
Input terminal Vinn1；The control terminal of the second negative pressure switch N2 is electrically connected to the homophase input of the first comparator circuit 11
Hold Vinp1；
The third P3 that just compressing switch just is compressing switch after P4 is concatenated with the described 4th and is electrically connected to the power end VDD and institute
Second is stated just to compress switch between P2 concatenates the node b1 to be formed with the second negative pressure switch N2；The third just compresses switch P3
The control terminal for just compressing switch P4 with the described 4th is electrically connected to described second and is just compressing switch P2 and the second negative pressure switch N2
It concatenates at the node b1 formed；
Described 5th, which is just compressing switch, is electrically connected to the power end VDD and institute after P5 is concatenated with the 4th negative pressure switch N4
It states between ground terminal GND, the described 5th control terminal for just compressing switch P5 and the 4th negative pressure switch N4 is electrically connected to described
The inverting input terminal Vinn1 of first comparator circuit 11；
The output end vo ut1 of the first comparator circuit 11 be respectively electrically connected to the third just compressing switch P3 with it is described
4th P4 that just compressing switch is concatenated at the node to be formed and the described 5th P5 that just compressing switch with the 4th negative pressure switch N4 concatenates shape
At node at.
In one embodiment of the invention, second comparator circuit 13 just compresses switch including power end VDD, the 6th
P6, the 7th just compressing switch P7, the 8th just compressing switch P8, the 9th just compressing switch P9, the tenth just compressing switch P10, the 5th negative pressure switch
N5, the 6th negative pressure switch N6, the 7th negative pressure switch N7, the 8th negative pressure switch N8；Wherein,
Described 6th just compressing switch P6, the 5th negative pressure switch N5 and the 7th negative pressure switch N7 concatenation after be electrically connected
Between the power end VDD and the ground terminal GND；Described 7th just compressing switch P7 and the 6th negative pressure switch N6 concatenation
It is electrically connected to the power end VDD and the 5th negative pressure switch N5 afterwards and concatenates the node to be formed with the 7th negative pressure switch N7
Between a2；Described 6th control terminal for just compressing switch P6 is electrically connected to the described 7th control terminal for just compressing switch P7；Described
The control terminal of five negative pressure switch N5 and the 7th negative pressure switch N7 are electrically connected to the reverse phase of second comparator circuit 13
Input terminal Vinn2；The control terminal of the 6th negative pressure switch N6 is electrically connected to the homophase input of second comparator circuit 13
Hold Vinp2；
Described 8th P8 that just compressing switch just is compressing switch after P9 is concatenated with the described 9th and is electrically connected to the power end VDD and institute
The 7th is stated just to compress switch between P7 concatenates the node b2 to be formed with the 6th negative pressure switch N6；Described 8th just compresses switch P8
The control terminal for just compressing switch P9 with the described 9th is electrically connected to the described 7th and is just compressing switch P7 and the 6th negative pressure switch N6
It concatenates at the node b2 formed；
Described tenth is just compressing switch be electrically connected to after P10 is concatenated with the 8th negative pressure switch N8 power end VDD and
Between the ground terminal GND, the described tenth control terminal for just compressing switch P10 and the 8th negative pressure switch N8 is electrically connected to institute
State the inverting input terminal Vinn2 of the second comparator circuit 13；
The output end vo ut2 of second comparator circuit 13 be respectively electrically connected to the described 8th just compressing switch P8 with it is described
9th P9 that just compressing switch is concatenated at the node to be formed and the described tenth P10 that just compressing switch with the 8th negative pressure switch N8 concatenates shape
At node at.
In one embodiment of the invention, described first just compressing switch P1, described second just compressing switch P2, the third
Just compressing switch P3, the described 4th just compressing switch P4, the described 5th just compressing switch P5, the described 6th just compressing switch P6, the described 7th
Just compressing switch P7, the described 8th just compressing switch P8, the described 9th P10 that just compressing switch of P9 and the described tenth that just compressing switch is PMOS
Pipe, and its control terminal is the grid of PMOS tube.
In one embodiment of the invention, the first negative pressure switch N1, the second negative pressure switch N2, the third
Negative pressure switch N3, the 4th negative pressure switch N4, the 5th negative pressure switch N5, the 6th negative pressure switch N6, the 7th negative pressure switch
N7, the 8th negative pressure switch N8 are NMOS tube, and its control terminal is the grid of NMOS tube.
In one embodiment of the invention, the first power switch MPS is PMOS tube and its control terminal is PMOS tube
Grid, the second power switch MNS is NMOS tube and its control terminal is the grid of NMOS tube.
Another embodiment of the present invention provides a kind of rectifiers, including the interface circuit any in above-described embodiment
10。
Further embodiment of this invention provides a kind of wireless sensor, including rectifier, wherein the rectifier includes upper
State any interface circuit 10 in embodiment.
Compared with prior art, beneficial effects of the present invention:
1, in the dynamic threshold comparator interface circuit obtained for micro-energy of the invention, using dual comparator structure,
Each comparator uses dynamic threshold MOS to realize that structure is simple, and DTMOS pipe use so that metal-oxide-semiconductor in the on-state
Threshold voltage reduces, that is, reduces the requirement to gate source voltage, thus has lower operating voltage；And threshold in the off case
Threshold voltage increases, and reduces Leakage Current, thus has lower power consumption；
2, the dynamic threshold comparator interface circuit obtained for micro-energy of the invention, according to the size of VIN and VAUX
Compare, obtains dynamic threshold comparator 1 and 2 output state of comparator, and then control power switch tube MPS, power switch tube MNS
It disconnects and is connected, improve the noise margin of interface circuit, eliminate the oscillatory occurences near zero-crossing point, reduce zero-crossing distortion
Problem improves the limitation of harmonic current and frequency to system, improves system stability.
Detailed description of the invention
Fig. 1 is a kind of circuit structure signal of low-power consumption dynamic threshold comparator interface circuit provided in an embodiment of the present invention
Figure；
Fig. 2 is a kind of electrical block diagram of first comparator circuit provided in an embodiment of the present invention；
Fig. 3 is a kind of electrical block diagram of second comparator circuit provided in an embodiment of the present invention；
Fig. 4 is a kind of electrical block diagram of switching load circuit provided in an embodiment of the present invention.
Specific embodiment
Further detailed description is done to the present invention combined with specific embodiments below, but embodiments of the present invention are not limited to
This.
Embodiment 1:
Referring to Figure 1 and Fig. 4, Fig. 1 are a kind of low-power consumption dynamic threshold comparator interface electricity provided in an embodiment of the present invention
The electrical block diagram on road；Fig. 4 is a kind of electrical block diagram of switching load circuit provided in an embodiment of the present invention.It should
Low-power consumption dynamic threshold comparator interface circuit 10, comprising: input terminal VIN, output end VAUX, first comparator circuit 11,
Two comparator circuits 13, switching load circuit 15 and ground terminal GND；Wherein, the switching load circuit 15 includes the first power
Switch MPS, the second power switch MNS, load capacitance CL and load resistance RLOAD, the first power switch MPS are electrically connected to
Between the input terminal VIN and the output end VAUX and its control terminal is electrically connected to the output of the first comparator circuit 11
It holds Vout1, the load capacitance CL and load resistance RLOAD and is serially connected with the output end VAUX and the ground terminal after connecing
Between GND, the second power switch MNS is electrically connected between the input terminal VIN and the ground terminal GND and its control terminal
It is electrically connected to the output end vo ut2 of second comparator circuit 13；The non-inverting input terminal of the first comparator circuit 11
Vinp1 is electrically connected to the output end VAUX and inverting input terminal Vinn1 is electrically connected to the input terminal VIN；Second ratio
Be electrically connected to the ground terminal GND compared with the non-inverting input terminal Vinp2 of device circuit 13 and inverting input terminal Vinn2 be electrically connected to it is described
Input terminal VIN.
Specifically, Fig. 2 is referred to, Fig. 2 is a kind of circuit structure of first comparator circuit provided in an embodiment of the present invention
Schematic diagram.The first comparator circuit 11 includes that power end VDD, the first just compressing switch P1, second are just compressing switch P2, third just
Compress switch P3, the 4th just compressing switch P4, the 5th just compressing switch P5, the first negative pressure switch N1, the second negative pressure switch N2, third negative pressure
Switch N3, the 4th negative pressure switch N4；Wherein, the described first just compressing switch P1, the first negative pressure switch N1 and third is negative
It is electrically connected between the power end VDD and the ground terminal GND after the N3 that compresses switch concatenation；Described second is just compressing switch P2 and institute
The power end VDD and the first negative pressure switch N1 and the third negative pressure are electrically connected to after stating the second negative pressure switch N2 concatenation
Switch N3 is concatenated between the node a1 to be formed；Described first control terminal for just compressing switch P1 is electrically connected to described second and just presses off
Close the control terminal of P2；The control terminal of the first negative pressure switch N1 and the third negative pressure switch N3 are electrically connected to described first
The inverting input terminal Vinn1 of comparator circuit 11；The control terminal of the second negative pressure switch N2 is electrically connected to described first and compares
The non-inverting input terminal Vinp1 of device circuit 11；The third just compressing switch P3 with the described 4th just compressing switch P4 concatenation after be electrically connected
It is concatenated with the second negative pressure switch N2 at the node b1 to be formed in the P2 that just compressing switch of the power end VDD and described second
Between；The third is just compressing switch P3 and the described 4th control terminal for just compressing switch P4 is electrically connected to described second and just compresses switch P2
It is concatenated at the node b1 to be formed with the second negative pressure switch N2；Described 5th is just compressing switch P5 and the 4th negative pressure switch N4
It is electrically connected to after concatenation between the power end VDD and the ground terminal GND, the described 5th P5 and the described 4th that just compressing switch is negative
The control terminal of N4 of compressing switch is electrically connected to the inverting input terminal Vinn1 of the first comparator circuit 11；Described first compares
The output end vo ut1 of device circuit 11 is respectively electrically connected to the third P3 that just compressing switch and with the described 4th P4 that just compressing switch concatenates shape
At node at and the described 5th P5 that just compressing switch concatenate at the node to be formed with the 4th negative pressure switch N4.
Specifically, Fig. 3 is referred to, Fig. 3 is a kind of circuit structure of second comparator circuit provided in an embodiment of the present invention
Schematic diagram.Second comparator circuit 13 include power end VDD, the 6th just compressing switch P6, the 7th just compressing switch P7, the 8th just
Compress switch P8, the 9th just compressing switch P9, the tenth just compressing switch P10, the 5th negative pressure switch N5, the 6th negative pressure switch N6, the 7th negative
Compress switch N7, the 8th negative pressure switch N8；Wherein, it the described 6th is just compressing switch P6, the 5th negative pressure switch N5 and the described 7th
It is electrically connected between the power end VDD and the ground terminal GND after negative pressure switch N7 concatenation；Described 7th just compressing switch P7 and
The power end VDD is electrically connected to after the 6th negative pressure switch N6 concatenation and the 5th negative pressure switch N5 and the described 7th is negative
The N7 that compresses switch is concatenated between the node a2 to be formed；Described 6th control terminal for just compressing switch P6 is electrically connected to the 7th positive pressure
The control terminal of switch P7；The control terminal of the 5th negative pressure switch N5 and the 7th negative pressure switch N7 are electrically connected to described
The inverting input terminal Vinn2 of two comparator circuits 13；The control terminal of the 6th negative pressure switch N6 is electrically connected to second ratio
Compared with the non-inverting input terminal Vinp2 of device circuit 13；Described 8th P8 that just compressing switch just is compressing switch after P9 is concatenated with the described 9th and is being electrically connected
It is connected to the P7 that just compressing switch of the power end VDD and the described 7th and concatenates at the node b2 to be formed it with the 6th negative pressure switch N6
Between；Described 8th is just compressing switch P8 and the described 9th control terminal for just compressing switch P9 is electrically connected to the described 7th and just compresses switch P7
It is concatenated at the node b2 to be formed with the 6th negative pressure switch N6；Described tenth is just compressing switch P10 and the 8th negative pressure switch
It is electrically connected between the power end VDD and the ground terminal GND after N8 concatenation, the described tenth is just compressing switch P10 and described the
The control terminal of eight negative pressure switch N8 is electrically connected to the inverting input terminal Vinn2 of second comparator circuit 13；Described second
The output end vo ut2 of comparator circuit 13 be respectively electrically connected to the described 8th just compressing switch P8 with the described 9th just compressing switch P9 string
It connects at the node to be formed and the described tenth P10 that just compressing switch is concatenated at the node to be formed with the 8th negative pressure switch N8.
Optionally, the described first just compressing switch P1, the described second just compressing switch P2, third is just compressing switch P3, described
4th just compressing switch P4, the described 5th just compressing switch P5, the described 6th just compressing switch P6, the described 7th just compressing switch P7, described
8th just compressing switch P8, the described 9th just compressing switch P9 and the described tenth just compressing switch P10 all can be PMOS tube, and its control
End is the grid of PMOS tube.
In addition, the first negative pressure switch N1, the second negative pressure switch N2, the third negative pressure switch N3, described
Four negative pressure switch N4, the 5th negative pressure switch N5, the 6th negative pressure switch N6, the 7th negative pressure switch N7, the 8th negative pressure switch N8
All can be NMOS tube, and its control terminal is the grid of NMOS tube.
Optionally, the first power switch MPS can be PMOS tube and its control terminal can be the grid of PMOS tube, institute
State that the second power switch MNS can be NMOS tube and its control terminal can be the grid of NMOS tube.
The present embodiment is made of dynamic threshold comparator circuit and switching load circuit, whole using dual comparator structure
Design architecture is simple, can effectively reduce operating voltage needed for circuit, reduces system power dissipation, is suitable for middle low-power consumption energy harvesting
System.In interface circuit, when VIN is greater than VAUX, dynamic threshold comparator 1 and the output of comparator 2 are low, switching tube MPS
Conducting, switching tube MNS are disconnected.Input charges to load capacitance by switching tube MPS, and provides output；When VIN be less than VAUX,
Comparator 1 exports height, and switching tube MPS is disconnected.Comparator 2 is likely to occur two kinds of situations:
1) VIN is greater than zero, and still to be low, MNS is disconnected the output of comparator 2, and CL discharges to load resistance, provides output；
2) VIN, which is less than the output of zero comparator 2, becomes high, switching tube MNS conducting, and input VIN is connected with GND, is improved
The noise margin of interface circuit eliminates the oscillatory occurences near zero-crossing point, reduces zero-crossing problem of dtmf distortion DTMF, improves harmonic current
Limitation with frequency to system improves system stability.
Embodiment 2:
Referring again to Fig. 1 to Fig. 4, the present embodiment is on the basis of the above embodiments to low-power consumption dynamic threshold of the invention
Value comparator interface circuit 10 is described in detail.It is specific as follows:
One, dynamic threshold comparator 1 is first comparator circuit 11
Fig. 2 is referred to, is mainly made of tetra- NMOS tubes of five PMOS tube of P1, P2, P3, P4, P5 and N1, N2, N3, N4.
The source of P1 is connected with supply voltage VDD, the drain terminal of the drain terminal of P1 and N1, the substrate of the grid end of P1 and P1, P2
Grid end, the substrate of P2 are connected, and the substrate of P1 is connected with the grid end of grid end P2 of P1, the substrate of P2；
The source of P2 is connected with supply voltage VDD, the drain terminal and the drain terminal of N2 of P2, the grid end of P3, P3 substrate, P4 leakage
End, the grid end of P4, P4 substrate be connected, the grid end of P2 is connected with the substrate of the grid end of P1, the substrate of P1, P2, the substrate of P2 and
The grid end of P1, the substrate of P1, the grid end of P2 are connected；
The source of P3 is connected with supply voltage VDD, the drain terminal and the source of P4 of P3, the drain terminal of P5, N4 drain terminal, output end
Vout1 is connected, grid end and the drain terminal of P2, the drain terminal of N2, the substrate of P3, the drain terminal of P4, the grid end of P4, the substrate phase of P4 of P3
Even, the substrate of P3 is connected with the drain terminal of the drain terminal of P2, the grid end of P3, the drain terminal of P4, the grid end of P4, the substrate of P4, N2；
The source of P4 is connected with the drain terminal of P3, the drain terminal of P5, the drain terminal of N4, output end vo ut1, the drain terminal of P4 and the grid of P3
End, the substrate of P3, the grid end of P4, P4 substrate be connected, the grid end and the grid end of P3 of P4, the substrate of P3, the drain terminal of P4, P4 lining
Bottom is connected, and the substrate of P4 is connected with the grid end of the grid end of P3, the substrate of P3, the drain terminal of P4, P4；
The source of P5 is connected with supply voltage VDD, the drain terminal and the drain terminal of P3 of P5, the source of P4, N4 drain terminal, output end
Vout1 is connected, the grid end and the substrate of P5 of P5, the grid end of N1, the substrate of N1, the grid end of N3, the substrate of N3, the grid end of N4, N4
Substrate, inverting input terminal Vinn1 be connected；The grid end of the substrate of P5 and P5, the grid end of N1, the substrate of N1, the grid end of N3, N3
Substrate, the grid end of N4, the substrate of N4, inverting input terminal Vinn1 are connected；
The source of N1 is connected with the drain terminal of the source of N2, N3, and the drain terminal of N1 is connected with the drain terminal of P1, the grid end of N1 and N1's
Substrate, the grid end of N3, the substrate of N3, the grid end of N4, the substrate of N4, the grid end of P5, the substrate of P5, reverse input end Vinn1 phase
Even, the grid end of the substrate of N1 and N1, the grid end of N3, the substrate of N3, the grid end of N4, the substrate of N4, the grid end of P5, P5 substrate,
Inverting input terminal Vinn1 is connected；
The source of N2 is connected with the drain terminal of the source of N1, N3, the drain terminal and the drain terminal of P2 of N2, the grid end of P3, P3 substrate,
The grid end of P4, the drain terminal of P4, the substrate of P4 are connected, and the grid end of N2 is connected with the substrate of N2, non-inverting input terminal Vinp1, the lining of N2
Bottom is connected with the grid end of N2, non-inverting input terminal Vinp1；
The source of N3 is connected to the ground, and the drain terminal of N3 is connected with the source of N1, the source of N2, the substrate of the grid end of N3 and N3,
The grid end of N1, the substrate of N1, the grid end of N4, the substrate of N4, the grid end of P5, the substrate of P5, inverting input terminal Vinn1 are connected, N3
Substrate and N3 grid end, the grid end of N1, the substrate of N1, the grid end of N4, the substrate of N4, the grid end of P5, the substrate of P5, reverse phase it is defeated
Enter to hold Vinn1 to be connected；
The source of N4 is connected to the ground, drain terminal and the drain terminal of P3, the source of P4, the drain terminal of P5, the output end vo ut1 phase of N4
Even, the grid end and the grid end of N1 of N4, the substrate of N1, the grid end of N3, the substrate of N3, the substrate of N4, the grid end of P5, P5 substrate,
Inverting input terminal Vinn1 is connected, the substrate and the grid end of N1 of N4, the substrate of N1, the grid end of N3, the substrate of N3, the grid end of N4, P5
Grid end, the substrate of P5, inverting input terminal Vinn1 be connected.
It is to be understood that the working principle of dynamic threshold comparator 1 is specific as follows from Fig. 2:
When Vinn1 is greater than Vinp1, i.e. VIN is greater than VAUX, and MPS should be connected, the difference of (Vinn1-Vinp1), i.e.,
(VIN-VAUX), the size of Vb1 is determined.(Vinn1-Vinp1) bigger, Vb1 is bigger, and P3 is more not easy to be connected, then Vout1 more connects
It is bordering on GND, i.e., strong zero, MPS conducting degree increases, and electric current increases, and accelerates to CL charging rate；It is (Vinn1-Vinp1) smaller,
Vb1 is smaller, and when Vb1 opens P3, Vout1 depends on the size ratio of P3, N4, and Vout1 output is that weak zero, MPS conducting degree is small,
CL charging current is small；In whole work process, P4 is used as back biased diode always, and Vout1 and Vb1 are kept apart, and improves
The carrying load ability of noise margin, comparator, reduces quiescent current, reduces power consumption；When Vinn1 is less than Vinp1, i.e. VIN
Less than VAUX, MPS should be disconnected, the difference of (Vinp1-Vinn1), i.e. (VAUX-VIN), determine the size of Vb1.
Two, dynamic threshold comparator 2 is first comparator circuit 13
Fig. 3 is referred to, is mainly made of tetra- NMOS tubes of five PMOS tube of P6, P7, P8, P9, P10 and N5, N6, N7, N8.
The source of P6 is connected with supply voltage VDD, the drain terminal of the drain terminal of P6 and N5, the substrate of the grid end of P6 and P6, P7
Grid end, the substrate of P7 are connected, and the substrate of P6 is connected with the grid end of grid end P7 of P6, the substrate of P7；
The source of P7 is connected with supply voltage VDD, the drain terminal and the drain terminal of N6 of P7, the grid end of P8, P8 substrate, P9 leakage
End, the grid end of P9, P9 substrate be connected, the grid end of P7 is connected with the substrate of the grid end of P6, the substrate of P6, P7, the substrate of P7 and
The grid end of P6, the substrate of P6, the grid end of P7 are connected；
The source of P8 is connected with supply voltage VDD, drain terminal and the source of P9, the drain terminal of P10, the drain terminal of N8, output of P8
Vout2 is held to be connected, grid end and the drain terminal of P7, the drain terminal of N6, the substrate of P8, the drain terminal of P9, the grid end of P9, the substrate phase of P9 of P8
Even, the substrate of P8 is connected with the drain terminal of the drain terminal of P7, the grid end of P8, the drain terminal of P9, the grid end of P9, the substrate of P9, N6；
The source of P9 is connected with the drain terminal of P8, the drain terminal of P10, the drain terminal of N8, output end vo ut2, the drain terminal of P9 and P8's
Grid end, the substrate of P8, the grid end of P9, P9 substrate be connected, the grid end and the grid end of P8 of P9, the substrate of P8, the drain terminal of P9, P9
Substrate is connected, and the substrate of P9 is connected with the grid end of the grid end of P8, the substrate of P8, the drain terminal of P9, P9；
The source of P10 is connected with supply voltage VDD, drain terminal and the drain terminal of P8, the source of P9, the drain terminal of N8, output of P10
Hold Vout2 to be connected, the grid end and the substrate of P10 of P10, the grid end of N5, the substrate of N5, the grid end of N7, the substrate of N7, N8 grid
End, the substrate of N8, inverting input terminal Vinn2 are connected；The grid end of the substrate of P10 and P10, the grid end of N5, the substrate of N5, N7 grid
End, the substrate of N7, the grid end of N8, the substrate of N8, inverting input terminal Vinn2 are connected；
The source of N5 is connected with the drain terminal of the source of N6, N7, and the drain terminal of N5 is connected with the drain terminal of P6, the grid end of N5 and N5's
Substrate, the grid end of N7, the substrate of N7, the grid end of N8, the substrate of N8, the grid end of P10, the substrate of P10, reverse input end Vinn2
Be connected, the grid end of the substrate of N5 and N5, the grid end of N7, the substrate of N7, the grid end of N8, the substrate of N8, the grid end of P10, P10 lining
Bottom, inverting input terminal Vinn2 are connected；
The source of N6 is connected with the drain terminal of the source of N5, N7, the drain terminal and the drain terminal of P7 of N6, the grid end of P8, P8 substrate,
The grid end of P9, the drain terminal of P9, the substrate of P9 are connected, and the grid end of N6 is connected with the substrate of N6, non-inverting input terminal Vinp2, the lining of N6
Bottom is connected with the grid end of N6, non-inverting input terminal Vinp2；
The source of N7 is connected to the ground, and the drain terminal of N7 is connected with the source of N5, the source of N6, the substrate of the grid end of N7 and N7,
The grid end of N5, the substrate of N5, the grid end of N8, the substrate of N8, the grid end of P10, the substrate of P10, inverting input terminal Vinn2 are connected,
The grid end of the substrate of N7 and N7, the grid end of N5, the substrate of N5, the grid end of N8, the substrate of N8, the grid end of P10, P10 substrate, anti-
Phase input terminal Vinn2 is connected；
The source of N8 is connected to the ground, drain terminal and the drain terminal of P8, the source of P9, the drain terminal of P10, the output end vo ut2 phase of N8
Even, the grid end and the grid end of N5 of N8, the substrate of N5, the grid end of N7, the substrate of N7, the substrate of N8, the grid end of P10, P10 lining
Bottom, inverting input terminal Vinn2 are connected, the substrate and the grid end of N5 of N8, the substrate of N5, the grid end of N7, the substrate of N7, N8 grid
End, the grid end of P10, the substrate of P10, inverting input terminal Vinn2 are connected；
In conjunction with Fig. 1 and Fig. 3, the working principle and realization function of dynamic threshold comparator 2 are specific as follows:
When VIN is greater than VAUX, comparator 1 and the output of comparator 2 are low, MPS conducting, MNS disconnection.Input passes through MPS
It charges to load capacitance, and output is provided.When VIN is less than VAUX, comparator 1 exports height, and MPS is disconnected.Comparator 2 is likely to occur
Two kinds of situations: 1) VIN is greater than zero, and still to be low, MNS is disconnected the output of comparator 2, and CL discharges to load resistance, provides output；2)
Less than zero, (VIN is converted to half-wave signa usually from bridge rectifier, by AC signal to VIN, in input voltage zero-crossing
Nearby there is oscillation in point, in fact it could happen that negative value, it is believed that be noise signal, cause the unstability of circuit), comparator 2 is defeated
Become high out, input VIN is connected with GND, improves the noise margin of rectifier, eliminate the vibration near zero-crossing point by MNS conducting
Phenomenon is swung, zero-crossing problem of dtmf distortion DTMF is reduced, improves the limitation of harmonic current and frequency to system, improves system stability.
Three, switching load circuit
Refer to Fig. 4, mainly by a PMOS switch pipe MPS, NMOS switch pipe a MNS, a load capacitance CL and
One load resistance RLOAD composition.
The source of MPS with the grid end of N1, the substrate of N1, the grid end of N3, the substrate of N3, the grid end of N4, the substrate of N4, P5
Grid end, the substrate of P5, the drain terminal of inverting input terminal Vinn1, MNS, the grid end of N5 and the substrate of N5, the grid end of N7, N7 lining
Bottom, the grid end of N8, the substrate of N8, the grid end of P10, the substrate of P10, that reverse input end Vinn2 is commonly connected to interface circuit is defeated
Enter and hold VIN, the drain terminal and the grid end of N2 of MPS, the substrate of N2, one end of non-inverting input terminal Vinp1, CL, one end of RLOAD are common
It is connected to the grid end and the drain terminal of N4, the drain terminal of P3, the source of P4, the drain terminal of P5, output of interface circuit output end VAUX, MPS
Vout1 is held to be connected, the substrate of MPS is connected with power vd D；
The source of MNS and the grid end of N6 and the substrate of N6, one end of non-inverting input terminal Vinp2, CL, one end of RLOAD are total
With being connected to ground, the source of the drain terminal of MNS and MPS, the grid end of N1, the substrate of N1, the grid end of N3, the substrate of N3, N4 grid end,
The substrate of N4, the grid end of P5, the substrate of P5, the grid end of inverting input terminal Vinn1, N5 and the substrate of N5, the grid end of N7, N7 lining
Bottom, the grid end of N8, the substrate of N8, the grid end of P10, the substrate of P10, that reverse input end Vinn2 is commonly connected to interface circuit is defeated
Enter and hold VIN, the grid end of MNS is connected with the drain terminal of N8, the drain terminal of P8, the source of P9, the drain terminal of P10, output end vo ut2, MNS's
Substrate is connected to the ground；
One end and one end of RLOAD of CL, the drain terminal of MPS, the grid end of N2, the substrate of N2, non-inverting input terminal Vinp1 are common
Be connected to interface circuit output end VAUX, CL the other end and the other end of RLOAD, the source of MNS, the grid end of N6, N6 lining
Bottom, non-inverting input terminal Vinp2 are commonly connected to ground；
One end of RLOAD and one end of CL with, the substrate of the grid end of the drain terminal of MPS, N2, N2, non-inverting input terminal Vinp1 it is total
With the other end and the other end of CL, the source of MNS, the grid end of N6, the N6 for being connected to interface circuit output end VAUX, RLOAD
Substrate, non-inverting input terminal Vinp2 are commonly connected to ground.
By the interconnection with double acting state threshold comparator, switching load circuit obtains good load driving capability
And itself is unlikely to consume excessive power consumption.
It can be seen that the dynamic threshold comparator interface circuit obtained for micro-energy of the invention not only have it is lower
Power consumption, and there is higher noise margin and system stability, normal work is remained under the variation of the external environments such as temperature, technique
Make.
Embodiment 3:
The present invention also provides a kind of rectifier and wireless sensors.The comprising modules of the wireless sensor are encapsulated in one
In shell, including rectifier.Rectifier is a fairing, and major function is that alternating current (AC) is become direct current
(DC), it charges after filtering to energy-storage travelling wave tubes such as super capacitor or rechargeable batteries, so that load uses, for the present invention
Rectifier may include low-power consumption dynamic threshold comparator interface circuit 10 in above-described embodiment.
The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be said that
Specific implementation of the invention is only limited to these instructions.For those of ordinary skill in the art to which the present invention belongs, exist
Under the premise of not departing from present inventive concept, a number of simple deductions or replacements can also be made, all shall be regarded as belonging to of the invention
Protection scope.
Claims (7)
1. a kind of low-power consumption dynamic threshold comparator interface circuit (10) characterized by comprising input terminal (VIN), output end
(VAUX), first comparator circuit (11), the second comparator circuit (13), switching load circuit (15) and ground terminal (GND)；Its
In,
The switching load circuit (15) includes the first power switch (MPS), the second power switch (MNS), load capacitance (CL)
And load resistance (RLOAD), first power switch (MPS) are electrically connected to the input terminal (VIN) and the output end
(VAUX) between and its control terminal is electrically connected to the output end (Vout1) of the first comparator circuit (11), the load electricity
Hold (CL) and load resistance (RLOAD) and is serially connected between the output end (VAUX) and the ground terminal (GND) after connecing, it is described
Second power switch (MNS) is electrically connected between the input terminal (VIN) and the ground terminal (GND) and its control terminal is electrically connected
To the output end (Vout2) of second comparator circuit (13)；
The non-inverting input terminal (Vinp1) of the first comparator circuit (11) is electrically connected to the output end (VAUX) and reverse phase is defeated
Enter end (Vinn1) and is electrically connected to the input terminal (VIN)；The first comparator circuit (11) includes power end (VDD), first
It just compresses switch (P1), second just compress switch (P2), third just compresses switch (P3), the 4th just compresses switch (P4), the 5th just compresses switch
(P5), the first negative pressure switch (N1), the second negative pressure switch (N2), third negative pressure switch (N3), the 4th negative pressure switch (N4)；Its
In,
Described first just compresses switch (P1), is electrically connected after first negative pressure switch (N1) and the third negative pressure switch (N3) concatenation
It is connected between the power end (VDD) and the ground terminal (GND)；Described second just compress switch (P2) opened with second negative pressure
The power end (VDD) and first negative pressure switch (N1) and the third negative pressure switch are electrically connected to after closing (N2) concatenation
(N3) between the node (a1) that concatenation is formed；Described first control terminal for just compressing switch (P1) is electrically connected to second positive pressure
Switch the control terminal of (P2)；The control terminal of first negative pressure switch (N1) and the third negative pressure switch (N3) is electrically connected to
The inverting input terminal (Vinn1) of the first comparator circuit (11)；The control terminal of second negative pressure switch (N2) is electrically connected
To the non-inverting input terminal (Vinp1) of the first comparator circuit (11)；
The third just compress switch (P3) just compressing switch with the described 4th be electrically connected to after (P4) is concatenated the power end (VDD) and
Described second just compress switch (P2) concatenated with second negative pressure switch (N2) formed node (b1) between；The third is just
The control terminal that (P3) is just compressing switch (P4) with the described 4th that compresses switch be electrically connected to described second just compressing switch (P2) with it is described
At the node (b1) that second negative pressure switch (N2) concatenation is formed；
Described 5th just compresses switch be electrically connected to after (P5) is concatenated with the 4th negative pressure switch (N4) power end (VDD) and
Between the ground terminal (GND), the described 5th just compresses switch (P5) and the control terminal of the 4th negative pressure switch (N4) is electrically connected
It is connected to the inverting input terminal (Vinn1) of the first comparator circuit (11)；
The output end (Vout1) of the first comparator circuit (11) is respectively electrically connected to the third and just compresses switch (P3) and institute
The 4th is stated just to compress switch at the node that (P4) concatenation is formed and the described 5th just compresses switch (P5) and the 4th negative pressure switch
(N4) at the node that concatenation is formed；
The non-inverting input terminal (Vinp2) of second comparator circuit (13) is electrically connected to the ground terminal (GND) and reverse phase is defeated
Enter end (Vinn2) and is electrically connected to the input terminal (VIN).
2. interface circuit (10) according to claim 1, which is characterized in that second comparator circuit (13) includes electricity
Source (VDD), the 6th just compress switch (P6), the 7th just compress switch (P7), the 8th just compressing switch (P8), the 9th just compresses switch
(P9), it the tenth just compresses switch (P10), the 5th negative pressure switch (N5), the 6th negative pressure switch (N6), the 7th negative pressure switch (N7),
Eight negative pressure switches (N8)；Wherein,
Described 6th just compresses switch (P6), is electrically connected after the 5th negative pressure switch (N5) and the 7th negative pressure switch (N7) concatenation
It is connected between the power end (VDD) and the ground terminal (GND)；Described 7th just compresses switch (P7) and the 6th negative pressure is opened
The power end (VDD) and the 5th negative pressure switch (N5) and the 7th negative pressure switch are electrically connected to after closing (N6) concatenation
(N7) between the node (a2) that concatenation is formed；Described 6th control terminal for just compressing switch (P6) is electrically connected to the 7th positive pressure
Switch the control terminal of (P7)；The control terminal of 5th negative pressure switch (N5) and the 7th negative pressure switch (N7) is electrically connected to
The inverting input terminal (Vinn2) of second comparator circuit (13)；The control terminal of 6th negative pressure switch (N6) is electrically connected
To the non-inverting input terminal (Vinp2) of second comparator circuit (13)；
Described 8th just compress switch (P8) just compressing switch with the described 9th be electrically connected to after (P9) is concatenated the power end (VDD) and
Described 7th just compress switch (P7) concatenated with the 6th negative pressure switch (N6) formed node (b2) between；Described 8th just
The control terminal that (P8) is just compressing switch (P9) with the described 9th that compresses switch be electrically connected to the described 7th just compressing switch (P7) with it is described
At the node (b2) that 6th negative pressure switch (N6) concatenation is formed；
Described tenth, which just compresses switch, is electrically connected to the power end (VDD) after (P10) is concatenated with the 8th negative pressure switch (N8)
Between the ground terminal (GND), the described tenth just compresses switch (P10) and the control terminal of the 8th negative pressure switch (N8) is electric
It is connected to the inverting input terminal (Vinn2) of second comparator circuit (13)；
The output end (Vout2) of second comparator circuit (13) is respectively electrically connected to the described 8th and just compresses switch (P8) and institute
The 9th is stated just to compress switch at the node that (P9) concatenation is formed and the described tenth just compresses switch (P10) and the 8th negative pressure switch
(N8) at the node that concatenation is formed.
3. interface circuit (10) according to claim 2, which is characterized in that described first just compress switch (P1), described
Two just compress switch (P2), the third just compresses switch (P3), the described 4th just compresses switch (P4), the described 5th just compresses switch
(P5), the described 6th just compress switch (P6), the described 7th just compress switch (P7), the described 8th just compressing switch (P8), the described 9th
Just compress switch (P9) and the described tenth just compress switch (P10) be PMOS tube, and its control terminal is the grid of PMOS tube.
4. interface circuit (10) according to claim 2, which is characterized in that first negative pressure switch (N1), described
Two negative pressure switches (N2), the third negative pressure switch (N3), the 4th negative pressure switch (N4), the 5th negative pressure switch
(N5), the 6th negative pressure switch (N6), the 7th negative pressure switch (N7), the 8th negative pressure switch (N8) are NMOS tube, and its control terminal
It is the grid of NMOS tube.
5. interface circuit (10) according to claim 1, which is characterized in that first power switch (MPS) is PMOS
Pipe and its control terminal are the grid of PMOS tube, and second power switch (MNS) is NMOS tube and its control terminal is NMOS tube
Grid.
6. a kind of rectifier, which is characterized in that including interface circuit as claimed in any one of claims 1 to 5 (10).
7. a kind of wireless sensor, including rectifier, which is characterized in that the rectifier includes such as any one of Claims 1 to 5
The interface circuit (10).
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