CN106206321A - The preparation method of semiconductor device - Google Patents
The preparation method of semiconductor device Download PDFInfo
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- CN106206321A CN106206321A CN201610694067.9A CN201610694067A CN106206321A CN 106206321 A CN106206321 A CN 106206321A CN 201610694067 A CN201610694067 A CN 201610694067A CN 106206321 A CN106206321 A CN 106206321A
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- dielectric layer
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Abstract
The preparation method of the semiconductor device that the present invention provides, including: providing Semiconductor substrate, semiconductor substrate surface has dummy grid and the side wall around dummy gate pole；Remove dummy grid, form groove；Sidewall and diapire at groove form dielectric layer；Described dielectric layer is formed the first high-k dielectric layer；Using diamond to form the second high-k dielectric layer in described first high-k dielectric layer so that containing nitrogen in described second high-k dielectric layer, described first high-k dielectric layer forms gate dielectric layer with described second high-k dielectric layer；Described second high-k dielectric layer is formed barrier layer；Forming gate electrode on described barrier layer, described gate electrode fills described groove.In the present invention, the first high-k dielectric layer, it can be avoided that Nitrogen ion enters in dielectric layer, extends the life-span of semiconductor device, and second covalent bond that there is N in high-k dielectric layer, occupy Lacking oxygen in the second high-k dielectric layer, thus reduce the leakage current of gate dielectric layer, improve the performance of semiconductor device.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing technology field, particularly relate to the preparation side of a kind of semiconductor device
Method.
Background technology
During using dummy grid to manufacture semiconductor device, it is typically included on substrate formation dummy grid, source electrode, leakage
Pole, then removes the appropriate section on dummy grid, and fills the groove produced because removing the part of dummy grid to form grid
Etc. a series of step.Concrete, with reference to shown in Fig. 1, form side wall 11 over the substrate 10, remove the pseudo-grid that side wall 11 surrounds
Pole (not shown) thus form groove 12.Afterwards, with reference to shown in Fig. 2, groove 12 forms dielectric layer 13, gate dielectric layer
14, barrier layer 15 and gate electrode 16, dielectric layer 13, gate dielectric layer 14, barrier layer 15 and gate electrode 16 form grid.So
And, owing to having Lacking oxygen in gate dielectric layer 14 of the prior art, thus there is leakage current, affect the property of semiconductor device
Energy.
Summary of the invention
It is an object of the invention to provide the preparation method of semiconductor device, solve gate dielectric layer of the prior art and exist
The problem of leakage current.
For solving above-mentioned technical problem, the present invention provides the preparation method of a kind of semiconductor device, including:
Thering is provided Semiconductor substrate, described semiconductor substrate surface has dummy grid and the side wall around dummy gate pole；
Remove dummy gate pole, form a groove；
Sidewall and diapire at described groove form a dielectric layer；
Described dielectric layer is formed the first high-k dielectric layer；
Described first high-k dielectric layer use diamond form the second high-k dielectric layer so that described second high k is situated between
Containing nitrogen in matter layer, described first high-k dielectric layer forms gate dielectric layer with described second high-k dielectric layer；
Described second high-k dielectric layer is formed barrier layer；
Forming gate electrode on described barrier layer, described gate electrode fills described groove.
Optionally, atomic vapor deposition technique or chemical vapor deposition method is used to form described first high-k dielectric layer, institute
The material stating the first high-k dielectric layer is hafnium oxide, and thickness is
Optionally, the mixed gas of hafnium tetrachloride and steam is used to form described first high-k dielectric layer, and described mixing
Gas flow is 5sccm～20sccm.
Optionally, the temperature forming described first high-k dielectric layer is 300 DEG C～550 DEG C.
Optionally, atomic vapor deposition technique or chemical vapor deposition method is used to form described second high-k dielectric layer, institute
The material stating the second high-k dielectric layer is hafnium oxide, and thickness is
Optionally, described diamond is ammonia, uses the mixed gas of hafnium tetrachloride, steam and ammonia to be formed described
Second high-k dielectric layer, and described mixed gas flow is 5sccm～30sccm, the flow of ammonia is 2sccm～10sccm.
Optionally, the temperature forming described second high-k dielectric layer is 300 DEG C～550 DEG C.
Optionally, the material of described dielectric layer is silicon oxide, and the thickness of described dielectric layer is
Optionally, the material on described barrier layer is tantalum nitride or titanium nitride, and the thickness on described barrier layer is
Optionally, the material of described gate electrode is the one in metallic copper, titanium, silver or gold, and the thickness of described gate electrode is
Compared with prior art, in the preparation method of the semiconductor device that the present invention provides, forming the first high-k dielectric layer
Afterwards, diamond is used to form the second high-k dielectric layer, nitrogenous in the second high-k dielectric layer.In the present invention, the first high-k dielectric layer
It can be avoided that Nitrogen ion enters in dielectric layer, extend the life-span of semiconductor device, and the second high-k dielectric layer exists the covalency of N
Key, occupies Lacking oxygen in the second high-k dielectric layer, thus reduces the leakage current of gate dielectric layer, improves the performance of semiconductor device.
Accompanying drawing explanation
Fig. 1 is the structural representation of dummy grid in prior art；
Fig. 2 is the structural representation of the grid formed in prior art
Fig. 3 is the flow chart of the preparation method of semiconductor device in one embodiment of the invention；
Fig. 4 is the structural representation of the groove formed in one embodiment of the invention；
Fig. 5 is the structural representation forming dielectric layer in one embodiment of the invention；
Fig. 6 is the structural representation forming the first high-k dielectric layer in one embodiment of the invention；
Fig. 7 is the structural representation forming the second high-k dielectric layer in one embodiment of the invention；
Fig. 8 is the structural representation forming barrier layer in one embodiment of the invention；
Fig. 9 is the structural representation forming gate electrode in one embodiment of the invention.
Detailed description of the invention
Below in conjunction with schematic diagram, the preparation method of the semiconductor device of the present invention is described in more detail, Qi Zhongbiao
Show the preferred embodiments of the present invention, it should be appreciated that those skilled in the art can revise invention described herein, and still
Realize the advantageous effects of the present invention.Therefore, it is widely known that description below is appreciated that for those skilled in the art, and
It is not intended as limitation of the present invention.
In order to clear, whole features of practical embodiments are not described.In the following description, it is not described in detail known function
And structure, because they can make to due to the fact that unnecessary details and chaotic.Will be understood that opening in any practical embodiments
In Faing, it is necessary to make a large amount of implementation detail to realize the specific objective of developer, such as according to relevant system or relevant business
Limit, an embodiment change into another embodiment.Additionally, it should think that this development is probably complexity and consuming
Time, but it is only routine work to those skilled in the art.
Referring to the drawings the present invention the most more particularly described below in the following passage.Want according to following explanation and right
Book, advantages and features of the invention is asked to will be apparent from.It should be noted that, accompanying drawing all uses the form simplified very much and all uses non-
Ratio accurately, only in order to facilitate, to aid in illustrating lucidly the purpose of the embodiment of the present invention.
Gate dielectric layer 14 of the prior art is generally adopted as hafnium oxide (HfO2), inventor finds at HfO through research2
After thin film deposition, by plasma nitrided uncoupling (decoupled plasma nitridation, DPN) to HfO2Thin film enters
Row nitrogen treatment, can eliminate part Lacking oxygen, forms the covalent bond of Hf-N, plays the effect reducing leakage current.But, nitrogen from
Son can enter into the inside of dielectric layer 13 under the effect of plasma and temperature, forms trapping centre, and this trapping centre can amass
Tired positive charge, accumulates to a certain degree can cause component failure, the service life of device is formed fatal impact.
Therefore, inventor, through further research, proposes technical scheme, and the core concept of the present invention exists
In, after forming the first high-k dielectric layer, use diamond to form the second high-k dielectric layer, nitrogenous in the second high-k dielectric layer.
In the present invention, the first high-k dielectric layer, it can be avoided that Nitrogen ion enters in dielectric layer, extends the service life of semiconductor device, and
And, the second high-k dielectric layer exists the covalent bond of Hf-N, occupies Lacking oxygen in the second high-k dielectric layer, thus reduce gate medium
The leakage current of layer, further improves the performance of semiconductor device.
Being described in detail the preparation method of the semiconductor device of the present invention below in conjunction with accompanying drawing 3～Fig. 9, Fig. 4 is half
The flow chart of the preparation method of conductor device, Fig. 4～Fig. 9 is the structural representation that each step is corresponding, the preparation of semiconductor device
Method comprises the steps:
First, with reference to shown in Fig. 4, perform step S1, it is provided that Semiconductor substrate 100, described Semiconductor substrate 100 can be
The substrat structures known in those skilled in the art such as silicon substrate, germanium silicon substrate, carbon silicon substrate, SOI substrate.At described quasiconductor
Substrate 100 is formed the structures such as fleet plough groove isolation structure, source electrode, drain electrode.Afterwards, formed on described Semiconductor substrate 100 surface
Dummy grid (not shown) and around the side wall 110 around dummy gate pole.
Then, with reference to shown in Fig. 4, perform step S2, remove dummy gate pole, form a groove 120.In the present embodiment,
Dummy gate extremely polysilicon, can use the techniques such as dry etching to remove dummy gate pole, and this is not limited by the present invention.
With reference to shown in Fig. 5, performing step S3, sidewall and diapire at described groove 120 form a dielectric layer 130.This reality
Executing in example, the techniques such as chemical gaseous phase deposition can be used to form described dielectric layer 130, the material of described dielectric layer 130 is oxidation
Silicon, the thickness of described dielectric layer 130 is
With reference to shown in Fig. 6, perform step S4, described dielectric layer 130 is formed the first high-k dielectric layer 141.Use atom
Gas-phase deposition or chemical vapor deposition method form described first high-k dielectric layer 141, it is preferred that use former in the present invention
Sub-gas-phase deposition forms described first high-k dielectric layer, and described first high-k dielectric layer 141 is hafnium oxide (HfO2), such as,
Use hafnium tetrachloride (HfCl4) and the mixed gas of steam form described first high-k dielectric layer 141, form described first high k
The temperature of dielectric layer is 300 DEG C～555 DEG C, and, described mixed gas flow is 5sccm～20sccm, wherein, hafnium tetrachloride
Gas flow be 5sccm～10sccm, the gas flow of steam is 10sccm～20sccm.In the present embodiment, formation
The thickness of described first high-k dielectric layer 140 isSuch as,Deng.
Then, with reference to shown in Fig. 7, perform step S5, described first high-k dielectric layer 141 uses diamond formed
Second high-k dielectric layer 142 so that containing nitrogen in described second high-k dielectric layer 142, described first high-k dielectric layer 141 is with described
Second high-k dielectric layer 142 forms gate dielectric layer 140.Same, in the present invention, use atomic vapor deposition technique or chemistry gas
Phase depositing operation forms described second high-k dielectric layer 142, it is preferred that use atomic vapor deposition technique to form described second high k
Dielectric layer 142.In the present embodiment, described diamond is ammonia (NH3), thus use hafnium tetrachloride, steam and ammonia
Mixed gas form described second high-k dielectric layer 142, the temperature forming described second high-k dielectric layer 142 is 300 DEG C～550
℃.And described mixed gas flow is 5sccm～30sccm, wherein, the gas flow of hafnium tetrachloride be 5sccm～
10sccm, the gas flow of steam is 10sccm～20sccm, and the flow of ammonia is 2sccm～10sccm.In the present embodiment,
The thickness forming described second high-k dielectric layer 142 isSuch as,Deng.Can
To be understood by, the diamond in the present invention is not limited to as ammonia, it is also possible to use the gas that other are nitrogenous, such as, nitrogen
Gas etc., this is not limited by the present invention.
It should be noted that in the gate dielectric layer 140 of present invention formation, the first high-k dielectric layer 141 does not contains nitrogen, simultaneously
Be prevented from being formed the nitrogen during the second high-k dielectric layer 142 and enter dielectric layer, it is to avoid the nitrogen in the second high-k dielectric layer to
Dielectric layer 130 spreads, thus extends the service life of semiconductor device.Further, there is Hf-N in the second high-k dielectric layer 142
Covalent bond, occupy the Lacking oxygen in the second high-k dielectric layer 142, thus reduce the leakage current of gate dielectric layer 140, further
Improve semiconductor device performance.
Afterwards, with reference to shown in Fig. 8, perform step S6, described second high-k dielectric layer 142 is formed barrier layer 150.This
In embodiment, the material on described barrier layer 150 is tantalum nitride or titanium nitride, and the thickness on described barrier layer 150 isSuch as,Deng.
Finally, with reference to shown in Fig. 9, perform step S7, described barrier layer 150 is formed gate electrode 160, described gate electrode
160 fill described groove.In the present embodiment, the material of described gate electrode 160 is the one in metallic copper, titanium, silver or gold, and
And, the techniques such as plating, sputtering can be used to form described gate electrode, the thickness of described gate electrode isExample
As,Deng.
In sum, in the preparation method of the semiconductor device that the present invention provides, after forming the first high-k dielectric layer,
Diamond is used to form the second high-k dielectric layer, nitrogenous in the second high-k dielectric layer.In the present invention, the first high-k dielectric layer can
Avoid Nitrogen ion to enter in dielectric layer, extend the service life of semiconductor device, and, there is Hf-N in the second high-k dielectric layer
Covalent bond, occupy Lacking oxygen in the second high-k dielectric layer, thus reduce the leakage current of gate dielectric layer, further improve half
The performance of conductor device.
Obviously, those skilled in the art can carry out various change and the modification essence without deviating from the present invention to the present invention
God and scope.So, if these amendments of the present invention and modification belong to the scope of the claims in the present invention and equivalent technologies thereof
Within, then the present invention is also intended to comprise these change and modification.
Claims (10)
1. the preparation method of a semiconductor device, it is characterised in that including:
Thering is provided Semiconductor substrate, described semiconductor substrate surface has dummy grid and the side wall around dummy gate pole；
Remove dummy gate pole, form a groove；
Sidewall and diapire at described groove form a dielectric layer；
Described dielectric layer is formed the first high-k dielectric layer；
Described first high-k dielectric layer use diamond form the second high-k dielectric layer so that described second high-k dielectric layer
In containing nitrogen, described first high-k dielectric layer forms gate dielectric layer with described second high-k dielectric layer；
Described second high-k dielectric layer is formed barrier layer；
Forming gate electrode on described barrier layer, described gate electrode fills described groove.
2. the preparation method of semiconductor device as claimed in claim 1, it is characterised in that use atomic vapor deposition technique or
Chemical vapor deposition method forms described first high-k dielectric layer, and the material of described first high-k dielectric layer is hafnium oxide, and thickness is
3. the preparation method of semiconductor device as claimed in claim 2, it is characterised in that use hafnium tetrachloride and steam
Mixed gas forms described first high-k dielectric layer, and described mixed gas flow is 5sccm～20sccm.
4. the preparation method of semiconductor device as claimed in claim 3, it is characterised in that form described first high-k dielectric layer
Temperature be 300 DEG C～550 DEG C.
The preparation method of semiconductor device the most as claimed in claim 1 or 2 or 3 or 4, it is characterised in that use atom gas phase
Depositing operation or chemical vapor deposition method form described second high-k dielectric layer, and the material of described second high-k dielectric layer is oxidation
Hafnium, thickness is
6. the preparation method of semiconductor device as claimed in claim 5, it is characterised in that described diamond is ammonia, adopts
Form described second high-k dielectric layer by the mixed gas of hafnium tetrachloride, steam and ammonia, and described mixed gas flow is
5sccm～30sccm, the flow of ammonia is 2sccm～10sccm.
7. the preparation method of semiconductor device as claimed in claim 6, it is characterised in that form described second high-k dielectric layer
Temperature be 300 DEG C～550 DEG C.
8. the preparation method of semiconductor device as claimed in claim 1, it is characterised in that the material of described dielectric layer is oxidation
Silicon, the thickness of described dielectric layer is
9. the preparation method of semiconductor device as claimed in claim 1, it is characterised in that the material on described barrier layer is nitridation
Tantalum or titanium nitride, the thickness on described barrier layer is
10. the preparation method of semiconductor device as claimed in claim 1, it is characterised in that the material of described gate electrode is gold
Belonging to the one in copper, titanium, silver or gold, the thickness of described gate electrode is
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| CN201610694067.9A CN106206321A (en) | 2016-08-19 | 2016-08-19 | The preparation method of semiconductor device |
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| CN201610694067.9A CN106206321A (en) | 2016-08-19 | 2016-08-19 | The preparation method of semiconductor device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110164878A (en) * | 2019-06-10 | 2019-08-23 | 惠科股份有限公司 | Array substrate and preparation method thereof |
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| US20060273411A1 (en) * | 2005-06-07 | 2006-12-07 | Freescale Semiconductor, Inc. | In-situ nitridation of high-k dielectrics |
| US20100203704A1 (en) * | 2009-02-12 | 2010-08-12 | Seiji Inumiya | Semiconductor device manufacturing method |
| CN102365721A (en) * | 2009-03-26 | 2012-02-29 | 东京毅力科创株式会社 | Method for forming a high-k gate stack with reduced effective oxide thickness |
| US20130316525A1 (en) * | 2012-05-24 | 2013-11-28 | Samsung Electronics Co., Ltd. | Semiconductor device having selectively nitrided gate insulating layer and method of fabricating the same |
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2016
- 2016-08-19 CN CN201610694067.9A patent/CN106206321A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060273411A1 (en) * | 2005-06-07 | 2006-12-07 | Freescale Semiconductor, Inc. | In-situ nitridation of high-k dielectrics |
| US20100203704A1 (en) * | 2009-02-12 | 2010-08-12 | Seiji Inumiya | Semiconductor device manufacturing method |
| CN102365721A (en) * | 2009-03-26 | 2012-02-29 | 东京毅力科创株式会社 | Method for forming a high-k gate stack with reduced effective oxide thickness |
| US20130316525A1 (en) * | 2012-05-24 | 2013-11-28 | Samsung Electronics Co., Ltd. | Semiconductor device having selectively nitrided gate insulating layer and method of fabricating the same |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110164878A (en) * | 2019-06-10 | 2019-08-23 | 惠科股份有限公司 | Array substrate and preparation method thereof |
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Application publication date: 20161207 |