CN106160715A - The multiplexer that switching switchs and comprises it - Google Patents
The multiplexer that switching switchs and comprises it Download PDFInfo
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- CN106160715A CN106160715A CN201510183774.7A CN201510183774A CN106160715A CN 106160715 A CN106160715 A CN 106160715A CN 201510183774 A CN201510183774 A CN 201510183774A CN 106160715 A CN106160715 A CN 106160715A
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Abstract
The present invention provides a kind of and switches switch and the multiplexer comprising it, it is adaptable to high-frequency signal is sent to outfan from input by selectivity, and switching switch comprises switching device and variable resistance.Switching device is connected between input and outfan and comprises control end, according to the switch controlling signal of supply to control end, switches between conducting state and off state.Variable resistance is connected to control end, variable resistance changes into the first resistance value according to resistance control signal under the conducting state of switching device, and under the off state of switching device, change into the second resistance value, wherein the first resistance value is higher than the second resistance value, and resistance control signal correspondence switch controlling signal produces change.
Description
Technical field
The present invention switches switch and the multiplexer comprising it, more precisely, about one about a kind of
By arranging variable resistance on the switchgear to reduce the switching switch of interference and loss and to comprise it
Multiplexer.
Background technology
Multiplexer selects one of them using as output signal in order to switching in multiple input signals.Many
The purposes of multiplexer is quite varied；For example, in contemporary electronic systems, multiple parallel signals can quilt
Be converted to a serial signal to reduce the hardware cost of signal transmission.Multiple parallel signals are being converted to
During serial signal, it is simply that select each parallel signals with multiplexer the most one by one, make these
Each pen data sequentially serial in parallel signals is in the serial signal that multiplexer exports.
Known multiplexer, general in high-speed applications, it may be desirable to signal can be complete by passing
Sending lock, signal does not have unnecessary loss, the most not by other signal disturbing, as shown in 1A schemes,
In the design of multiplexer 1, being frequently present of parasitic capacitance (Parasitic capacitance), it is electricity
In road between electronic building brick or between circuit module, due to close to each other, the inevitable electricity of formation
Hold.These electric capacity are by different with ideal situation for the performance making multiplexer, and this electric capacity is in high frequency feelings
Condition embody especially prominent.
Multiplexer can be made up of multiple switches, and traditional switch is that serial is at first input end In1 and
On the signal path of two input In2 and outfan Out, but the parasitic circuit of switch itself can produce
Raw signal attenuation and interference, but on side circuit, due to ghost effect, being bound to, it is unnecessary to produce
Loss and interference, and cause decay and the distortion of signal, as shown in Figure 1B.Therefore, it is badly in need of
A kind of energy reduces decay and the switching switch of interference and multiplexer.
Summary of the invention
In order to solve the problems referred to above, an aspect system of the present invention provides one switching switch, it is adaptable to
From input, high-frequency signal is sent to outfan, and switching switch comprises switching device and variable resistance.
Switching device is connected between input and outfan and comprises control end, according to supply to controlling end
Switch controlling signal, switches between conducting state and off state.Variable resistance is connected to control end,
Variable resistance changes into the first resistance value according to resistance control signal under the conducting state of switching device,
And under the off state of switching device, change into the second resistance value, wherein the first resistance value is higher than second
Resistance value, and the generation change of resistance control signal correspondence switch controlling signal.
Preferably, the frequency of high-frequency signal, is can be enough under the conducting state of switching device, depending on logical
The parasitic capacitance crossed between input and control end is guiding path person, and also be enough at switching device extremely
Under off state, regard by the parasitic capacitance between input and outfan as guiding path person.
Preferably, the variable resistance the first resistance value under the conducting state of switching device can be more than input
The impedance of the parasitic capacitance between end and control end.
Preferably, the variable resistance the second resistance value under the off state of switching device is smaller than input
The impedance of the parasitic capacitance between end and outfan.
Preferably, switching device can be brilliant by N-type metal-oxide half field effect transistor and p-type MOSFET
The transmission gate that body pipe is constituted, and control end and can comprise grid and the P of N-type metal-oxide half field effect transistor
The grid of type metal-oxide half field effect transistor.
Preferably, variable resistance can comprise grid and the P connecting N-type metal-oxide half field effect transistor respectively
First variable resistance of the grid of type metal-oxide half field effect transistor and the second adjustable resistance.
Preferably, resistance control signal can be switch controlling signal.
Preferably, resistance control signal can comprise and controls the first variable resistance and the second adjustable resistance respectively
The first resistance control signal and the second resistance control signal.
Another aspect according to the present invention, it is provided that a kind of multiplexer, it is adaptable to by high-frequency signal from the
One of them of one input and the second input is sent to outfan, and multiplexer comprises the first switch dress
Put, second switch device, the first variable resistance and the second adjustable resistance.First switching device is connected to
Between first input end and outfan, and comprising one first control end, it controls according to supply to first
First switch controlling signal of end, switches between conducting state and off state.Second switch device
Being connected between the second input and outfan, and comprise the second control end, it is according to supplying to first
Control the second switch control signal of end, switch between conducting state and off state, and first opens
Close device and the conducting state of second switch device and off state is mutually exclusive.First can power transformation
Resistance is connected to the first control end, its according to the first resistance control signal at the conducting shape of the first switching device
Change into the first resistance value under state, and under the off state of the first switching device, change into the second resistance
Value, wherein the first resistance value is higher than the second resistance value, and corresponding first switch of the first resistance control signal
Control signal produces change.The second adjustable resistance is connected to the second control end, the second adjustable resistance according to
Second resistance control signal changes into the 3rd resistance value under the conducting state of second switch device, and
Changing into the 4th resistance value under the off state of second switch device, wherein the 3rd resistance value is higher than the 4th
Resistance value, and the generation change of the second resistance control signal correspondence second switch control signal.
Preferably, the frequency system of high-frequency signal can be enough to the conducting state at first and second switching device
Under, depending on being controlled the first parasitic capacitance between end by first input end and first and regarding defeated by second
Enter end and the second the second parasitic capacitance controlled between end be guiding path person, and also be enough to first and
Under the off state of second switch device, depending on by the trixenie between first input end and outfan
Electric capacity and regarding by the 4th parasitic capacitance between the second input and outfan as guiding path person.
Preferably, the first resistance value can be more than the impedance of the first parasitic capacitance, and the 3rd resistance value can be big
Impedance in trixenie electric capacity.
Preferably, the second resistance value is smaller than the impedance of the second parasitic capacitance, and the second resistance value can be little
Impedance in the second parasitic capacitance.
Preferably, the first switching device can be by the first N-type metal-oxide half field effect transistor and a P
Type metal-oxide half field effect transistor constitute the first transmission gate, and first control end can comprise first N-type gold
The grid of oxygen half field effect transistor and the grid of the first p-type metal-oxide half field effect transistor, and second switch
Device can be to be made up of the second N-type metal-oxide half field effect transistor and the second p-type metal-oxide half field effect transistor
The second transmission gate, and second control end can comprise the second N-type metal-oxide half field effect transistor grid and
The grid of the second p-type metal-oxide half field effect transistor.
Preferably, the first variable resistance can comprise and connect the first N-type metal-oxide half field effect transistor respectively
5th variable resistance and the 6th of the grid of grid and the first p-type metal-oxide half field effect transistor can power transformation
Resistance, and the second adjustable resistance can comprise connect respectively the second N-type metal-oxide half field effect transistor grid and
7th variable resistance of the grid of the second p-type metal-oxide half field effect transistor and the 8th variable resistance.
Preferably, the first resistance control signal can be the first switch controlling signal, and the second resistance controls letter
Number can be second switch control signal.
Preferably, the first resistance control signal can comprise and controls the 3rd variable resistance and the 4th variable respectively
3rd resistance control signal of resistance and the 4th resistance control signal, the second resistance control signal can comprise
Control the 5th variable resistance and the 6th variable-resistance 5th resistance control signal and the 6th resistance respectively
Control signal.
In sum, the multiplexer that switching under this invention switchs and comprises it, is to open by switching
Close and circuit arranges variable resistance, and adjust variable by resistance control signal correspondence switch controlling signal
The size of resistance so that switching device can reduce the decay of high-frequency signal in the on-state, is closing
Unnecessary signal can be prevented from outfan by the parasitic capacitance of input and outfan under disconnected state
Flow out.In comprising the circuit framework of multiplexer of switching switch, also it is provided with variable resistance, improves
Time during signal transmission by transmitting switch because the insertion loss that caused of the parasitic circuit of switch own and
Cross-talk.That is, decay and the interference of high-frequency signal can be prevented simultaneously.
Accompanying drawing explanation
1A figure is the circuit framework figure of known multiplexer.
1B figure is the schematic diagram that the multiplexer practised uses state.
2A figure is the block chart that the first embodiment that the switching according to the present invention switchs illustrates.
2B figure is the circuit framework figure that the first embodiment that the switching according to the present invention switchs illustrates.
3A figure is the block chart that the second embodiment that the switching according to the present invention switchs illustrates.
3B figure is the circuit framework figure that the second embodiment that the switching according to the present invention switchs illustrates.
4A figure is the block chart that the first embodiment of the multiplexer according to the present invention illustrates.
4B figure is the circuit framework figure that the first embodiment of the multiplexer according to the present invention illustrates.
5A figure is the block chart that the second embodiment of the multiplexer according to the present invention illustrates.And
5B figure is the circuit framework figure that the second embodiment of the multiplexer according to the present invention illustrates.
Detailed description of the invention
For the benefit of your auditor understands the technical characteristic of the present invention, content and advantage and can reach
Effect, hereby coordinates by the present invention with accompanying drawing, and describes in detail as follows with the expression-form of embodiment, and its
Used in graphic, its purport be only signal and aid in illustrating book be used, may not implement for the present invention
After actual proportions and precisely configuration, therefore should just appended graphic ratio be with configuration relation limitation originally
Inventing the scope of the claims on reality is implemented, conjunction is first chatted bright.
Hereinafter, various unit, module, assembly or assembly can be described or claimed as " being configured
For " perform task.On the premise of so, " being configured to " is for by censuring unit/assembly
Comprise the structure performing such task in operation, imply structure.Therefore, i.e. convenient discrete cell
/ assembly the most operates (such as, not open/start), and unit/assembly is still referred to alternatively as being joined
It is set to execution task.
Hereinafter with reference to correlative type, switching switch under this invention and the multiplexer comprising it are described
Embodiment, for making to readily appreciate, the same components in following embodiment with identical symbology come
Explanation.Describe in detail as follows:
2A figure is the block chart that the first embodiment that the switching according to the present invention switchs illustrates.2B
Figure is the circuit framework figure that the first embodiment that the switching according to the present invention switchs illustrates.As 2A schemes
And shown in 2B figure, it is provided that a kind of switching switch 100, it is adaptable to by high-frequency signal from defeated
Enter to hold In to be sent to outfan Out, wherein, switch controlling signal Ctrl_S and resistance
Control signal Ctrl_R provides to switching switch 100.Switching switch 100 comprises switch
Device S and variable resistance R.Switching device S is connected to input In and outfan Out
Between, herein, the frequency of high-frequency signal, the conducting shape at switching device S can be enough to
Under state, regard by input In and the parasitic capacitance that controls between end as guiding path person,
And also be enough under the off state of switching device S, depending on by input In and output
Parasitic capacitance between end Out is guiding path person, as 1B schemes, by parasitism
Guiding path represented by the arrow of electric capacity Cp1, Cp2 and Cp3.
As illustrated in fig. 2b, switching device S can be by N-type gold oxygen half (NMOS) field
The transmission gate that effect transistor and p-type gold oxygen half (PMOS) field-effect transistor are constituted, herein
It is respectively designated as the first switch S1 and second switch S2.The control end of switching device S can
Comprise grid G S1 and grid G S2 of second switch S2 of the first switch S1.First
Switch S1 and second switch S2 is according to the switch controlling signal of supply to control end
Ctrl_S so that switching device S switches between conducting state and off state.Preferably
Ground, in certain embodiments of the invention, due to the first switch S1 and second switch S2
Polarity be contrary, first switch grid G S1 need to connect as illustrated in fig. 2b
Phase inverter INV, for making supply transmit to the switch controlling signal Ctrl_S controlling end
Contrary with the logic level of gate pole GS2 to grid G S1, and the first switch S1 can be made
And second switch S2 can simultaneously turn on and turn off, exist with control switching device S further
Switch between conducting state and off state.In this, phase inverter INV can be NMOS
Phase inverter, PMOS phase inverter, transistor-transistor logic (TTL) phase inverter,
Static complementary formula gold oxygen half (CMOS) phase inverter, saturated carry digital phase inverter, three poles
Body phase inverter etc..
Variable resistance R is connected to control end, as it can be seen, variable resistance R comprises point
Not Lian Jie the first switch grid G S1 of S1 and second switch S2 grid G S2 the
One variable resistance R1 and the second adjustable resistance R2, the first variable resistance R1 and second can
Power transformation hinders R2 system and is controlled variable-resistance resistance value by resistance control signal Ctrl_R.In detail
For Xi, the first variable resistance R1 and the second adjustable resistance R2 controls letter according to resistance
Number Ctrl_R, changes into the first resistance value under the conducting state of switching device S, and
The second resistance value, wherein the first resistance is changed under the off state of switching device S
Value is higher than the second resistance value, and resistance control signal Ctrl_R correspondence switch controlling signal
Ctrl_S produces change.
In order to, under the conducting state of switching device S, make by switching switch 100
High-frequency signal is unlikely to regard by input In and control the parasitic capacitance between end as leading
Path, to this end, control resistance control signal Ctrl_R so that the first variable resistance
The R1 and the second adjustable resistance R2 the first resistance under the conducting state of switching device S
Value, at least needs the impedance more than the parasitic capacitance between input and control end.By
Control the size of the first resistance value so that high-frequency signal is at the conducting shape of switching device S
Under state, it will select more low-resistance guiding path, that is, input In and output
The parasitic capacitance produced between end Out is as guiding path, as shown in 1B figure
Parasitic capacitance Cp2 and Cp3, and make high-frequency signal be difficult to from control end flow out make
Become loss.
Additionally, in order to, under the off state of switching device S, make to be switched by switching
The high-frequency signal of 100 is unlikely to regard the parasitic electricity by between input In and outfan
Holding is guiding path, to this end, control resistance control signal Ctrl_R so that first can
Power transformation resistance R1 and the second adjustable resistance R2 under the off state of switching device S the
Two resistance values, at least need the impedance less than the parasitic capacitance between input and outfan.
The second resistance is changed into by controlling the first variable resistance R1 and the second adjustable resistance R2
Value so that high-frequency signal is under the off state of switching device S, it will select relatively low
The guiding path of resistance, that is, input In and the parasitism controlling to produce between end are electric
Hold as guiding path, parasitic capacitance Cp2 as shown in 1B figure and Cp3,
Make high-frequency signal be difficult to when switching device S turns off, outfan is produced interference.
Furthermore, in the present embodiment, switch controlling signal Ctrl_S and resistance control letter
Number Ctrl_R can couple and become control signal Ctrl, is controlling variable resistance size
Meanwhile, conducting and the shutoff of switch are also controlled.Therefore, by respectively at switching device S
Conducting and off state under control variable-resistance size, can be respectively at switching device S
Conducting and off state under reduce decay and the interference of high-frequency signal.
3A figure is the block chart that the second embodiment that the switching according to the present invention switchs illustrates.3B
Figure is the circuit framework figure that the second embodiment that the switching according to the present invention switchs illustrates.As 3A schemes
And shown in 3B figure, it is provided that the switching switch 200 of another kind of aspect, switch controlling signal
Ctrl_S and resistance control signal Ctrl_R provide to switching switch 200.With previous enforcement
Unlike example, switching switch 100 comprise switching device S, the first transistor T1 and
Transistor seconds T2.Switching device S is connected between input In and outfan Out,
Herein, the frequency of high-frequency signal, can be enough under the conducting state of switching device S,
Regard by input In and the parasitic capacitance that controls between end as guiding path person, and also
Be enough under the off state of switching device S, depending on by input In and outfan Out
Between parasitic capacitance be guiding path person, as 1B scheme, pass through parasitic capacitance
Guiding path represented by the arrow of Cp1, Cp2 and Cp3.
As seen in figure 3b, switching device S also can be by N-type gold oxygen half (NMOS) field
The transmission gate that effect transistor and p-type gold oxygen half (PMOS) field-effect transistor are constituted, herein
It is respectively designated as the first switch S1 and second switch S2.The control end of switching device S can
Comprise grid G S1 and grid G S2 of second switch S2 of the first switch S1.First
Switch S1 and second switch S2 is according to the switch controlling signal of supply to control end
Ctrl_S so that switching device S switches between conducting state and off state.Preferably
Ground, in certain embodiments of the invention, due to the first switch S1 and second switch S2
Polarity be contrary, first switch grid G S1 also need connect phase inverter INV,
For make supply to control end switch controlling signal Ctrl_S be sent to grid G S1 with
The logic level of gate pole GS2 is contrary, and can make the first switch S1 and second switch S2
Can simultaneously turn on and turn off, to control switching device S further in conducting state and pass
Switch between disconnected state.
It should be noted that as it can be seen, the first transistor T1 and transistor seconds T2
Connect grid G S1 and grid G S2 of second switch S2 of the first switch S1 respectively,
Resistance control signal Ctrl_R1 comprises the first resistance control signal Ctrl_R1 and the second electricity
Resistance control signal Ctrl_R2, the first transistor T1 system is by the first resistance control signal
Ctrl_R1 controls the mode of operation of the first transistor T1, and transistor seconds T2 system is by the
Two resistance control signals Ctrl_R2 control the mode of operation of transistor seconds T2.Wherein,
The first transistor T1 and transistor seconds T2 can be known metal-oxide half field effect transistor,
Specifically, the first resistance control signal Ctrl_R1 provides to the first transistor T1's
Grid, and by the extreme voltage of control gate, to change the leakage of the first transistor T1
Impedance between pole and source electrode, is similar in previous embodiment to reach, and first is variable
The effect of resistance R1.Second resistance control signal Ctrl_R2 provides to transistor seconds
The grid of T2, also by the voltage that control gate is extreme, to change transistor seconds T2
Drain electrode and source electrode between impedance, to reach the effect of similar the second adjustable resistance R2.
For example, the first transistor T1 and transistor seconds T2 system are respectively according to
One resistance control signal Ctrl_R1 and the second resistance control signal Ctrl_R2, at switch
The first resistance value is changed under the conducting state of device S, and in the pass of switching device S
Changing into the second resistance value under disconnected state, wherein the first resistance value is higher than the second resistance value,
And comprise the first resistance control signal Ctrl_R1 and the second resistance control signal Ctrl_R2
Resistance control signal Ctrl_R correspondence switch controlling signal Ctrl_S produce change.
In order to, under the conducting state of switching device S, make by switching switch 200
High-frequency signal is unlikely to regard by input In and control the parasitic capacitance between end as leading
Path, to this end, control resistance control signal Ctrl_R so that the first transistor T1
And transistor seconds T2 is under the conducting state of switching device S, between source electrode and drain electrode
The first resistance value, at least need more than input and control parasitic capacitance between end
Impedance.By the first resistance value controlling the first transistor T1 and transistor seconds T2
Size so that high-frequency signal is under the conducting state of switching device S, it will select
More low-resistance guiding path, that is, produce between input In and outfan Out
Parasitic capacitance as guiding path, parasitic capacitance Cp2 as shown in 1B figure
And Cp3, and high-frequency signal is difficult to from control end outflow and causes damage.
Additionally, in order to, under the off state of switching device S, make to be switched by switching
The high-frequency signal of 200 is unlikely to regard the parasitic electricity by between input In and outfan
Hold for guiding path, to this end, control to be coupled with the first resistance control signal Ctrl_R1 and
Resistance control signal Ctrl_R of the second resistance control signal Ctrl_R2 so that first is brilliant
Body pipe T1 and transistor seconds T2 under the off state of switching device S, source electrode and
The second resistance value between drain electrode, at least need less than input In and outfan Out it
Between the impedance of parasitic capacitance.By controlling the first transistor T1 and transistor seconds T2
Change into the second resistance value so that high-frequency signal under the off state of switching device S,
More low-resistance guiding path will be selected, that is, between input In and control end
The parasitic capacitance produced is as guiding path, the parasitic capacitance as shown in 1B figure
Cp1, makes high-frequency signal be difficult to when switching device S turns off, and outfan is produced interference.
4A figure is the block chart that the first embodiment of the multiplexer according to the present invention illustrates.4B
Figure is the circuit framework figure that the first embodiment of the multiplexer according to the present invention illustrates.According to the present invention
Another aspect, be to provide a kind of multiplexer 300, it is adaptable to by high-frequency signal from
One of them of first input end In1 and the second input In2 is sent to outfan Out.
Wherein, switch controlling signal Ctrl_MS and resistance control signal Ctrl_MR provide extremely
Multiplexer 300.Multiplexer 300 comprises the first switching device MSS1, second switch dress
Put MSS2, the first variable resistance MR1, the second adjustable resistance MR2, the 3rd variable
Resistor MR 3 and the 4th variable resistance MR4.Wherein, the first switching device MSS1 is even
Being connected between first input end In1 and outfan Out, second switch device MSS2 is even
It is connected between the second input In2 and outfan Out.
Herein, the frequency of high-frequency signal, can be enough at the first switching device MSS1 and
Under the conducting state of two switching device MSS2, regard respectively by first input end In1 and
Control the parasitic capacitance (the hereafter referred to as first parasitic capacitance) between end and the second input
In2 and the parasitic capacitance (hereafter referred to as trixenie electric capacity) controlled between end are guiding path
Footpath person, and also be enough at the first switching device MSS1 and second switch device MSS2
Off state under, respectively regard by between first input end In1 and outfan Out
Parasitic capacitance (the hereafter referred to as second parasitic capacitance) and by first input end In1 and output
Parasitic capacitance (the hereafter referred to as the 4th parasitic capacitance) between end Out is guiding path person,
As 1B scheme, by parasitic capacitance Cp1, Cp2 and Cp3 arrow represented by
Guiding path.
As shown in 4B schemes, the first switching device MSS1 is connected to first input end In1
And between outfan Out, and the first switching device MSS1 can be by N-type gold oxygen half
The transmission gate that field-effect transistor and p-type metal-oxide half field effect transistor are constituted, distinguishes herein
It is denoted as the first switch MS1 and second switch MS2.First switching device MSS1's
First controls grid G MS1 and the second switch MS2 that end can comprise the first switch MS1
Grid G MS2.First switch MS1 and second switch MS2 is according to the first switch control
Signal Ctrl_MS12 processed so that the first switching device MSS1 is in conducting state and shutoff
Switch between state.Preferably, in certain embodiments of the invention, due to first
The polarity of switch MS1 and second switch MS2 is contrary, the grid of the first switch
GMS1 needs to connect the first phase inverter INV1 as shown in 4B figure, is used for making supply extremely
The the first switch controlling signal Ctrl_MS12 controlling end is sent to grid G MS1 and door
The logic level of pole GMS2 is contrary, and can make the first switch MS1 and second switch
MS2 can simultaneously turn on and turn off, and exists with control the first switching device MSS1 further
Switch between conducting state and off state.In this, the first phase inverter INV1 can be
NMOS phase inverter, PMOS phase inverter, transistor-transistor logic (TTL) are anti-
Phase device, static complementary formula gold oxygen half (CMOS) phase inverter, saturated carry digital phase inverter,
Three polar body phase inverters etc..
And as described by preceding embodiment, the first variable resistance MR1 is connected to grid
Pole GMS1, and the second adjustable resistance MR2 is connected to grid G MS2, and the first electricity
Resistance control signal Ctrl_MR12 is configured to according to the first switch controlling signal
Ctrl_MS12, controls the first variable resistance MR1 and the electricity of the second adjustable resistance MR2
Resistance.Such as, under the conducting state of the first switching device MSS1, the first resistance control
Signal Ctrl_MR12 processed controls the first variable resistance MR1 and the second adjustable resistance MR2
Resistance value be the first resistance value.And at the off state of the first switching device MSS1
Under, the first resistance control signal Ctrl_MR12 controls the first variable resistance MR1 and
The resistance value of two variable resistance MR2 is the second resistance value.It is also preferred that the left the first resistance value
The second resistance value can be more than.
Furthermore, second switch device MSS2 is connected to the second input In2 and outfan
Between Out, and second switch device MSS2 can be by N-type metal-oxide half field effect transistor
And the transmission gate that p-type metal-oxide half field effect transistor is constituted, it is respectively designated as the 3rd herein
Switch MS3 and the 4th switch MS4.The second control end of second switch device MSS2
Grid G MS3 and the grid of the 4th switch MS4 of the 3rd switch MS3 can be comprised
GMS4.3rd switch MS3 and the 4th switch MS4 is according to second switch control signal
Ctrl_MS34 so that second switch device MSS2 conducting state and off state it
Between switch.Preferably, in certain embodiments of the invention, due to the 3rd switch MS3
And the 4th switch MS4 polarity be contrary, the 3rd switch grid G MS3 need
The second phase inverter INV2 is connected, for making supply to controlling the of end shown in 4B figure
Two switch controlling signal Ctrl_MS34 are sent to grid G MS3 and gate pole GMS4's
Logic level is contrary, and the 3rd switch MS3 and the 4th switch MS4 can be made to lead simultaneously
Lead to and turn off, to control second switch device MSS2 further in conducting state and shutoff
Switch between state.In this, the second phase inverter INV2 can be NMOS phase inverter,
PMOS phase inverter, transistor-transistor logic (TTL) phase inverter, static complementary
Formula gold oxygen half (CMOS) phase inverter, saturated carry digital phase inverter, three polar body phase inverters
Deng.
Being similar to, the 3rd variable resistance MR3 is connected to grid G MS3, and the 4th can
Power transformation resistance MR4 is connected to grid G MS3, and the second resistance control signal Ctrl_MR34
It is configured to, according to second switch control signal Ctrl_MS34, control the 3rd variable resistance
MR3 and the resistance value of the 4th variable resistance MR4.Such as, at second switch device
Under the conducting state of MSS2, the second resistance control signal Ctrl_MR34 controls the 3rd can
The resistance value of power transformation resistance MR3 and the 4th variable resistance MR4 is the 3rd resistance value.And
Under the off state of second switch device MSS2, the second resistance control signal
Ctrl_MR34 controls the 3rd variable resistance MR3 and the resistance of the 4th variable resistance MR4
Value is the 4th resistance value.It is also preferred that the left the 3rd resistance value can be more than the 4th resistance value.
Herein, according to the operator scheme of multiplexer 300, the first switching device MSS1
And the conducting of second switch device MSS2 and off state are mutual exclusion.That is, multiplexing
Device 300 can make the first switch dress according to supplying the switch controlling signal Ctrl_MS to it
Putting one of them conducting of MSS1 and second switch device MSS2, remaining is then closed.
Therefore, the high-frequency signal inputted from first input end In1 and the second input In2 only has
One of them can be by outfan.But, such conduction mode such as 1B schemes institute
Show, cause decay and the interference of high-frequency signal the most simultaneously, therefore need to improve further
This situation, its details will be in following description.
Please answer and scheme with reference to 4B, when multiplexer 300 is configured so that high-frequency signal is by the first switch
In the embodiment of device MSS1, the first switching device MSS1 and second switch device
MSS2 accepts the control of control signal Ctrl_MS, that is, configure the first on-off control
Signal Ctrl_MS12, makes the first switching device MSS1 become conducting state, and configuration
Second switch control signal Ctrl_MS34, makes second switch device MSS2 become shutoff
State.Due under the conducting state of the first switching device MSS1, by the first switch
The high-frequency signal of device MSS1 easily regards by first input end In1 and controls end (i.e.
Grid G MS1 and gate pole GMS2) between parasitic capacitance be guiding path, therefore,
Configure the first resistance control signal Ctrl_MR12, make the first variable resistance MR1 and
Two variable resistance MR2 become the resistance high compared with the impedance of the first parasitic capacitance, are first
Resistance value.When the first resistance value exists, by the first switching device MSS1
High-frequency signal will not easily pass through first input end In1 and control end (i.e. grid G MS1
And gate pole GMS2) between the first parasitic capacitance and cause the loss of high-frequency signal.
Continuous speech, under the off state of second switch device MSS2, defeated from second
Enter to hold the high-frequency signal of In2 easily regard by the second input In2 and outfan Out it
Between parasitic capacitance be guiding path, and indirectly cause originally predetermined from outfan Out
The high-frequency signal of output is subject to disturbing of the high-frequency signal from the second input In2, from
And cause the situation of distortion.Therefore, configure the second resistance control signal Ctrl_MR34,
And the 3rd variable resistance MR3 and the 4th variable resistance MR4 is changed into and relatively the 4th posts
Give birth to the resistance value that the impedance of electric capacity is low, be the 4th resistance value.Exist in the 4th resistance value
When, second will be not easily passed through from the high-frequency signal of the second outfan In2 input defeated
Enter to hold the 4th parasitic capacitance between In2 and outfan Out, and cause the most predetermined from
The high-frequency signal of outfan Out output is by the high-frequency signal from the second input In2
Interference.
Contrary, when multiplexer 300 is configured so that high-frequency signal is by second switch device
During MSS2, then configure the first resistance control signal Ctrl_MR12, make variable resistance
MR1 and the second adjustable resistance MR2 becomes the electricity low compared with the impedance of the second parasitic capacitance
Resistance, is the second resistance value.And configuration the second resistance control signal Ctrl_MR34, and make
Obtain the 3rd variable resistance MR3 and the 4th variable resistance MR4 and change into relatively trixenie electricity
The high resistance value of impedance held, is the 3rd resistance value.Then as aforementioned, can make from
The high-frequency signal of one outfan In1 input will not easily pass through first input end In1 and output
The second parasitic capacitance between end Out, and cause the most predetermined defeated from outfan Out
The high-frequency signal gone out is by disturbing from the high-frequency signal of first input end In1 and logical
Cross the high-frequency signal of second switch device MSS2 will not easily pass through the second input In2 and
Control the trixenie electric capacity between end (i.e. grid G MS3 and gate pole GMS4) and cause
The loss of high-frequency signal.In a particular embodiment, the first resistance value can be with the 3rd resistance
Being worth identical, the second resistance value can be identical with the 4th resistance value.
5A figure is the block chart that the second embodiment of the multiplexer according to the present invention illustrates, 5B
Figure is the circuit framework figure that the second embodiment of the multiplexer according to the present invention illustrates.According to the present invention
Another aspect, be to provide a kind of multiplexer 400, it is adaptable to by high-frequency signal from
One of them of first input end In1 and the second input In2 is sent to outfan Out.
Wherein, switch controlling signal Ctrl_MS and resistance control signal Ctrl_MR provide extremely
Multiplexer 400.Multiplexer 400 comprises the first switching device MSS1, second switch dress
Put MSS2, the first transistor T1, transistor seconds T2, third transistor T3 and
Four transistor T4.Wherein, the first switching device MSS1 is connected to first input end In1
And between outfan Out, second switch device MSS2 is connected to the second input In2
And between outfan Out, and the first switching device MSS1 and second switch device
The operator scheme of MSS2 is identical with described in previous embodiment, therefore omits it and repeat to chat
State.
It is with previous embodiment difference, the first variable resistance MR1, second can power transformation
MR2, the 3rd variable resistance MR3 and the 4th variable resistance MR4 are respectively with first in resistance
Transistor T1, transistor seconds T2, third transistor T3 and the 4th transistor T4
Replace, and the first resistance control signal Ctrl_MRS1, the second resistance control signal
Ctrl_MRS2, the 3rd resistance control signal Ctrl_MRS3 and the 4th resistance control signal
Ctrl_MRS4 provides respectively to the first transistor T1, transistor seconds T2, trimorphism
Body pipe T3 and the grid of the 4th transistor T4, with control respectively the first transistor T1,
Transistor seconds T2, third transistor T3 and the conducting of the 4th transistor T4 and leakage
Impedance between pole and source electrode, reach be similar to the first variable resistance MR1, second can
Power transformation resistance MR2, the 3rd variable resistance MR3 and the effect of the 4th variable resistance MR4.
Preferably, in this particular, the first phase inverter INV1 and second anti-phase
The setting of device INV2 is similar to previous embodiment, and difference is, the first phase inverter
INV1 system is for making to be sent to the first switch controlling signal Ctrl_MS1 of grid G MS1
And it is sent to the logic level of second switch control signal Ctrl_MS2 of grid G MS2
On the contrary, the second phase inverter INV2 is then for making the be sent to grid G MS3 the 3rd to open
Close control signal Ctrl_MS3 and be sent to the 4th switch controlling signal of grid G MS4
The logic level of Ctrl_MRS4 is contrary, and can make the first switch MS1 and second respectively
Switch MS2 can simultaneously turn on and turn off, the 3rd switch MS3 and the 4th switch MS4
Can simultaneously turn on and turn off, open with control the first switching device MSS1 and second further
Close device MSS2 to switch between conducting state and off state.In this, first is anti-phase
Device INV1 and the second phase inverter INV2 can be NMOS phase inverter, PMOS phase inverter,
Transistor-transistor logic (TTL) phase inverter, static complementary formula gold oxygen half (CMOS)
Phase inverter, saturated carry digital phase inverter, three polar body phase inverters etc..
Herein, it is similar to described in previous embodiment, the first switch dress of multiplexer 400
Put MSS1 and the conducting of second switch device MSS2 and off state is mutual exclusion.Also
That is, multiplexer 400 can be according to the first switch control of supply to the first switching device MSS1
Signal Ctrl_MRS1 processed and second switch control signal Ctrl_MRS2, and supply
The 3rd switch controlling signal Ctrl_MRS3 and the 4th to second switch device MSS2
Switch controlling signal Ctrl_MRS4, makes the first switching device MSS1 and second switch dress
Putting one of them conducting of MSS2, remaining is then closed.Therefore, from first input end
The high-frequency signal of In1 and the second input In2 input only has one of them can be by defeated
Go out end.But, under such conduction mode, it is easily subject to described in previous embodiment
The impact of first to fourth parasitic capacitance, causes decay and the interference of high-frequency signal simultaneously.
Please answer and scheme with reference to 4B, multiplexer 400 is configured so that high-frequency signal is by the first switch dress
Put in the embodiment of MSS1, the first switching device MSS1 and second switch device MSS2
Accept the control of control signal Ctrl_MS, that is, configure the first switch controlling signal
Ctrl_MS1 and second switch control signal Ctrl_MS2, make the first switching device MSS1
Become conducting state, and configuration the 3rd switch controlling signal Ctrl_MS3 and the 4th switch
Control signal Ctrl_MS4, makes second switch device MSS2 become off state.This
Place, the first switch controlling signal Ctrl_MS1 and second switch control signal Ctrl_MS2
Can be same signal source, and the 3rd switch controlling signal Ctrl_MS3 and the 4th switch control
Signal Ctrl_MS4 processed can be same signal source.Due at the first switching device MSS1
Conducting state under, by the high-frequency signal of the first switching device MSS1 easily depending on passing through
Posting between first input end In1 and control end (i.e. grid G MS1 and gate pole GMS2)
Raw electric capacity is guiding path, therefore, configures the first resistance control signal Ctrl_MRS1
And second resistance control signal Ctrl_MRS2, make the first transistor T1 and the second crystal
Impedance between drain electrode and the source electrode of pipe T2 becomes high compared with the impedance of the first parasitic capacitance
Resistance, is the first resistance value.When the first resistance value exists, by first
The high-frequency signal of switching device MSS1 will not easily pass through first input end In1 and control end
The first parasitic capacitance between (i.e. grid G MS1 and gate pole GMS2) and cause high frequency to believe
Number loss.
Due under the off state of second switch device MSS2, by the first switch dress
The high-frequency signal putting MSS2 easily regards by the second input In2 and outfan Out
Between the 4th parasitic capacitance be guiding path, therefore, configuration the 3rd resistance control letter
Number Ctrl_MRS3 and the 4th resistance control signal Ctrl_MRS4, make third transistor
It is parasitic that impedance between drain electrode and the source electrode of T3 and the 4th transistor T4 becomes the relatively the 4th
The resistance that the impedance of electric capacity is low, is the 4th resistance value.In the feelings that the 4th resistance value exists
Under shape, the second input will be not easily passed through by the high-frequency signal of second switch device MSS2
The 4th parasitic capacitance between In2 and outfan Out is held to cause the mistake of high-frequency signal
Very.In other words, due to third transistor T3 and the drain electrode of the 4th transistor T4 and source
Impedance between pole becomes the resistance low compared with the impedance of the 4th parasitic capacitance, the second input
The high-frequency signal of end In2 will select more low-impedance path, and then reduces outfan
The interference of the high-frequency signal of Out.
Contrary, when multiplexer 400 is configured so that high-frequency signal is by second switch device
During MSS2, then configuration the 3rd resistance control signal Ctrl_MRS3 and the 4th resistance control
Signal Ctrl_MRS4, make third transistor T3 and the drain electrode of the 4th transistor T4 and
Impedance between source electrode becomes the impedance high compared with the impedance of trixenie electric capacity, is the 3rd
Resistance value.And configure the first resistance control signal Ctrl_MRS1 and the second resistance simultaneously
Control signal Ctrl_MRS2, and make the first transistor T1 and transistor seconds T2
Drain electrode and source electrode between impedance change into the electricity high compared with the impedance of the second parasitic capacitance
Resistance, is the second resistance value.Then as aforementioned, can make from the first outfan In1 input
High-frequency signal will not easily pass through between first input end In1 and outfan Out second
Parasitic capacitance, and cause the most predetermined high-frequency signal from outfan Out output to be subject to
From the interference of the high-frequency signal of first input end In1, and by second switch device
The high-frequency signal of MSS2 will not easily pass through the second input In2 and control end (i.e. grid
GMS3 and gate pole GMS4) between trixenie electric capacity and cause the damage of high-frequency signal
Lose.In a particular embodiment, the first resistance value can be identical with the 3rd resistance value, and second
Resistance value can be identical with the 4th resistance value.
It is noted that in the present embodiment, the first transistor T1, the second crystal
Pipe T2, third transistor T3 and the 4th transistor T4 can be the golden oxygen of N-type or p-type
Half field effect transistor, and be mainly to be used for being similar to variable-resistance design, wherein,
Polarity and the first switching device MSS1 at the first transistor T1 and transistor seconds T2
In the first switch MS1 and second switch MS2 polarities match particular condition under,
First switch controlling signal Ctrl_MS1, second switch control signal Ctrl_MS2,
One resistance control signal Ctrl_MRS1 and the second resistance control signal Ctrl_MRS2 can
For same signal source, in the polarity and the of third transistor T3 and the 4th transistor T4
The 3rd switch MS3 in two switching device MSS2 and the polarity of the 4th switch MS4
Under the particular condition joined, the 3rd switch controlling signal Ctrl_MS3, the 4th on-off control
Signal Ctrl_MS4, the 3rd resistance control signal Ctrl_MRS3 and the 4th resistance control
Signal Ctrl_MRS4 can be same signal source, that is, can be by single signal control
The conducting of the first switching device MSS1 and shutoff, and control the first transistor T1 simultaneously
And the impedance magnitude between the drain electrode of transistor seconds T2 and source electrode, also can be by single
Signal controls the conducting of second switch device MSS2 and shutoff, and to control the trimorphism simultaneously
Impedance magnitude between body pipe T3 and drain electrode and the source electrode of the 4th transistor T4, and should
It is all contained among control signal Ctrl Deng signal, as shown in 5A schemes.
Following table one is the configuration according to splitter 400, at the first switching device MSS1
Conducting state, and under the off state of second switch device MSS2, to the first resistance
When value and the 4th resistance value are changed, between first input end In1 and outfan Out
And the high frequency signal attenuation simulation result that second between input In2 and outfan Out
(being expressed as S21 and S23).Wherein, first input end In1 and the second input
In2 is provided which the high-frequency signal of frequency 250MHz.
Table one
| First resistance value (ohm) | 10K | 5K | 1K | 10K |
| 4th resistance value (ohm) | 10K | 5K | 1K | 0.1K |
| S21(dB) | -0.47 | -0.51 | -0.67 | -0.48 |
| S23(dB) | -45.8 | -46.1 | -49.5 | -63.2 |
As shown in Table 1, the impedance that this simulation controls the first resistance value and the 4th resistance value respectively exists
Change between 0.1K Ω to 10K Ω.In the conducting state of the first switching device MSS1, and
Under the off state of second switch device MSS2, when the first resistance value and the 4th resistance value
When being the high resistance of 5k Ω, it can be seen that although first input end In1 and outfan Out
Between signal attenuation less, for-0.47dB, but, at the second input In2 and
Signal attenuation between outfan Out but only has-45.8dB, represents now the second input
The impact that outfan Out still can be interfered by the high-frequency signal of end In2.When first
When resistance value and the 4th resistance value are 5K Ω, first input end In1 and outfan Out
Between and the second input In2 and outfan Out between high frequency signal attenuation emulation knot
Fruit is respectively-0.51dB and-46.1dB, when the first resistance value is with the 4th resistance value
During 1K Ω, between first input end In1 and outfan Out and the second input In2 and
High frequency signal attenuation simulation result between outfan Out be respectively-0.67dB and
-49.5dB.The best, control when the first resistance value and the 4th resistance value respectively 1K Ω with
During 0.1K Ω, it is seen that the signal attenuation between first input end In1 and outfan Out is
Little, for-0.48dB, and the high frequency between the second input In2 and outfan Out
Signal attenuation is maximum, for-63.2dB.That is, can the reduction high-frequency signal of amplitude peak
Decay, and reduce high-frequency signal interference.
In sum, switching switch under this invention and comprise its multiplexer, be by
Variable resistance is set in switching on-off circuit, and opens by resistance control signal correspondence
Close control signal and adjust variable-resistance size so that switching device is in the on-state
The decay of high-frequency signal can be reduced, unnecessary signal can be prevented in the off case
Flowed out from outfan by the parasitic capacitance of input and outfan.Open comprising switching
In the circuit framework of the multiplexer closed, also it is provided with variable resistance, improves signal transmission
Time by transmitting switch time because the insertion loss that the parasitic circuit of switch own is caused
And cross-talk.That is, decay and the interference of high-frequency signal can be prevented simultaneously.
The foregoing is only illustrative, rather than be restrictive.Any spirit without departing from the present invention with
Category, and the equivalent modifications carrying out it or change, be intended to be limited solely by appended claims.
[symbol description]
1,300,400: multiplexer
In: input
Out: outfan
Cp1, Cp2, Cp3: parasitic capacitance
Ctrl: control signal
Ctrl_S, Ctrl_MS: switch controlling signal
Ctrl_R, Ctrl_MR: resistance control signal
Ctrl_MS12, Ctrl_MS1: the first switch controlling signal
Ctrl_MS34, Ctrl_MS2: second switch control signal
Ctrl_MS3: the three switch controlling signal
Ctrl_MS4: the four switch controlling signal
INV: phase inverter
INV1: the first phase inverter
INV2: the second phase inverter
100,200: switching switch
S: switching device
R: variable resistance
R1, MR1: the first variable resistance
R2, MR2: the second adjustable resistance
MR3: the three variable resistance
MR4: the four variable resistance
S1, MS1: the first switch
S2, MS2: second switch
MS3: the three switch
MS4: the four switch
GS1, GS2, GMS1, GMS2, GMS3, GMS4: grid
T1: the first transistor
T2: transistor seconds
T3: third transistor
T4: the four transistor
Ctrl_R1, Ctrl_MR12, Ctrl_MRS1: the first resistance control signal
Ctrl_R2, Ctrl_MR34, Ctrl_MRS2: the second resistance control signal
Ctrl_MRS3: the three resistance control signal
Ctrl_MRS4: the four resistance control signal
In1: first input end
In2: the second input
MSS1: the first switching device
MSS2: second switch device.
Claims (14)
1. a switching switch a, it is adaptable to high-frequency signal is sent to an outfan from an input,
This switching switch comprises:
One switching device, is connected between this input and this outfan, and comprises a control
End, according to a switch controlling signal of supply to this control end, at conducting state and shutoff shape
Switch between state；And
One variable resistance, is connected to this control end, and this variable resistance controls letter according to a resistance
Number under the conducting state of this switching device, change into one first resistance value, and fill at this switch
Change into one second resistance value under the off state put, wherein this first resistance value higher than this
Two resistance values, and this resistance control signal is to producing change by switch controlling signal.
Switching switch the most according to claim 1, the wherein frequency of this high-frequency signal, it is sufficient to
Under the conducting state of this switching device, depending on by the parasitism between this input and this control end
Electric capacity is guiding path person, and also be enough under this switching device to off state, depending on passing through
Parasitic capacitance between this input and this outfan is guiding path person.
Switching switch the most according to claim 2, wherein this variable resistance is at this switching device
This first resistance value under conducting state is more than this parasitism between this input and this control end
The impedance of electric capacity.
Switching switch the most according to claim 2, wherein this variable resistance is at this switching device
This second resistance value under off state is less than this parasitism between this input and this outfan
The impedance of electric capacity.
Switching switch the most according to claim 2, wherein this switching device is by a N-type gold oxygen
The transmission gate that half field effect transistor and a p-type metal-oxide half field effect transistor are constituted, and this control
End processed comprises grid and this p-type MOSFET crystal of this N-type metal-oxide half field effect transistor
The grid of pipe.
Switching switch the most according to claim 5, wherein this variable resistance comprises and connects this respectively
This grid of N-type metal-oxide half field effect transistor and these grid of this p-type metal-oxide half field effect transistor
One first variable resistance of pole and a second adjustable resistance.
Switching switch the most according to claim 6, wherein this resistance control signal is this switch control
Signal processed, and this resistance control signal comprise control respectively this first variable resistance and this second
Variable-resistance one first resistance control signal and one second resistance control signal.
8. a multiplexer, it is adaptable to by a high-frequency signal from a first input end and the second input
One of them is sent to an outfan, and this multiplexer comprises:
One first switching device, is connected between this first input end and this outfan, and bag
End is controlled containing one first, according to one first switch controlling signal of supply to this first control end,
Switch between conducting state and off state；
One second switch device, is connected between this second input and this outfan, and bag
End is controlled containing one second, according to a second switch control signal of supply to this first control end,
Switch between conducting state and off state, and this first switching device and this second switch
The conducting state of device and off state are mutually exclusive；
One first variable resistance, be connected to this first control end, this first variable resistance according to
One first resistance control signal changes into one first under the conducting state of this first switching device
Resistance value, and under the off state of this first switching device, change into one second resistance value,
Wherein this first resistance value is higher than this second resistance value, and this first resistance control signal is corresponding
This first switch controlling signal produces change；And
One the second adjustable resistance, be connected to this second control end, this second adjustable resistance according to
One second resistance control signal changes into one the 3rd under the conducting state of this second switch device
Resistance value, and under the off state of this second switch device, change into one the 4th resistance value,
Wherein the 3rd resistance value is higher than the 4th resistance value, and this second resistance control signal is corresponding
This second switch control signal produces change.
Multiplexer the most according to claim 8, the wherein frequency of this high-frequency signal, it is sufficient at this
Under the conducting state of the first switching device and this second switch device, depending on first being inputted by this
End and this first control one first parasitic capacitance between end and regard by this second input and
This second one second parasitic capacitance controlled between end is guiding path person, and also be enough at this
Under the off state of the first switching device and this second switch device, depending on first being inputted by this
A trixenie electric capacity between end and this outfan and regard by this second input and this is defeated
One the 4th parasitic capacitance gone out between end is guiding path person.
Multiplexer the most according to claim 9, wherein this first resistance value is more than this first parasitism
The impedance of electric capacity, and the 3rd resistance value is more than the impedance of this trixenie electric capacity.
11. multiplexers according to claim 9, this second resistance value is less than this second parasitic capacitance
Impedance, and this second resistance value is less than the impedance of this second parasitic capacitance.
12. multiplexers according to claim 9, wherein this first switching device is by one the oneth N
Type metal-oxide half field effect transistor and the one first of one first p-type metal-oxide half field effect transistor composition
Transmission gate, and this first controls end and comprises the grid of this first N-type metal-oxide half field effect transistor
And the grid of this first p-type metal-oxide half field effect transistor, and this second switch device is by one
Second N-type metal-oxide half field effect transistor and one second p-type metal-oxide half field effect transistor are constituted
One second transmission gate, and this second control end comprise this second N-type metal-oxide half field effect transistor
Grid and the grid of this second p-type metal-oxide half field effect transistor.
13. multiplexers according to claim 12, wherein this first variable resistance comprises and connects respectively
This grid of this first N-type metal-oxide half field effect transistor and this first p-type MOSFET are brilliant
One the 5th variable resistance of this grid of body pipe and one the 6th variable resistance, and this is second variable
Resistance comprise connect respectively this grid of this second N-type metal-oxide half field effect transistor and this second
One the 7th variable resistance of this grid of p-type metal-oxide half field effect transistor and one the 8th can power transformation
Resistance.
14. multiplexers according to claim 13, wherein this first resistance control signal be this first
Switch controlling signal, this second resistance control signal is this second switch control signal, and should
First resistance control signal comprises control the 3rd variable resistance and the 4th variable-resistance respectively
3rd resistance control signal and one the 4th resistance control signal, this second resistance control signal bag
Containing controlling the 5th variable resistance and the 6th variable-resistance one the 5th resistance control letter respectively
Number and one the 6th resistance control signal.
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| CN201510183774.7A CN106160715A (en) | 2015-04-17 | 2015-04-17 | The multiplexer that switching switchs and comprises it |
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| CN201510183774.7A CN106160715A (en) | 2015-04-17 | 2015-04-17 | The multiplexer that switching switchs and comprises it |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
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| CN1356774A (en) * | 2000-11-27 | 2002-07-03 | 松下电器产业株式会社 | High-frequency switching circuit device |
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| CN102761325A (en) * | 2011-04-27 | 2012-10-31 | 中国科学院电子学研究所 | Selector circuit with fixed output state |
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| CN104335487A (en) * | 2012-05-28 | 2015-02-04 | 索尼公司 | Single-phase differential conversion circuit, balance-unbalance, switch and communication device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1356774A (en) * | 2000-11-27 | 2002-07-03 | 松下电器产业株式会社 | High-frequency switching circuit device |
| JP2008035153A (en) * | 2006-07-28 | 2008-02-14 | Mitsubishi Electric Corp | Analog switching circuit |
| CN102761325A (en) * | 2011-04-27 | 2012-10-31 | 中国科学院电子学研究所 | Selector circuit with fixed output state |
| CN104335487A (en) * | 2012-05-28 | 2015-02-04 | 索尼公司 | Single-phase differential conversion circuit, balance-unbalance, switch and communication device |
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| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
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Application publication date: 20161123 |