CN106155564B - Buffer management method and system and its memory storage apparatus - Google Patents

Buffer management method and system and its memory storage apparatus Download PDF

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Publication number
CN106155564B
CN106155564B CN201510148618.7A CN201510148618A CN106155564B CN 106155564 B CN106155564 B CN 106155564B CN 201510148618 A CN201510148618 A CN 201510148618A CN 106155564 B CN106155564 B CN 106155564B
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instruction
host
file
data folder
data
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CN106155564A (en
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叶人凤
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Phison Electronics Corp
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Phison Electronics Corp
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Abstract

The present invention provides a kind of buffer management method and system and its memory storage apparatus.The method includes: that multiple first temporary files are established in the first data folder before receiving setting instruction from host, wherein above-mentioned first temporary file is stored to multiple successive clusters of file system and the operating system of host can not access file in the first data folder;The method further include: receive setting instruction from host, wherein this setting instruction instruction configures temporary file data folder in the second data folder and the operating system of host can access the file in the second data folder;The method further include: the cluster number for storing the successive clusters of above-mentioned first temporary file is collected under temporary file data folder in the directory area of respective file system.Buffer management method and system and its memory storage apparatus of the invention correctly can access wisdom card chip by accessing the logical address of temporary file.

Description

Buffer management method and system and its memory storage apparatus
Technical field
The invention relates to a kind of buffer management methods, and can make carbon copies in particular to one kind for being configured with The buffer management method and system of the memory storage apparatus of formula non-volatile memory module and wisdom card chip and its Memory storage apparatus.
Background technique
As user gradually receives using stored value card and prepays Stored Value, so that the use of smart card becomes increasingly popular.Intelligence Intelligent card (Smart Card) is the integrated electricity with such as component of microprocessor, card operation system, security module and memory Road chip (IC chip), to allow holder to execute predetermined operation.Smart card provides calculating, encryption, two-way communication and safe function Can, so that this card can also reach the function that the data stored to it are protected other than the function of storing data.Make Subscriber identification module (Subscriber used in cellular phone with universal mobile telecommunications system (GSM) mechanism Identification Module, referred to as: SIM) card be smart card one of exemplary applications.However, smart card is originally experienced It is limited to memory capacity, therefore starts in conjunction with the memory card of mass storage devices in recent years, is held with expanding the storage of smart card Amount.
In general, the data between host system and smart card are the temporary files that smart card is associated with by accessing It is transmitted.However, Google data acess method proposed in the version of Android 4.4.2 only allows user at present Application program data access is carried out under particular category, it is thus possible to the application journey of user can be caused because of insufficient permission Sequence can not carry out data write-in to certain temporary files.On the other hand, although dynamically establishing temporary file in host system It can avoid the above problem, but when the logical address of some dynamic temporary file (logical address, referred to as: LA) is broken When broken or discontinuous, the possibly logical address that can not completely record this dynamic temporary file of memory device, or When read-write motion crosses over multiple logical addresses, the access incorrect problem of data is caused.
Summary of the invention
The present invention provides a kind of buffer management method and system and its memory storage apparatus, can correctly pass through The logical address of temporary file is accessed to access wisdom card chip.
The present invention proposes a kind of buffer management method, for having reproducible nonvolatile memorizer module and intelligence The memory storage apparatus of intelligent card chip.Buffer management method includes before receiving setting instruction from host in the first data folder In establish multiple first temporary files, wherein above-mentioned first temporary file is stored to the file system of corresponding memory storage apparatus System multiple successive clusters, the first data folder configuration in reproducible nonvolatile memorizer module and the operating system of host without Method accesses the file in the first data folder.Buffer management method further includes that setting instruction is received from host, wherein setting refers to Instruction is enabled to configure temporary file data folder in the second data folder, the second data folder is configured in duplicative non-volatile memories In device module and the operating system of host can access the file in the second data folder.Buffer management method further includes in correspondence The cluster number for storing the successive clusters of above-mentioned first temporary file is collected under temporary file data folder in the directory area of file system.
In one example of the present invention embodiment, above-mentioned buffer management method further includes the intelligence by being installed on host Intelligent card application establishes the second temporary file in the second data folder, wherein the second temporary file is stored to file system Cluster.Above-mentioned buffer management method further includes that the write-in of write-in serial data to logical address is assigned by wisdom card application Instruction is to memory storage apparatus, and wherein serial data includes setting instruction and logical address is the second temporary file of corresponding storage Cluster.
In one example of the present invention embodiment, above-mentioned the step of receiving setting instruction from host includes: to refer to according to write-in Serial data of the logical address identification comprising setting instruction of instruction is enabled, and obtains setting instruction from serial data.
In one example of the present invention embodiment, above-mentioned buffer management method further includes by wisdom card application It scans the second data folder and judges whether there is above-mentioned first temporary file in the second data folder, wherein by being installed on host Wisdom card application establishes the second temporary file in the second data folder and assigns write-in data by wisdom card application String to the write instruction of logical address to the step of memory storage apparatus is that non-to have above-mentioned first interim in the second data folder It is performed when file.
In one example of the present invention embodiment, above-mentioned buffer management method further includes the mesh in respective file system After the cluster number for storing the successive clusters of above-mentioned first temporary file is collected under the second data folder in record area, instruction is deleted in transmission To delete the first data folder.
In one example of the present invention embodiment, above-mentioned host is deposited by transmission read/write instruction with reading or being written Reservoir storage device, and read/write instruction includes that above-mentioned setting instructs.
In one example of the present invention embodiment, if above-mentioned buffer management method further includes receiving instruction to delete When the deletion instruction of above-mentioned first temporary file, above-mentioned first temporary file is not deleted and transmits error message to respond instruction Delete the deletion instruction of above-mentioned first temporary file.
In one example of the present invention embodiment, above-mentioned buffer management method further includes the mesh in respective file system After the cluster number for storing the above-mentioned successive clusters of above-mentioned first temporary file is collected under the second data folder in record area, pass through wisdom Card application transmission deletes instruction to delete the second temporary file.
The present invention proposes that a kind of memory storage apparatus, including connecting interface unit are electrically connected to host, can answer Write formula non-volatile memory module, wisdom card chip and memorizer control circuit unit.Memorizer control circuit unit is electrical It is connected to connecting interface unit, reproducible nonvolatile memorizer module and wisdom card chip.Wherein memorizer control circuit Unit establishes multiple first temporary files before receiving setting instruction from host in the first data folder, wherein above-mentioned first is interim File is stored to multiple successive clusters of the file system of corresponding memory storage apparatus, and the first data folder is configured in duplicative In non-volatile memory module and the operating system of host can not access the file in the first data folder.Wherein setting refers to Show that configuration temporary file data folder, the second data folder are configured in type nonvolatile mould in the second data folder In block and the operating system of host can access the file in the second data folder.Wherein memorizer control circuit unit is in respective file The cluster number for storing the successive clusters of above-mentioned first temporary file is collected under temporary file data folder in the directory area of system.
In one example of the present invention embodiment, above-mentioned memory circuit administrative unit is answered from the smart card for being installed on host Write instruction is received to establish the second temporary file in the second data folder, wherein the second temporary file is stored to text with program The cluster of part system, wherein memory circuit administrative unit receives write instruction from wisdom card application serial data is written to patrolling Address is collected, wherein serial data includes setting instruction and logical address is the corresponding cluster for storing the second temporary file.
In one example of the present invention embodiment, logic of the above-mentioned memory circuit administrative unit according to write instruction instruction Address Recognition includes the serial data of setting instruction, and setting instruction is obtained from serial data.
In one example of the present invention embodiment, above-mentioned memory circuit administrative unit is swept from the reception of wisdom card application Signal is retouched to scan the second data folder and judge whether there is above-mentioned first temporary file in the second data folder, wherein when the second number When having above-mentioned first temporary file according to folder is non-, memory circuit administrative unit connects from the wisdom card application for being installed on host Write instruction is received to establish the second temporary file in the second data folder and receive write instruction from wisdom card application to write Enter serial data to logical address.
In one example of the present invention embodiment, above-mentioned memory circuit administrative unit is in the directory area of respective file system After the middle cluster number that will store the successive clusters of above-mentioned first temporary file is collected under the second data folder, deletion is received from host and is referred to It enables to delete the first data folder.
In one example of the present invention embodiment, above-mentioned host is deposited by transmission read/write instruction with reading or being written Reservoir storage device, and read/write instruction includes that above-mentioned setting instructs.
In one example of the present invention embodiment, deleted if memory circuit administrative unit receives instruction from host When stating the deletion instruction of the first temporary file, memory circuit administrative unit does not delete above-mentioned first temporary file and transmits mistake False information responds the deletion instruction that above-mentioned first temporary file is deleted in instruction to host.
In one example of the present invention embodiment, above-mentioned memory circuit administrative unit is in the directory area of respective file system After the middle cluster number that will store the successive clusters of above-mentioned first temporary file is collected under the second data folder, from wisdom card application It receives and deletes instruction to delete the second temporary file.
The present invention proposes a kind of storage device management system, including host and memory storage apparatus.Memory storage dress It sets with reproducible nonvolatile memorizer module and wisdom card chip and is separably electrically connected to host.Wherein store Device storage device is establishing multiple first temporary files before receiving setting instruction from host in the first data folder, wherein above-mentioned the One temporary file is stored to multiple successive clusters of the file system of corresponding memory storage apparatus, and the configuration of the first data folder is can In manifolding formula non-volatile memory module and the operating system of host can not access the file in the first data folder.Wherein set Instruction instruction configures temporary file data folder in the second data folder, and the second data folder is configured in that duplicative is non-volatile to be deposited In memory modules and the operating system of host can access the file in the second data folder.Wherein memory storage apparatus is in corresponding text The cluster number for storing the successive clusters of above-mentioned first temporary file is collected under temporary file data folder in the directory area of part system.
In one example of the present invention embodiment, above-mentioned memory storage apparatus is from the smart card application journey for being installed on host Sequence receives write instruction to establish the second temporary file in the second data folder, wherein the second temporary file is stored to file system The cluster of system, wherein memory storage apparatus from wisdom card application receives write instruction serial data is written to logical address, Wherein serial data includes setting instruction and logical address is the cluster of the second temporary file of corresponding storage.
In one example of the present invention embodiment, logical address of the above-mentioned memory storage apparatus according to write instruction instruction Serial data of the identification comprising setting instruction, and setting instruction is obtained from serial data.
In one example of the present invention embodiment, above-mentioned memory storage apparatus receives scanning letter from wisdom card application Number to scan the second data folder and judge whether there is above-mentioned first temporary file in the second data folder.Wherein when the second data folder Non- when having above-mentioned first temporary file, memory storage apparatus receives write-in from the wisdom card application for being installed on host and refers to It enables to establish the second temporary file in the second data folder and receive write instruction from wisdom card application serial data is written To logical address.
In one example of the present invention embodiment, above-mentioned memory storage apparatus will in the directory area of respective file system Store the successive clusters of above-mentioned first temporary file cluster number be collected under the second data folder after, from host receive delete instruction with Delete the first data folder.
In one example of the present invention embodiment, above-mentioned host is deposited by transmission read/write instruction with reading or being written Reservoir storage device, and read/write instruction includes that above-mentioned setting instructs.
In one example of the present invention embodiment, if memory storage apparatus, which receives instruction from host, deletes above-mentioned the When the deletion instruction of one temporary file, memory storage apparatus does not delete above-mentioned first temporary file and transmits error message extremely Host is to respond the deletion instruction that above-mentioned first temporary file is deleted in instruction.
In one example of the present invention embodiment, above-mentioned memory storage apparatus will in the directory area of respective file system Store the successive clusters of above-mentioned first temporary file cluster number be collected under the second data folder after, from wisdom card application receive Instruction is deleted to delete the second temporary file.
Based on above-mentioned, by the second data folder that the cluster number of the successive clusters of the first temporary file is pooled to host-accessible In, enable the first temporary file of host accessing logical address when correctly access wisdom card chip.Even if host accessing Than cluster size when also big data, since the cluster of the first temporary file is continuously, will not to generate access data not Correct problem.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to cooperate attached drawing to make Carefully it is described as follows.
Detailed description of the invention
Fig. 1 is the schematic diagram of host shown by one example of the present invention embodiment and memory storage apparatus;
Fig. 2 is computer shown by one example of the present invention embodiment, input/output device and memory storage apparatus Example schematic;
Fig. 3 is the schematic diagram of host shown by one example of the present invention embodiment and memory storage apparatus;
Fig. 4 is the schematic block diagram for showing host and memory storage apparatus shown in FIG. 1;
Fig. 5 is the schematic block diagram of memorizer control circuit unit shown by one example of the present invention embodiment;
Fig. 6 is the example schematic of management entity erased cell shown by one example of the present invention embodiment;
Fig. 7 is shown by one example of the present invention embodiment with the logical address of file system format memory module Example;
Fig. 8 is the flow chart of buffer management method shown by one example of the present invention embodiment;
Fig. 9 A is to establish first in root when wisdom card chip shown by one example of the present invention embodiment opens card to face When file example;
Fig. 9 B is that the first temporary file is established under temporary file data folder shown by one example of the present invention embodiment Example;
Figure 10 is the detail flowchart of buffer management method shown by one example of the present invention embodiment;
Figure 11 A to Figure 11 C is to establish first under temporary file data folder shown by one example of the present invention embodiment The schematic diagram of the change of directory area when temporary file.
Description of symbols:
10: memory storage apparatus;
11: host;
12: computer;
122: microprocessor;
124: random access memory (RAM);
13: input/output (I/O) device;
126: system bus;
128: data transmission interface;
21: mouse;
22: keyboard;
23: display;
24: printer;
25: Portable disk;
26: memory card;
27: solid state hard disk;
31: digital camera;
32:SD card;
33:MMC card;
34: memory stick;
35:CF card;
36: embedded storage device;
402: connecting interface unit;
404: memorizer control circuit unit;
406: reproducible nonvolatile memorizer module;
408: wisdom card chip;
410: wisdom card application;
410 (0)~410 (N), 410 (0)~410 (F), 410 (F+1)~410 (N): entity erased cell;
502: memory management circuitry;
504: host interface;
506: memory interface;
508: wisdom card interface;
510: buffer storage;
512: electric power management circuit;
514: error checking and correcting circuit;
610 (0)~610 (D): logic unit;
620: serial data;
630: setting instruction;
700: cut section;
702: main starting recording areas;
704: file configuration table area;
706: directory area;
708: file area;
700 (0)~700 (W): cluster;
S805, S810, S815: step;
900: root;
911: the first data folders;
912: the second data folders;
913: temporary file data folder;
921 (1)~the 921 (n): the first temporary file;
922: the second temporary files;
S1001, S1003, S1005, S1007, S1009, S1011, S1013, S1015, S1017, S1019, S1021: step Suddenly;
1101: the first temporary file directory areas;
1103: root directory area;
1105: the second data folder directory areas.
Specific embodiment
In general, memory storage apparatus (also referred to as, storage system) includes duplicative non-volatile memories Device module and controller (also referred to as, control circuit).Being commonly stored device storage device is used together with host, so that host can incite somebody to action Data are written to memory storage apparatus or read from memory storage apparatus data.
Fig. 1 is the schematic diagram of host shown by one example of the present invention embodiment and memory storage apparatus, and Fig. 2 It is the example schematic of computer shown by one example of the present invention embodiment, input/output device and memory storage apparatus.
Fig. 1 is please referred to, host 11 generally comprises computer 12 and input/output (input/output, referred to as: I/O) device 13.Computer 12 includes microprocessor 122, random access memory (random access memory, referred to as: RAM) 124, is Bus 126 of uniting and data transmission interface 128.Input/output device 13 include as Fig. 2 mouse 21, keyboard 22, display 23 with Printer 24.It will be appreciated that the unrestricted input/output device 13 of device shown in Fig. 2, input/output device 13 can be also Including other devices.
In the present embodiment, memory storage apparatus 10 is the other elements by data transmission interface 128 and host 11 It is electrically connected.It can be write data by microprocessor 122, random access memory 124 and the running of input/output device 13 Data are read to memory storage apparatus 10 or from memory storage apparatus 10.For example, memory storage apparatus 10 can be Portable disk 25, memory card 26 or solid state hard disks (Solid State Drive, referred to as: SSD) 27 as shown in Figure 2 etc. are answered Write formula non-volatile memory storage device.
Fig. 3 is the schematic diagram of host shown by one example of the present invention embodiment and memory storage apparatus.
In general, host 11 is substantially to cooperate with memory storage apparatus 10 with the arbitrary system of storing data. Although host 11 is explained with computer system, however, the host 11 in another exemplary embodiment in this exemplary embodiment It can be the systems such as digital camera, video camera, communication device, audio player or video player.For example, being Fig. 3 in host In digital camera (video camera) 31 when, type nonvolatile storage device be then its used SD card 32, Mmc card 33, memory stick (memory stick) 34, CF card 35 or embedded storage device 36 (as shown in Figure 3).Embedded storage Device 36 includes embedded multi-media card (Embedded MMC, referred to as: eMMC).It is noted that embedded multi-media card It is directly to be electrically connected on the substrate of host.
Fig. 4 is the schematic block diagram for showing host and memory storage apparatus shown in FIG. 1.
Referring to figure 4., memory storage apparatus 10 include connecting interface unit 402, memorizer control circuit unit 404, Reproducible nonvolatile memorizer module 406 and wisdom card chip 408.
In this exemplary embodiment, memorizer control circuit unit 404 is to control the whole of memory storage apparatus 10 Body running, to complete buffer management method according to an embodiment of the present invention.Further, it is necessary to be appreciated that host 11 also includes Host 11 is intended to the general utility functions having needed for connecting with memory storage apparatus 10.
Connecting interface unit 402 is compatible with Serial Advanced Technology Attachment (Serial Advanced Technology Attachment, referred to as: SATA) standard.However, it is necessary to be appreciated that, the invention is not limited thereto, connecting interface unit 402 It can be and meet parallel advanced technology annex (Parallel Advanced Technology Attachment, referred to as: PATA) Standard, Institute of Electrical and Electric Engineers (Institute of Electrical and Electronic Engineers, letter Claim: IEEE) 1394 standards, high-speed peripheral component interconnecting interface (Peripheral Component Interconnect Express, referred to as: PCI Express) standard, universal serial bus (Universal Serial Bus, referred to as: USB) mark A quasi-, ultrahigh speed generation (Ultra High Speed-I, referred to as: UHS-I) interface standard, ultrahigh speed two generations (Ultra High Speed-II, referred to as: UHS-II) interface standard, secure digital (Secure Digital, referred to as: SD) interface standard, memory stick (Memory Stick, referred to as: MS) interface standard, multimedia storage card (Multi Media Card, referred to as: MMC) interface mark Quasi-, compact flash (Compact Flash, referred to as: CF) interface standard, integrated driving electrical interface (Integrated Device Electronics, referred to as: IDE) standard or other suitable standards.In this exemplary embodiment, connecting interface unit 402 can It is encapsulated in a chip with memorizer control circuit unit 404, or being laid in one includes memorizer control circuit unit 404 Outside chip.
Memorizer control circuit unit 404 is to execute in the form of hardware or the multiple logic gates or control of form of firmware implementation System instruction, and according to the instruction of host 11 in reproducible nonvolatile memorizer module 406 and wisdom card chip 408 into The write-in of row data such as reads, erases and merges at the running.
Reproducible nonvolatile memorizer module 406 is electrically connected to memorizer control circuit unit 404 and uses To store the data that host 11 is written.Reproducible nonvolatile memorizer module 406 can be single-order storage unit (Single Level Cell, referred to as: SLC) NAND type flash memory module is (that is, can store 1 ratio in a storage unit The flash memory module of special data), multi-level cell memory (Multi Level Cell, referred to as: MLC) NAND type flash Device module (that is, flash memory module that 2 bit datas can be stored in a storage unit), Complex Order storage unit (Triple Level Cell, referred to as: TLC) NAND type flash memory module is (that is, can store 3 ratios in a storage unit The flash memory module of special data), other flash memory modules or other memory modules with the same characteristics.
Wisdom card chip 408 is electrically connected to memorizer control circuit unit 404 and to execute calculating, encryption, double To the functions such as communication and safety certification.In an exemplary embodiment, wisdom card chip 408 is to be compatible with connecing for 7816 standard of ISO Touch smart card.However, it is necessary to be appreciated that, the invention is not limited thereto.For example, wisdom card chip 408 can also be and be compatible with ISO 14443, the contact of ISO 15408 or other safe smart card standards or Contactless Smart Card.In another example wisdom card chip 408 can be radio frequency identification (Radio Frequency Identification, referred to as: RFID) chip, wirelessly transferred chip (such as: Bluetooth chip) or multimedia control chip (such as: digital recording chip).In addition, it is worth noting that, memory control Circuit unit 404 and wisdom card chip 408 can respectively be an individual chips, also combinable to be encapsulated as an one chip.In this example In embodiment, wisdom card chip 408 is related with safety verification quick to store enciphering/deciphering golden key, account number and/or password etc. Feel data.However, wisdom card chip 408 can also be to store general data in another exemplary embodiment.
Fig. 5 is the schematic block diagram of memorizer control circuit unit shown by one example of the present invention embodiment.
Referring to figure 5., memorizer control circuit unit 404 includes memory management circuitry 502, host interface 504, storage Device interface 506 and wisdom card interface 508.
Overall operation of the memory management circuitry 502 to control memorizer control circuit unit 404.Specifically, it deposits Reservoir, which manages circuit 502, has multiple control instructions, and when memory storage apparatus 10 operates, these control instructions can quilt It executes the running such as to carry out the write-in of data, read and erase.It is equivalent when illustrating the operation of memory management circuitry 502 below In the operation for illustrating memorizer control circuit unit 404.
In this exemplary embodiment, the control instruction of memory management circuitry 502 is to carry out implementation with form of firmware.For example, Memory management circuitry 502 has microprocessor unit (not shown) and read-only memory (not shown), and these controls refer to Order is programmed in so far read-only memory.When memory storage apparatus 10 operates, these control instructions can be by microprocessor Unit is executed to carry out the write-in of data to reproducible nonvolatile memorizer module 406, the running such as read and erase.? In another exemplary embodiment, it is non-that the control instruction of memory management circuitry 502 can also be stored in duplicative in the form of procedure code In the specific region (for example, the system area for being exclusively used in storage system data in memory module) of volatile 406. In addition, there is memory management circuitry 502 microprocessor unit (not shown), read-only memory (not shown) and arbitrary access to deposit Reservoir (not shown).In particular, this read-only memory has driving code, and when memorizer control circuit unit 404 is enabled When, microprocessor unit can first carry out this driving code section and will be stored in reproducible nonvolatile memorizer module 406 Control instruction is loaded into the random access memory of memory management circuitry 502.Later, microprocessor unit can operate these Control instruction is the running such as to carry out the write-in of data, read and erase.
Host interface 504 is electrically connected to memory management circuitry 502 and is electrically connected to connecting interface list Member 402, to receive and identify instruction and data that host 11 is transmitted.That is, instruction and data that host 11 is transmitted Memory management circuitry 502 can be sent to by host interface 504.In this exemplary embodiment, host interface 504 is compatible In SATA standard.However, it is necessary to be appreciated that the invention is not limited thereto, host interface 504 be also possible to be compatible with PATA standard, 1394 standard of IEEE, PCI Express standard, USB standard, UHS-I interface standard, UHS-II interface standard, SD standard, MS Standard, MMC standard, CF standard, IDE standard or other suitable data transmission standards.
Memory interface 506 is electrically connected to memory management circuitry 502 and non-volatile to access duplicative Property memory module 406.It can be by depositing to the data of reproducible nonvolatile memorizer module 406 that is, being intended to be written Memory interface 506 is converted to the 406 receptible format of institute of reproducible nonvolatile memorizer module.For example, if memory pipe Reason circuit 502 will access reproducible nonvolatile memorizer module 406, and memory interface 506 can transmit corresponding sequence of instructions Column.These instruction sequences may include one or more signals, or the data in bus.For example, in reading instruction sequence, meeting The information such as identification code, storage address including reading.
Wisdom card interface 508 is electrically connected to memory management circuitry 502 and is electrically connected to wisdom card chip 408. Specifically, memory management circuitry 502 can be by 508 send instructions of wisdom card interface to wisdom card chip 408 or from wisdom It is received back and answers in card chip 408.For example, the director data unit for sending wisdom card chip 408 to claims in this exemplary embodiment For instruction-application program Protocol Data Unit (Command-Application Protocol Data Unit, abbreviation: C- APDU) and from the response data unit of wisdom card chip 408 it is known as response-application program Protocol Data Unit (Response-Application Protocol Data Unit, referred to as: R-APDU).
In an exemplary embodiment, memorizer control circuit unit 404 further includes buffer storage 510, power management electricity Road 512 and error checking and correcting circuit 514.
Buffer storage 510 is electrically connected to memory management circuitry 502 and is configured to temporarily store from host 11 Data are with instruction or from reproducible nonvolatile memorizer module 406 or the data of wisdom card chip 408.
Electric power management circuit 512 is electrically connected to memory management circuitry 502 and to control memory storage dress Set 10 power supply.
Error checking and correcting circuit 514 are electrically connected to memory management circuitry 502 and to execute wrong inspection It looks into and correction program is to ensure the correctness of data.Specifically, it is write when memory management circuitry 502 is received from host 11 When entering to instruct, error checking can generate corresponding error checking and school with correcting circuit 514 for the data of this corresponding write instruction Code (Error Checking and Correcting Code, referred to as: ECC Code) and/or error checking code (error Detecting code, referred to as: EDC), and memory management circuitry 502 can by the data of this corresponding write instruction with it is corresponding Error checking and correcting code and/or error checking code be written into reproducible nonvolatile memorizer module 406.Later, This number can be read simultaneously when memory management circuitry 502 reads data from reproducible nonvolatile memorizer module 406 According to corresponding error checking and correcting code and/or error checking code, and error checking and correcting circuit 514 can be according to this mistakes It checks and error checking and correction program is executed to read data with correcting code and/or error checking code.
Fig. 6 is the example schematic of management entity erased cell shown by one example of the present invention embodiment.
It will be appreciated that with " selection ", " grouping ", " division ", " being closed when being described herein the running of entity erased cell It is concept in logic that the words such as connection ", which carry out application entity erased cell,.That is, entity erased cell is in wisdom card chip 408 It does not change with the physical location in reproducible nonvolatile memorizer module 406, but erases in logic to these entities Unit is operated.
Fig. 6 is please referred to, reproducible nonvolatile memorizer module 406 has entity erased cell 410 (1)~410 (F) And wisdom card chip 408 has entity erased cell 410 (F+1)~410 (N).(F) can for entity erased cell 410 (0)~410 Belong to the same memory crystal grain (die) or belongs to different memory crystal grains.Entity erased cell 410 (F+1)~410 (N) it may belong to the same memory crystal grain or belong to different memory crystal grains.Each entity erased cell is respectively provided with A plurality of entity program units, wherein belonging to the entity program unit of the same entity erased cell can be written independently And it is simultaneously erased.
In this exemplary embodiment, entity program unit is the minimum unit of sequencing.That is, entity program unit is The minimum unit of data is written.For example, entity program unit is physical page or entity fan (sector).If entity program Change unit is physical page, then each entity program unit generally includes data bit area and redundancy ratio special zone.Data ratio Special zone includes multiple entities fan, to store the data of user, and redundancy ratio special zone to storage system data (for example, Error correcting code).In this exemplary embodiment, a data bit area includes 32 entities fans, and the size of entity fan For 512 bytes (byte, referred to as: B).However, in other exemplary embodiments, also may include in data bit area 8,16 or The more or fewer entity fans of number.On the other hand, entity erased cell is the minimum unit erased.That is, each entity is smeared Except unit contains the storage unit of minimal amount being erased together.For example, entity erased cell is physical blocks.In addition, In another exemplary embodiment, wisdom card chip 408 is also possible to be not limited to comprising other kinds of storage media using entity Erased cell carrys out storing data.
The meeting of memory management circuitry 502 configuration logic unit 610 (0)~610 (D) is to map to entity erased cell 410 (0)~410 at least some of (N).For example, host 11 is to pass through logical block addresses in this exemplary embodiment (logical block address, referred to as: LBA) accesses the number being stored in entity erased cell 410 (0)~410 (N) According to therefore, each logic unit 610 (0)~610 (D) refers to a logical block addresses.In another exemplary embodiment In, the size of a logic unit is equal to the size of logic fan.For example, the size of logic fan is 512 kilobytes.So And in another exemplary embodiment, the size of a logic unit is also possible to greater or lesser, and each logic unit 610 (0)~610 (D) may also mean that a logical program unit, a logic erased cell or continuously be patrolled by multiple Collect block address composition.Each logic unit 610 (0)~610 (D) is to map to one or more solid elements.In this example In embodiment, a solid element refers to an entity fan.However, a solid element can also in another exemplary embodiment Be a physical address, an entity program unit, entity erased cell either by it is multiple it is continuous physically Location composition, the present invention are without restriction.Memory management circuitry 502 can be by the mapping relations between logic unit and solid element It is recorded in one or more logic-entity mappings.When host 11 is intended to read data or write-in data from memory storage apparatus 10 When to memory storage apparatus 10, memory management circuitry 502 can execute pair according to this one or more logic-entity mapping In the data access of memory storage apparatus 10.
In this exemplary embodiment, the operation of host 11 has one or more wisdom card applications 410.Host 11 (or wisdom Card application 410) wisdom card chip 408 can be accessed to obtain the required data of operation.For example, wisdom card application 410 It can be the various types such as instant messaging application program, short message application program, talk application program or safety verification application program Application program, and the type of wisdom card application 410 be not limited to it is above-mentioned.For example, host 11 also runs an operating system (operating system, referred to as: OS) and wisdom card application 410 is run based on this operating system.This operation system System e.g. Android (android) 4.4.2 or other types/version operating system.
In this exemplary embodiment, host 11 (or wisdom card application 410) can be interim to one or more by assigning The access instruction of file is communicated with wisdom card chip 408.For example, host 11 (or wisdom card application 410) can be in intelligence One or more temporary files are established in intelligent card chip 408, and will be about the occupied logical block addresses of these temporary files Information pass to memorizer control circuit unit 404 (or memory management circuitry 502).Later, when host 11 transmits data When string to memory storage apparatus 10, memorizer control circuit unit 404 (or memory management circuitry 502) is judged from host Whether 11 serial datas transmitted are to be written to the occupied logical block addresses of these temporary files.If serial data is write-in When logical block addresses occupied to these temporary files, then (or the memory management circuitry of memorizer control circuit unit 404 502) serial data can be identified as the unit of communication data to wisdom card chip 408 and be transferred to wisdom card chip 408.
Fig. 7 is shown by one example of the present invention embodiment with the logical address of file system format memory module Example.
Fig. 7 is please referred to, file system patrolling logic unit 610 (0)~610 (D) can be used in the operating system of host 11 It collects address format and is melted into a cut section (partition) 700.Cut section 700 includes that main starting records (Master Boot Record, MBR) area 702, file configuration table area 704, directory area 706 and file area 708.
The logical address for belonging to main starting recording areas 702 is to store storing for portable memory storage device 10 The system information in space.The logical address for belonging to file configuration table area 704 is to storage file allocation list.File configuration table is The login value of logical address to record storage file.For example, two file configuration tables can be stored in file configuration table area, In a file configuration table used by normal access, and another file configuration table is backup file configuration table.Belong to catalogue The logical address in area 706 be to storage file description block (File Description Block, referred to as: FDB), to Record the attribute information of the file and catalogue that are currently stored in portable memory storage device 10.In particular, file describes Block will record the initial logical address (that is, starting cluster) to store these files.The logical address for belonging to file area 708 is Content to practically storage file.In this exemplary embodiment, cut section 700 can be the segmentation for meeting FAT32 specification Area.Therefore, the sector for belonging to directory area 706 and file area 708 can be grouped into cluster (cluster) 700 (0)~700 (W).? In this exemplary embodiment, the size of each cluster 700 (0)~700 (W) can be 16 kilobytes, but the present invention is not limited thereto. In other exemplary embodiments, the size of each cluster 700 (0)~700 (W) be also possible to 8 kilobytes, 32 kilobytes or other Size.
Fig. 8 is the flow chart of buffer management method shown by one example of the present invention embodiment, and Fig. 9 A is this hair The example of the first temporary file is established in root when wisdom card chip shown by a bright exemplary embodiment opens card, and is schemed 9B is the example for establishing the first temporary file shown by one example of the present invention embodiment under temporary file data folder.
Fig. 8 is please referred to, in step S805, memorizer control circuit unit 404 (or memory management circuitry 502) meeting exists Memory storage apparatus 10 executes initially when melting card program, and first data folder 911 is established under root 900, and Multiple temporary files (also referred to as the first temporary file) 921 (1)~921 (n) are established in the first data folder 911, at this point, storage Device storage device 10 did not also receive any setting instruction from host 11.
Specifically, the first data folder 911 is configured in reproducible nonvolatile memorizer module 406, and One temporary file 921 (1)~921 (n) be stored in the continuous cluster 700 (W-3) of file system, 700 (W-2), 700 (W-1) and In 700 (W) and it can not be deleted or modify.When memory storage apparatus 10 is initially melted card program, memory control Circuit unit 404 (or memory management circuitry 502) processed can by the first temporary file 921 (1)~921 (n) cluster number (for example, Starting cluster number) it is pooled to the first data folder 911 under root 900.In this way, the first temporary file 921 (1)~921 (n) It can build in the first data folder 910.Here, the first temporary file 921 (1)~921 (n) can also correspond to logic unit 610 (D-127)~610 (D).
Significantly, since can only be accessed in the later version limitation user of Android (android) 4.4.2 specific Data folder, application program only has access right under the data folder that oneself is established in other words, therefore after Android 4.4.2 Version in the application program of host 11 can not access the first interim text in the first data folder 911 under root 900 Part 921 (1)~921 (n), also just can not be by accessing 610 (D- of the first temporary file 921 (1)~921 (n) logic unit 127)~610 (D) transmits exit passageway order to execute the accessing operation to wisdom card chip 408.
In step S810, memorizer control circuit unit 404 (or memory management circuitry 502) can be received from host 11 Setting instruction 630 in the second data folder 912 to configure temporary file data folder 913.
Specifically, in the case where the version after the operating system of host 11 is Android 4.4.2, host 11 can not be deposited First temporary file 921 (1)~921 (n) of the fetch bit in the first data folder 911 under root 900.In this example, intelligence Intelligent card application 410 can first scan in second data folder 912 with access right whether have the first temporary file 921 (1)~921 (n).If the first temporary file 921 (1)~921 (n) is not present in the second data folder 912, smart card application journey Sequence 410 can first establish a dynamic temporary file (also referred to as the second temporary file 922) in the second data folder 912.For example, second Temporary file 922 can be stored in the cluster 700 (W-50) of counterlogic unit 610 (100).Then wisdom card application 410 can transmit instruction write-in serial data 620 to logic unit 610 (100) and containing instruction the first temporary file 921 (1) of configuration The write instruction of~921 (n) header is to memory storage apparatus 10, and (or the memory of memorizer control circuit unit 404 Management circuit 502) it can be known according to logical address indicated by write instruction (that is, logic unit 610 (100)) and its header This write instruction of other corresponding data string 620 is special instruction, and obtains instruction in the second data folder 912 from serial data 620 The setting instruction 630 of middle configuration temporary file data folder 913.That is, memorizer control circuit unit 404 (or memory Manage circuit 502) it can be according to including to sentence in write instruction about the information of logic unit 610 (100) and its header Disconnected is to carry out configuring temporary file data folder 913 in the second data folder 912.
Although illustrating to set by the logical address for accessing the second temporary file 922 to assign in above-mentioned exemplary embodiment Surely 630 are instructed, but the present invention is not limited thereto.When host 11 assigns general read/write to memory storage apparatus 10 When instruction is to access reproducible nonvolatile memorizer module 406, the instruction of this read/write may also comprise setting instruction 630. That is, host 10 can be in access manifolding formula non-volatile memory module 406 (rather than wisdom card chip 408) Shi Jinhang Temporary file data folder 913 and its subsequent operation are configured in the second data folder 912.
In step S815, memorizer control circuit unit 404 (or memory management circuitry 502) can be instructed according to setting 630 are connected to storage the first temporary file 921 (1)~921 (n) starting cluster number under temporary file data folder 913.It is specific next It says, memorizer control circuit unit 404 (or memory management circuitry 502) can be according to setting instruction 630, in the mesh of file system Record the starting cluster number that the first temporary file 921 (1)~921 (n) successive clusters 700 (W-3)~700 (W) will be stored in area 706 700 (W-3) are pooled under temporary file data folder 913, in this way, which it is interim just to have first under temporary file data folder 913 File 921 (1)~921 (n).Since temporary file data folder 913 is the second data established positioned at wisdom card application 410 Under folder 912, therefore wisdom card application 410 has the access right of temporary file data folder 913, and can be corresponded to by access The first temporary file 921 (1)~921 (n) logic unit 610 (D-127)~610 (D) under temporary file data folder 913 with Execute the accessing operation to wisdom card chip 408.
It is worth noting that, being pooled to temporarily in the first temporary file 921 (1)~921 (n) starting cluster number 700 (W-3) After file data folder 913 is lower (that is, temporary file data folder 913 have the first temporary file 921 (1)~921 (n) after), Wisdom card application 410 can also transmit a deletion instruction to memory storage apparatus 10, to indicate to delete the second data The second temporary file 922 under folder 912.In addition, facing in step S810 if can scan under the second data folder 912 to first When file 921 (1)~921 (n), represent above-mentioned steps S815 and be executed, therefore wisdom card application 410 is just not required to The second temporary file 922 is established in the second data folder 912, and can be directly by accessing corresponding temporary file data folder The first temporary file 921 (1)~921 (n) logic unit 610 (D-127)~610 (D) in 913, to execute to smart card The accessing operation of chip 408.
Figure 10 is the detail flowchart of buffer management method shown by one example of the present invention embodiment.
Figure 10 is please referred to, when wisdom card application 410 is performed with send instructions to wisdom card chip 408, in step In rapid S1001, wisdom card application 410 judges whether the second data folder 912 has the first temporary file 921 (1)~921 (n)。
If the second data folder 912 has the first temporary file 921 (1)~921 (n), in the step s 1003, smart card The serial data of instruction containing wisdom card chip 408 to be sent to can be write data to first with instruction and faced by application program 410 When file 921 (1)~921 (n) belonging to logical address (that is, storage the first temporary file 921 (1)~921 (n) cluster) write Enter instruction and is sent to memory storage apparatus 10.
In step S1005, memorizer control circuit unit 404 (or memory management circuitry 502) can be from host 11 The serial data of wisdom card application 410 reception this write instruction and this corresponding write instruction.
In step S1007, memorizer control circuit unit 404 (or memory management circuitry 502) judges this write-in Whether the logical address of instruction belongs to the corresponding logic unit 610 (D-127)~610 of the first temporary file 921 (1)~921 (n) (D)。
If the logical address of this write instruction belongs to the corresponding logic unit 610 of the first temporary file 921 (1)~921 (n) (D-127)~610 when (D), memorizer control circuit unit 404 (or memory management circuitry 502) can be incited somebody to action in step S1009 Instruction in the serial data of this corresponding write instruction sends wisdom card chip 408 to.
If the logical address of this write instruction is not belonging to the first temporary file 921 (1)~corresponding logic unit of 921 (n) When 610 (D-127)~610 (D), memorizer control circuit unit 404 (or memory management circuitry 502) in step S1011 The serial data of this write instruction can be written to duplicative volatile according to the logical address of this write instruction In 406.
If judge that the second data folder 912 does not have the first temporary file 921 (1)~921 (n) in step S1001, In step S1013, wisdom card application 410 can establish the second temporary file 922 in the second data folder 912 and will be about Store the logical address (that is, cluster) of the second temporary file 922 information send to memorizer control circuit unit 404 (or storage Device manages circuit 502).
Later, in step S1015, wisdom card application 410 can be established using according to the second temporary file 922 Memory control is given in the setting instruction 630 that temporary file data folder 913 is established in exit passageway transmission instruction in the second data folder 912 Circuit unit 404 (or memory management circuitry 502) processed.
Then in step S1017, memorizer control circuit unit 404 (or memory management circuitry 502) meeting basis is set Surely instruction 630 establishes temporary file data folder 913 under the second data folder 912.
In step S1019, memorizer control circuit unit 404 (or memory management circuitry 502) can refer to according to setting The first temporary file 921 (1)~921 (n) successive clusters 700 will be stored in the directory area of respective file system 706 by enabling 630 (W-3)~700 the starting cluster number 700 (W-3) of (W) is collected to the second data folder 912 (as shown in Figure 9 B).
Later, in step S1021, wisdom card application 410 can transmit a deletion instruction to delete the first data Folder 911.And later, step S1003 can be performed.
Although it is worth noting that, wisdom card application 410 in the second data folder 912 have access right, Since the first temporary file 921 (1)~921 (n) stored in the second data folder 912 are located at the cluster 700 (W-3) of file system ~700 (W), and the entity erased cell for the type nonvolatile 406 that these clusters either these clusters correspond to The state that can not be deleted can be set to when memory storage apparatus 10 holds card.If therefore memorizer control circuit unit The second data folder 912 is deleted in the instruction of wisdom card application 410 that 404 (or memory management circuitries 502) receive host 11 In the first temporary file 921 (1)~921 (n) deletion instruction when, memorizer control circuit unit 404 (or memory management electricity Road 502) it not will be deleted the first temporary file 921 (1)~921 (n), and error message is transmitted to host 11.
Figure 11 A to Figure 11 C is to establish first under temporary file data folder shown by one example of the present invention embodiment The schematic diagram of the change of directory area when temporary file.
Figure 11 A is please referred to, when the memory storage apparatus 10 is initialised out card, in the first temporary file directory area The first temporary file 921 (1)~921 (n) the starting cluster number (that is, 0x00036F01) recorded in 1101 can be pooled to root Under area 1103, the first temporary file 921 (1)~921 (n) can be stored in the first data folder 911 under root 900 at this time, Wherein the cluster number of the first data folder 911 is 0x00000000.
In Figure 11 B, when memorizer control circuit unit 404 (or memory management circuitry 502) is set from the reception of host 11 Surely after instructing 630 and configuring temporary file data folder 913 in the second data folder 912, the first temporary file 921 (1)~921 (n) starting cluster number (that is, 0x00036F01) can be pooled under the second data folder directory area 1105, at this time the first temporary file 921 (1)~921 (n) can be stored in the temporary file data folder 913 under the second data folder 912, wherein temporary file data folder 913 cluster number is 0x00000006.Meanwhile corresponding first temporary file 921 (1) in original root directory area 1103~921 (n) starting The data of cluster number can be changed, and its first character festival-gathering is set to E5, at this time the first data folder under root 900 911 is deleted.
In Figure 11 C, the first temporary file 921 (1) of storage~921 (n) starting cluster number is successfully pooled to interim text Under part data folder 913, therefore the wisdom card application 410 of host 11 can be by accessing the first temporary file 921 (1)~921 (n) logical address accesses wisdom card chip 408.
In conclusion the present invention is by being pooled to the second of host-accessible for the cluster number of the successive clusters of the first temporary file In data folder, enable the first temporary file of host accessing logical address when correctly access wisdom card chip.Even if main When machine accesses the data also bigger than cluster size, since the cluster of the first temporary file is continuously, will not to generate access The incorrect problem of data.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations;To the greatest extent Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into Row equivalent replacement;And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution The range of scheme.

Claims (24)

1. a kind of buffer management method, for depositing with reproducible nonvolatile memorizer module and wisdom card chip Reservoir storage device, which is characterized in that the buffer management method includes:
Before setting instruction is received from host, multiple first temporary files are established in the first data folder, wherein those are first interim File is stored to multiple successive clusters of the file system of the corresponding memory storage apparatus, and the first data folder configuration exists In the reproducible nonvolatile memorizer module and the operating system of the host can not access in first data folder File;
The setting instruction is received from the host, wherein setting instruction instruction configures temporary file in the second data folder Data folder, second data folder be configured in the reproducible nonvolatile memorizer module and the host it is described Operating system can access the file in second data folder;And
Those that can not access the operating system for storing the host in the directory area of the correspondence file system first face When file the cluster numbers of those successive clusters be collected to the accessible temporary file data of the operating system of the host Under folder.
2. buffer management method according to claim 1, which is characterized in that further include:
Wisdom card application by being installed on the host establishes the second temporary file in second data folder, wherein Second temporary file is stored to the cluster of the file system;And
Write-in serial data to the write instruction of logical address to the memory is assigned by the wisdom card application to store Device, wherein the serial data includes setting instruction and the logical address is corresponding storage second temporary file The cluster.
3. buffer management method according to claim 2, which is characterized in that receive the setting from the host and refer to The step of enabling include:
Logical address identification according to said write instruction instruction includes the serial data of the setting instruction, and from The setting instruction is obtained in the serial data.
4. buffer management method according to claim 2, which is characterized in that further include:
Pass through the second data folder described in the smart card application scan and judges whether have this in second data folder A little first temporary files,
Wherein described second is established in second data folder by being installed on the wisdom card application of the host The said write that serial data to the logical address is written in temporary file and being assigned by the wisdom card application refers to Enable to the step of memory storage apparatus be second data folder is non-have those first temporary files when be performed.
5. buffer management method according to claim 1, which is characterized in that further include:
It will be stored described in those successive clusters of those the first temporary files in the directory area of the correspondence file system After cluster number is collected under second data folder, transmission deletes instruction to delete first data folder.
6. buffer management method according to claim 1, which is characterized in that the host is read/write by transmission Enter instruction to read or be written the memory storage apparatus, and read/write instruction includes that the setting instructs.
7. buffer management method according to claim 1, which is characterized in that further include:
If receive instruction delete those the first temporary files deletion instruction, do not delete those first temporary files and Transmission error message is to respond the deletion instruction that those the first temporary files are deleted in instruction.
8. buffer management method according to claim 2, which is characterized in that further include:
It will be stored described in those successive clusters of those the first temporary files in the directory area of the correspondence file system After cluster number is collected under second data folder, is transmitted by the wisdom card application and delete instruction to delete described the Two temporary files.
9. a kind of memory storage apparatus characterized by comprising
Connecting interface unit, is electrically connected to host;
Reproducible nonvolatile memorizer module;
Wisdom card chip;And
Memorizer control circuit unit is electrically connected to the connecting interface unit, reproducible nonvolatile memorizer module And the wisdom card chip,
Wherein the memorizer control circuit unit is established in the first data folder more before receiving setting instruction from the host A first temporary file, wherein those first temporary files are stored to the file system of the corresponding memory storage apparatus Multiple successive clusters, first data folder configures in the reproducible nonvolatile memorizer module and the behaviour of the host File in first data folder can not be accessed by making system;
Wherein the setting instruction instruction configures temporary file data folder in the second data folder, and second data folder is configured In the reproducible nonvolatile memorizer module and the operating system of the host can access second data File in folder;And
Wherein the memorizer control circuit unit will store the behaviour of the host in the directory area of the correspondence file system The cluster number for making those successive clusters of those the first temporary files that system can not access is collected to the operation system of the host It unites under the accessible temporary file data folder.
10. memory storage apparatus according to claim 9, which is characterized in that the memory circuit administrative unit from The wisdom card application for being installed on the host receives write instruction to establish the second interim text in second data folder Part, wherein second temporary file is stored to the cluster of the file system,
Wherein the memory circuit administrative unit receives said write instruction from the wisdom card application data are written String is to logical address, wherein the serial data includes setting instruction and the logical address is that corresponding storage described second is faced When file the cluster.
11. memory storage apparatus according to claim 10, which is characterized in that the memory circuit administrative unit according to Include the serial data of the setting instruction according to the logical address identification of said write instruction instruction, and from the number It is instructed according to the setting is obtained in string.
12. memory storage apparatus according to claim 10, which is characterized in that the memory circuit administrative unit from The wisdom card application receive scanning signal with scan second data folder and judge in second data folder whether There are those the first temporary files,
Wherein when second data folder is non-has those first temporary files, the memory circuit administrative unit is from installation Said write instruction is received in the wisdom card application of the host to establish described the in second data folder Two temporary files and from the wisdom card application receive said write instruction be written the serial data to it is described logically Location.
13. memory storage apparatus according to claim 9, which is characterized in that the memory circuit administrative unit exists The cluster number that those successive clusters of those the first temporary files will be stored in the directory area of the corresponding file system is converged After under collection to second data folder, is received from the host and delete instruction to delete first data folder.
14. memory storage apparatus according to claim 9, which is characterized in that the host passes through transmission read/write Instruction is to read or be written the memory storage apparatus, and read/write instruction includes that the setting instructs.
15. memory storage apparatus according to claim 9, which is characterized in that if memory circuit management is single When member receives the deletion instruction for indicating to delete those the first temporary files from the host, the memory circuit administrative unit Those first temporary files are not deleted and transmit error message deletes those the first interim texts to the host to respond instruction The deletion of part instructs.
16. memory storage apparatus according to claim 10, which is characterized in that the memory circuit administrative unit exists The cluster number that those successive clusters of those the first temporary files will be stored in the directory area of the corresponding file system is converged After under collection to second data folder, is received from the wisdom card application and delete instruction to delete the described second interim text Part.
17. a kind of storage device management system characterized by comprising
Host;And
Memory storage apparatus has reproducible nonvolatile memorizer module with wisdom card chip and separably electrically connects It is connected to the host,
Wherein the memory storage apparatus establishes in the first data folder multiple the before receiving setting instruction from the host One temporary file, wherein those first temporary files are stored to the multiple of the file system of the corresponding memory storage apparatus Successive clusters, first data folder configures in the reproducible nonvolatile memorizer module and the operation system of the host System can not access the file in first data folder;
Wherein the setting instruction instruction configures temporary file data folder in the second data folder, and second data folder is configured In the reproducible nonvolatile memorizer module and the operating system of the host can access second data File in folder;And
Wherein the memory storage apparatus will store the operation system of the host in the directory area of the correspondence file system The operating system that the cluster number of those successive clusters of those the first temporary files that system can not access is collected to the host can Under the temporary file data folder of access.
18. storage device management system according to claim 17, which is characterized in that the memory storage apparatus is from peace Wisdom card application loaded on the host receives write instruction to establish the second temporary file in second data folder, Wherein second temporary file is stored to the cluster of the file system,
Wherein the memory storage apparatus from the wisdom card application receive said write instruction be written serial data to Logical address, wherein the serial data includes setting instruction and the logical address is the interim text of corresponding storage described second The cluster of part.
19. storage device management system according to claim 18, which is characterized in that the memory storage apparatus foundation The serial data of the logical address identification of said write instruction instruction comprising the setting instruction, and from the data The setting instruction is obtained in string.
20. storage device management system according to claim 18, which is characterized in that the memory storage apparatus is from institute It states wisdom card application and receives scanning signal to scan second data folder and judge whether deposit in second data folder There are those the first temporary files,
Wherein when second data folder is non-has those first temporary files, the memory storage apparatus is from being installed on The wisdom card application for stating host receives said write instruction and is faced with establishing described second in second data folder When file and from the wisdom card application receive said write instruction the serial data is written to the logical address.
21. storage device management system according to claim 17, which is characterized in that the memory storage apparatus is right It answers in the directory area of the file system and collects the cluster number for those successive clusters for storing those the first temporary files After under to second data folder, is received from the host and delete instruction to delete first data folder.
22. storage device management system according to claim 17, which is characterized in that the host by transmission read/ Write instruction is to read or be written the memory storage apparatus, and read/write instruction includes that the setting instructs.
23. storage device management system according to claim 17, which is characterized in that if the memory storage apparatus When receiving the deletion instruction for indicating to delete those the first temporary files from the host, the memory storage apparatus is not deleted Those first temporary files and error message is transmitted to the host to respond the institute that those the first temporary files are deleted in instruction State deletion instruction.
24. storage device management system according to claim 18, which is characterized in that the memory storage apparatus is right It answers in the directory area of the file system and collects the cluster number for those successive clusters for storing those the first temporary files After under to second data folder, is received from the wisdom card application and delete instruction to delete the described second interim text Part.
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