CN106155564A - Buffer management method and system and memory storage apparatus thereof - Google Patents
Buffer management method and system and memory storage apparatus thereof Download PDFInfo
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Abstract
The present invention provides a kind of buffer management method and system and memory storage apparatus thereof.The method includes: receiving from main frame and set up multiple first temporary file the first data folder before setting instruction, the operating system of multiple successive clusters and main frame that the most above-mentioned first temporary file is stored to file system cannot access the file in the first data folder；The method also includes: receives from main frame and sets instruction, and the operating system that wherein this setting instruction instruction configures temporary file data folder and main frame in the second data folder can access the file in the second data folder；The method also includes: will store bunch number being collected under temporary file data folder of the successive clusters of above-mentioned first temporary file in the directory area of respective file system.The buffer management method of the present invention and system and memory storage apparatus thereof, it correctly can access smart card chip by the logical address of access temporary file.
Description
Technical field
The invention relates to a kind of buffer management method, and be used for configuring in particular to one
There is the storage device of reproducible nonvolatile memorizer module and the memory storage apparatus of smart card chip
Management method and system and memory storage apparatus thereof.
Background technology
Gradually accept along with user to use stored value card and prepayment Stored Value so that the use of smart card is day by day
Universal.Smart card (Smart Card) is to have such as microprocessor, card operation system, security module and deposit
The IC chip (IC chip) of the assembly of reservoir, to allow holder to perform scheduled operation.Smart card
There is provided calculating, encryption, two-way communication and security function so that this card is except storing the function of data
The function that its data stored are protected by can also be reached outward.Use universal mobile telecommunications system (GSM)
Mechanism cell phone used in subscriber identification module (Subscriber Identification Module,
It is called for short: SIM) card is one of them exemplary applications of smart card.But, smart card itself is limited to storage
Capacity, starts the memory card with mass storage devices the most in recent years and combines, to expand depositing of smart card
Storage capacity.
In general, the data between host computer system and smart card are to be associated with facing of smart card by access
Time file and transmitted.But, current Google data proposed in the version of Android 4.4.2
Access mode only allows the application program of user to carry out data access under particular category, it is thus possible to meeting
The application program causing user because of insufficient permission cannot carry out data write to some temporary file.
On the other hand, although dynamically setting up temporary file in host computer system can avoid the problems referred to above, but when certain
(logical address, is called for short the logical address of one dynamic temporary file: LA) be broken or discontinuous
Time, storage arrangement possibly cannot intactly record the logical address of this dynamic temporary file, or
When read-write motion crosses over multiple logical address, cause the access incorrect problem of data.
Summary of the invention
The present invention provides a kind of buffer management method and system and memory storage apparatus thereof, and it can be just
Really access smart card chip by the logical address of access temporary file.
The present invention proposes a kind of buffer management method, is used for having type nonvolatile
Module and the memory storage apparatus of smart card chip.Buffer management method includes receiving from main frame setting
In the first data folder, multiple first temporary file, the most above-mentioned first temporary file quilt is set up before fixed instruction
Multiple successive clusters of the file system stored to corresponding memory storage apparatus, the first data folder is arranged in can
In manifolding formula non-volatile memory module and the operating system of main frame cannot access the literary composition in the first data folder
Part.Buffer management method also includes receiving from main frame setting instruction, wherein sets instruction instruction the
Configuring temporary file data folder in two data folders, the second data folder is configured in that duplicative is non-volatile to be deposited
In memory modules and the operating system of main frame can access the file in the second data folder.Storage device management side
Method be additionally included in the directory area of respective file system by store above-mentioned first temporary file successive clusters bunch
Number it is collected under temporary file data folder.
In one example of the present invention embodiment, above-mentioned buffer management method also includes by being installed on
The smart card application program of main frame sets up the second temporary file, wherein the second interim literary composition in the second data folder
Part be stored to file system bunch.Above-mentioned buffer management method also includes by smart card application journey
Sequence assigns write serial data to the write instruction of logical address to memory storage apparatus, wherein serial data bag
It is corresponding storage the second temporary file bunch containing setting instruction and logical address.
In one example of the present invention embodiment, the above-mentioned step from main frame reception setting instruction includes: depend on
Comprise the serial data setting instruction according to the logical address identification of write instruction instruction, and obtain from serial data
Take setting instruction.
In one example of the present invention embodiment, above-mentioned buffer management method also includes passing through smart card
Application scan the second data folder also judges whether there is above-mentioned first temporary file in the second data folder,
Wherein by be installed on the smart card application program of main frame set up in the second data folder the second temporary file and
Write serial data is assigned to the write instruction of logical address to memorizer storage dress by smart card application program
The step put be the second data folder is non-have above-mentioned first temporary file time be performed.
In one example of the present invention embodiment, above-mentioned buffer management method is additionally included in respective file
The directory area of system bunch number is collected to the second data folder by store the successive clusters of above-mentioned first temporary file
After Xia, transmit and delete instruction to delete the first data folder.
In one example of the present invention embodiment, above-mentioned main frame by transmit read/write instruction with read or
Write memory storage apparatus, and read/write instruction includes that above-mentioned setting instructs.
In one example of the present invention embodiment, if above-mentioned buffer management method also includes receiving
When the deletion instruction of above-mentioned first temporary file is deleted in instruction, do not delete above-mentioned first temporary file and pass
Error message is sent to delete the deletion instruction of above-mentioned first temporary file to respond instruction.
In one example of the present invention embodiment, above-mentioned buffer management method is additionally included in respective file
The directory area of system bunch number is collected to the second number by store the above-mentioned successive clusters of above-mentioned first temporary file
After under folder, transmitted by smart card application program and delete instruction to delete the second temporary file.
The present invention proposes a kind of memory storage apparatus, is electrically connected to main including connecting interface unit
Machine, reproducible nonvolatile memorizer module, smart card chip and memorizer control circuit unit.Deposit
Memory control circuit unit is electrically connected to connect interface unit, reproducible nonvolatile memorizer module
And smart card chip.Wherein memorizer control circuit unit counts first before receiving setting instruction from main frame
Setting up multiple first temporary file according in folder, the most above-mentioned first temporary file is stored to corresponding memorizer
Multiple successive clusters of file system of storage device, the first data folder is arranged in that duplicative is non-volatile to be deposited
In memory modules and the operating system of main frame cannot access the file in the first data folder.Wherein set instruction
Instruction configures temporary file data folder in the second data folder, and it is non-that the second data folder is configured in duplicative
In volatile and the operating system of main frame can access the file in the second data folder.Wherein deposit
Memory control circuit unit will store the company of above-mentioned first temporary file in the directory area of respective file system
Continuous bunch bunch number be collected under temporary file data folder.
In one example of the present invention embodiment, above-mentioned memory circuitry administrative unit is from being installed on main frame
Smart card application program receives write instruction to set up the second temporary file, Qi Zhong in the second data folder
Two temporary files be stored to file system bunch, wherein memory circuitry administrative unit from smart card apply
Program receives write instruction with write serial data to logical address, and wherein serial data comprises setting instruction and patrols
Volume address be corresponding storage the second temporary file bunch.
In one example of the present invention embodiment, above-mentioned memory circuitry administrative unit refers to according to write instruction
The logical address identification shown comprises the serial data setting instruction, and obtains setting instruction from serial data.
In one example of the present invention embodiment, above-mentioned memory circuitry administrative unit is from smart card application journey
Sequence receives scanning signal to scan the second data folder and to judge that whether having above-mentioned first in the second data folder faces
Time file, wherein when the second data folder is non-have above-mentioned first temporary file time, memory circuitry management is single
Unit receives write instruction to set up second the second data folder from the smart card application program being installed on main frame
Temporary file also receives write instruction with write serial data to logical address from smart card application program.
In one example of the present invention embodiment, above-mentioned memory circuitry administrative unit is in respective file system
Directory area in bunch number be collected to the second data folder purgation by store the successive clusters of above-mentioned first temporary file
After, receive from main frame and delete instruction to delete the first data folder.
In one example of the present invention embodiment, above-mentioned main frame by transmit read/write instruction with read or
Write memory storage apparatus, and read/write instruction includes that above-mentioned setting instructs.
In one example of the present invention embodiment, if memory circuitry administrative unit receives finger from main frame
When showing the deletion instruction deleting above-mentioned first temporary file, memory circuitry administrative unit does not delete above-mentioned the
One temporary file and transmit error message and delete the deleting of above-mentioned first temporary file to main frame to respond instruction
Except instruction.
In one example of the present invention embodiment, above-mentioned memory circuitry administrative unit is in respective file system
Directory area in bunch number be collected to the second data folder purgation by store the successive clusters of above-mentioned first temporary file
After, receive from smart card application program and delete instruction to delete the second temporary file.
The present invention proposes a kind of storage device management system, including main frame and memory storage apparatus.Storage
Device storage device has reproducible nonvolatile memorizer module and smart card chip and the most electrical
It is connected to main frame.Wherein memory storage apparatus from main frame receive set instruction before in the first data folder
Setting up multiple first temporary file, the most above-mentioned first temporary file is stored to corresponding memorizer storage dress
Multiple successive clusters of the file system put, the first data folder is arranged in type nonvolatile mould
In block and the operating system of main frame cannot access the file in the first data folder.Wherein set instruction instruction to exist
Configuring temporary file data folder in second data folder, it is non-volatile that the second data folder is configured in duplicative
In memory module and the operating system of main frame can access the file in the second data folder.Wherein memorizer is deposited
Storage device in the directory area of respective file system by store above-mentioned first temporary file successive clusters bunch number
It is collected under temporary file data folder.
In one example of the present invention embodiment, above-mentioned memory storage apparatus is from the wisdom being installed on main frame
Card application reception write instruction is to set up the second temporary file in the second data folder, and wherein second faces
Time file be stored to file system bunch, wherein memory storage apparatus from smart card application program receive
Write instruction is with write serial data to logical address, and wherein serial data comprises setting instruction and logical address is
Corresponding storage the second temporary file bunch.
In one example of the present invention embodiment, above-mentioned memory storage apparatus is according to write instruction instruction
Logical address identification comprises the serial data setting instruction, and obtains setting instruction from serial data.
In one example of the present invention embodiment, above-mentioned memory storage apparatus connects from smart card application program
Receive scanning signal to scan the second data folder and to judge whether the second data folder has the above-mentioned first interim literary composition
Part.Wherein when the second data folder is non-have above-mentioned first temporary file time, memory storage apparatus is from installation
Smart card application program in main frame receives write instruction to set up the second temporary file in the second data folder
And receive write instruction with write serial data to logical address from smart card application program.
In one example of the present invention embodiment, above-mentioned memory storage apparatus is at the mesh of respective file system
After record district will store bunch number being collected under the second data folder of the successive clusters of above-mentioned first temporary file,
Receive from main frame and delete instruction to delete the first data folder.
In one example of the present invention embodiment, above-mentioned main frame by transmit read/write instruction with read or
Write memory storage apparatus, and read/write instruction includes that above-mentioned setting instructs.
In one example of the present invention embodiment, delete if memory storage apparatus receives instruction from main frame
When instructing except the deletion of above-mentioned first temporary file, memory storage apparatus does not delete the above-mentioned first interim literary composition
Part and transmit error message to main frame with respond instruction delete above-mentioned first temporary file deletion instruction.
In one example of the present invention embodiment, above-mentioned memory storage apparatus is at the mesh of respective file system
After record district will store bunch number being collected under the second data folder of the successive clusters of above-mentioned first temporary file,
Receive from smart card application program and delete instruction to delete the second temporary file.
Based on above-mentioned, by the successive clusters of the first temporary file bunch number is pooled to the of host-accessible
In two data folders so that can correctly access wisdom during the logical address of host accessing the first temporary file
Card chip.Even if during host accessing data bigger than bunch size, due to the first temporary file bunch it is
Continuous print, the most also will not produce the access incorrect problem of data.
For the features described above of the present invention and advantage can be become apparent, special embodiment below, and coordinate
Accompanying drawing is described in detail below.
Accompanying drawing explanation
Fig. 1 is the signal of the main frame shown by one example of the present invention embodiment and memory storage apparatus
Figure；
Fig. 2 is that the computer shown by one example of the present invention embodiment, input/output device are deposited with memorizer
The example schematic of storage device；
Fig. 3 is the signal of the main frame shown by one example of the present invention embodiment and memory storage apparatus
Figure；
Fig. 4 is the schematic block diagram illustrating the main frame shown in Fig. 1 with memory storage apparatus；
Fig. 5 is the summary square of the memorizer control circuit unit shown by one example of the present invention embodiment
Figure；
Fig. 6 is the example signal of the management entity erased cell shown by one example of the present invention embodiment
Figure；
Fig. 7 be shown by one example of the present invention embodiment with file system format memory module
The example of logical address；
Fig. 8 is the flow chart of the buffer management method shown by one example of the present invention embodiment；
Fig. 9 A is that the smart card chip shown by one example of the present invention embodiment is built at root when opening card
The example of vertical first temporary file；
Fig. 9 B is to set up first under temporary file data folder shown by one example of the present invention embodiment
The example of temporary file；
Figure 10 is the detailed process of the buffer management method shown by one example of the present invention embodiment
Figure；
Figure 11 A to Figure 11 C be shown by one example of the present invention embodiment under temporary file data folder
The schematic diagram of the change of directory area when setting up the first temporary file.
Description of reference numerals:
10: memory storage apparatus；
11: main frame；
12: computer；
122: microprocessor；
124: random access memory (RAM)；
13: input/output (I/O) device；
126: system bus；
128: data transmission interface；
21: mouse；
22: keyboard；
23: display；
24: printer；
25: Portable disk；
26: memory card；
27: solid state hard disc；
31: digital camera；
32:SD card；
33:MMC card；
34: memory stick；
35:CF card；
36: embedded storage device；
402: connect interface unit；
404: memorizer control circuit unit；
406: reproducible nonvolatile memorizer module；
408: smart card chip；
410: smart card application program；
410 (0)～410 (N), 410 (0)～410 (F), 410 (F+1)～410 (N): entity erased cell；
502: memory management circuitry；
504: HPI；
506: memory interface；
508: smart card interface；
510: buffer storage；
512: electric power management circuit；
514: error checking and correcting circuit；
610 (0)～610 (D): logical block；
620: serial data；
630: set instruction；
700: cut section；
702: main startup recording areas；
704: file configuration table district；
706: directory area；
708: file area；
700 (0)～700 (W): bunch；
S805, S810, S815: step；
900: root；
911: the first data folders；
912: the second data folders；
913: temporary file data folder；
921 (1)～921 (n): the first temporary file；
922: the second temporary files；
S1001、S1003、S1005、S1007、S1009、S1011、S1013、S1015、S1017、
S1019, S1021: step；
1101: the first temporary file directory districts；
1103: root directory area；
1105: the second data folder directory areas.
Detailed description of the invention
It is said that in general, memory storage apparatus (also referred to as, storage system) includes that duplicative is non-volatile
Property memory module and controller (also referred to as, control circuit).Being commonly stored device storage device is together with main frame
Use, read to memory storage apparatus or from memory storage apparatus so that main frame can write data into
Data.
Fig. 1 is the signal of the main frame shown by one example of the present invention embodiment and memory storage apparatus
Scheme, and Fig. 2 is the computer shown by one example of the present invention embodiment, input/output device and storage
The example schematic of device storage device.
Refer to Fig. 1, main frame 11 generally comprise computer 12 and input/output (input/output, is called for short:
I/O) device 13.Computer 12 includes microprocessor 122, random access memory (random access
Memory, is called for short: RAM) 124, system bus 126 and data transmission interface 128.Input/output fills
Put 13 and include mouse 21 such as Fig. 2, keyboard 22, display 23 and printer 24.Have to be understood that
Being, the unrestricted input/output device of device 13 shown in Fig. 2, input/output device 13 can also include it
His device.
In the present embodiment, memory storage apparatus 10 is by data transmission interface 128 and main frame 11
Other elements be electrically connected with.By microprocessor 122, random access memory 124 and input/output
The running of device 13 can write data into memory storage apparatus 10 or from memory storage apparatus 10
Read data.Such as, memory storage apparatus 10 can be Portable disk 25 as shown in Figure 2, memory
(Solid State Drive is called for short: SSD) duplicative of 27 grades is non-volatile deposits for card 26 or solid state hard disc
Reservoir storage device.
Fig. 3 is the signal of the main frame shown by one example of the present invention embodiment and memory storage apparatus
Figure.
It is said that in general, main frame 11 is for coordinating to store data with memory storage apparatus 10 substantially
Arbitrarily system.Although in this exemplary embodiment, main frame 11 is to explain with computer system, but,
In another exemplary embodiment, main frame 11 can be digital camera, video camera, communicator, audio frequency broadcasting
The system such as device or video player.Such as, during digital camera (video camera) 31 in main frame is Fig. 3,
Type nonvolatile storage device then by its SD card 32 used, mmc card 33,
Memory stick (memory stick) 34, CF card 35 or embedded storage device 36 (as shown in Figure 3).Embed
Formula storage device 36 includes that (Embedded MMC is called for short: eMMC) embedded multi-media card.It is worth
One is mentioned that, embedded multi-media card is directly to be electrically connected on the substrate of main frame.
Fig. 4 is the schematic block diagram illustrating the main frame shown in Fig. 1 with memory storage apparatus.
Refer to Fig. 4, memory storage apparatus 10 includes connecting interface unit 402, memorizer controls electricity
Road unit 404, reproducible nonvolatile memorizer module 406 and smart card chip 408.
In this exemplary embodiment, memorizer control circuit unit 404 is to control memorizer storage dress
Put the overall operation of 10, to complete buffer management method according to embodiments of the present invention.Additionally, must
It is appreciated that main frame 11 also comprises that main frame 11 is intended to possess needed for being connected with memory storage apparatus 10
As function.
Connect interface unit 402 and be compatible with Serial Advanced Technology Attachment (Serial Advanced
Technology Attachment, is called for short: SATA) standard.However, it is necessary to be appreciated that, the present invention is not
Being limited to this, connecting interface unit 402 can also be to meet parallel advanced technology adnexa (Parallel Advanced
Technology Attachment, is called for short: PATA) standard, Institute of Electrical and Electric Engineers (Institute of
Electrical and Electronic Engineers, is called for short: IEEE) 1394 standards, high-speed peripheral assembly are mutual
Connecting port (Peripheral Component Interconnect Express, be called for short: PCI Express) standard,
(Universal Serial Bus is called for short: USB) standard, a ultrahigh speed generation (Ultra High USB (universal serial bus)
Speed-I, is called for short: UHS-I) interface standard, ultrahigh speed secondary (Ultra High Speed-II, is called for short:
UHS-II) (Secure Digital is called for short: SD) interface standard, memory stick for interface standard, secure digital
(Memory Stick, be called for short: MS) interface standard, multimedia storage card (Multi Media Card, be called for short:
MMC) (Compact Flash, is called for short: CF) interface standard, integrated driving electricity for interface standard, compact flash
(Integrated Device Electronics, is called for short sub-interface: IDE) standard or other standards being suitable for.?
In this exemplary embodiment, connecting interface unit 402 can be encapsulated in one with memorizer control circuit unit 404
In individual chip, or it is laid in outside a chip comprising memorizer control circuit unit 404.
Memorizer control circuit unit 404 is in order to perform in the form of hardware or the multiple of form of firmware implementation patrol
Volume door or control instruction, and according to the instruction of main frame 11 in reproducible nonvolatile memorizer module
406 operate with the write carrying out data in smart card chip 408, read, erase and merge etc..
Reproducible nonvolatile memorizer module 406 is electrically connected to memorizer control circuit unit
404 and the data that write in order to storage host 11.Reproducible nonvolatile memorizer module 406
Can be that (Single Level Cell is called for short: SLC) NAND type flash memory module single-order memory element
(that is, the flash memory module of 1 Bit data can be stored in one memory element), multi-level cell memory
(Multi Level Cell is called for short: MLC) NAND type flash memory module (that is, one memory element
In can store the flash memory module of 2 Bit datas), Complex Order memory element (Triple Level
Cell, is called for short: TLC) NAND type flash memory module (that is, can store 3 in one memory element
The flash memory module of Bit data), other flash memory module or other there is depositing of identical characteristics
Memory modules.
Smart card chip 408 be electrically connected to memorizer control circuit unit 404 and in order to perform calculating,
The functions such as encryption, two-way communication and safety certification.In an exemplary embodiment, smart card chip 408 is
It is compatible with the Contact Smart Card of ISO 7816 standard.However, it is necessary to be appreciated that, the invention is not restricted to
This.Such as, smart card chip 408 may also be and is compatible with ISO 14443, ISO 15408 or other safety
The contact of smart card standard or Contactless Smart Card.The most such as, smart card chip 408 can be that radio frequency is known
Not (Radio Frequency Identification, be called for short: RFID) chip, be wirelessly transferred chip (such as: bluetooth
Chip) or multimedia control chip (such as: digital recording chip) etc..Additionally, what deserves to be explained is, storage
Device control circuit unit 404 and smart card chip 408 can be respectively an individual chips, it is possible to merge and be encapsulated as
One one chip.In this exemplary embodiment, smart card chip 408 be store enciphering/deciphering key,
The sensitive data that account number and/or password etc. are relevant with safety verification.But, in another exemplary embodiment,
Smart card chip 408 can also be in order to store general data.
Fig. 5 is the summary square of the memorizer control circuit unit shown by one example of the present invention embodiment
Figure.
Refer to Fig. 5, memorizer control circuit unit 404 includes that memory management circuitry 502, main frame connect
Mouth 504, memory interface 506 and smart card interface 508.
Memory management circuitry 502 is in order to control the overall operation of memorizer control circuit unit 404.Tool
For body, memory management circuitry 502 has multiple control instruction, and at memory storage apparatus 10
During running, these a little control instructions can be performed to carry out the write of data, running of reading and erase etc..With
During the operation of lower explanation memory management circuitry 502, it is equal to memorizer control circuit unit 404 is described
Operation.
In this exemplary embodiment, the control instruction of memory management circuitry 502 is to come in fact with form of firmware
Make.Such as, memory management circuitry 502 has microprocessor unit (not shown) with read only memory (not
Illustrate), and these a little control instructions are to be programmed so far in read only memory.When memory storage apparatus 10
During running, these a little control instructions can be performed by microprocessor unit with to duplicative non-volatile memories
Device module 406 carries out the write of data, running of reading and erase etc..In another exemplary embodiment, deposit
The control instruction of reservoir management circuit 502 procedure code form can also be stored in that duplicative is non-volatile to be deposited
The specific region (such as, being exclusively used in the system area of storage system data in memory module) of memory modules 406
In.Additionally, memory management circuitry 502 has microprocessor unit (not shown), read only memory (not
Illustrate) and random access memory (not shown).Particularly, this read only memory has driving code, and
When memorizer control circuit unit 404 is enabled, microprocessor unit can first carry out this and drive code section
Will be stored in the control instruction in reproducible nonvolatile memorizer module 406 and be loaded into memorizer management
In the random access memory of circuit 502.Afterwards, microprocessor unit can operate these a little control instructions with
Carry out the write of data, running of reading and erase etc..
HPI 504 is electrically connected to memory management circuitry 502 and the company of being electrically connected to
Connection interface unit 402, with the instruction and data that receive with identify that main frame 11 is transmitted.It is to say, it is main
The instruction that machine 11 is transmitted and data can be sent to memory management circuitry 502 by HPI 504.
In this exemplary embodiment, HPI 504 is compatible with SATA standard.However, it is necessary to understand
Being to the invention is not restricted to this, HPI 504 can also be compatible with PATA standard, IEEE 1394
Standard, PCI Express standard, USB standard, UHS-I interface standard, UHS-II interface standard, SD
Standard, MS standard, MMC standard, CF standard, IDE standard or other data transmission marks being suitable for
Accurate.
Memory interface 506 is electrically connected to memory management circuitry 502 and can make carbon copies in order to access
Formula non-volatile memory module 406.It is to say, be intended to write to type nonvolatile
The data of module 406 can be converted to reproducible nonvolatile memorizer module by memory interface 506
406 receptible forms.Such as, if memory management circuitry 502 duplicative to be accessed is non-volatile
Property memory module 406, memory interface 506 can transmit correspondence job sequence.These job sequences
One or more signal, or the data in bus can be included.Such as, in reading job sequence, meeting
The information such as including the identification code read, storage address.
Smart card interface 508 is electrically connected to memory management circuitry 502 and is electrically connected to smart card
Chip 408.Specifically, memory management circuitry 502 can transmit instruction by smart card interface 508
To smart card chip 408 or be received back to from smart card chip 408 should.Such as, in this exemplary embodiment
In, the director data unit sending smart card chip 408 to is referred to as instruction-application program Protocol Data Unit
C-APDU) and come from smart card (Command-Application Protocol Data Unit is called for short:
The response data unit of chip 408 is referred to as response-application program Protocol Data Unit
(Response-Application Protocol Data Unit is called for short: R-APDU).
In an exemplary embodiment, memorizer control circuit unit 404 also include buffer storage 510,
Electric power management circuit 512 and error checking and correcting circuit 514.
Buffer storage 510 is electrically connected to memory management circuitry 502 and being configured to temporarily store and comes from
The data of main frame 11 and instruction or come from reproducible nonvolatile memorizer module 406 or wisdom the core of the card
The data of sheet 408.
Electric power management circuit 512 is electrically connected to memory management circuitry 502 and in order to control storage
The power supply of device storage device 10.
Error checking and correcting circuit 514 are electrically connected to memory management circuitry 502 and in order to hold
Row error checking and correction program are to guarantee the correctness of data.Specifically, memory management circuitry is worked as
502 when receiving write instruction from main frame 11, and error checking can be write for corresponding this with correcting circuit 514
The data entering instruction produce corresponding error checking and correcting code (Error Checking and Correcting
Code, be called for short: ECC Code) and/or error checking code (error detecting code, be called for short: EDC),
And memory management circuitry 502 can be by the data of this write instruction corresponding and corresponding error checking and school
Code and/or error checking code write to reproducible nonvolatile memorizer module 406.Afterwards, when
When memory management circuitry 502 reads data from reproducible nonvolatile memorizer module 406 together with
Time read error checking corresponding to these data and correcting code and/or error checking code, and error checking and school
Positive circuit 514 can the data to being read perform with correcting code and/or error checking code according to this error checking
Error checking and correction program.
Fig. 6 is the example signal of the management entity erased cell shown by one example of the present invention embodiment
Figure.
During it will be appreciated that be described herein the running of entity erased cell, with " selection ", " packet ", " draw
Point ", to carry out application entity erased cell be concept in logic to the word such as " association ".It is to say, entity is erased
Unit physical location in smart card chip 408 with reproducible nonvolatile memorizer module 406 is also
Do not change, but in logic these a little entity erased cell are operated.
Refer to Fig. 6, reproducible nonvolatile memorizer module 406 has entity erased cell
410 (1)～410 (F) and smart card chip 408 have entity erased cell 410 (F+1)～410 (N).Entity is smeared
Same memory crystal grain (die) can be belonged to except unit 410 (0)～410 (F) or to belong to different memorizer brilliant
Grain.Entity erased cell 410 (F+1)～410 (N) may belong to same memory crystal grain or belong to different
Memory crystal grain.Each entity erased cell is respectively provided with a plurality of entity program unit, wherein belongs to
Entity program unit in same entity erased cell can be written independently and simultaneously be erased.
In this exemplary embodiment, entity program unit is the minimum unit of sequencing.That is, entity journey
Sequence unit is the minimum unit of write data.Such as, entity program unit is physical page or reality
Body fan (sector).If entity program unit is physical page, then each entity program unit is usual
Including data bit district and redundancy ratio special zone.Data bit district comprises multiple entity fan, in order to store use
The data of person, and redundancy ratio special zone is in order to store the data (such as, error correcting code) of system.At this example
In embodiment, a data bit area comprises 32 entity fans, and the size of an entity fan is 512 words
(byte is called for short: B) joint.But, in other exemplary embodiment, data bit district also can comprise 8
Individual, 16 or number more or less of entity fan.On the other hand, entity erased cell is to erase
Subsection.That is, each entity erased cell contains the memory element being erased in the lump of minimal amount.
Such as, entity erased cell is physical blocks.Additionally, in another exemplary embodiment, smart card chip
408 can also be to comprise other kinds of storage media and be not limited to use entity erased cell to store number
According to.
Memory management circuitry 502 can configuration logic unit 610 (0)～610 (D) be erased list mapping to entity
Unit 410 (0)～410 (N's) is at least a part of.Such as, in this exemplary embodiment, main frame 11 is to pass through
(logical block address, is called for short logical block addresses: LBA) accesses and is stored in entity erased cell
Data in 410 (0)～410 (N), therefore, each logical block 610 (0)～610 (D) refers to a logic
Block address.In another this exemplary embodiment, the size of a logical block is equal to a logic fan
Size.Such as, the size of a logic fan is 512 kilobytes.But, in another exemplary embodiment,
The size of one logical block can also be greater or lesser, and each logical block
610 (0)～610 (D) may also mean that a logical order unit, a logic erased cell or by many
Individual continuous print logical block addresses forms.Each logical block 610 (0)～610 (D) is to map to one or many
Individual solid element.In this exemplary embodiment, a solid element refers to an entity fan.But,
In another exemplary embodiment, a solid element can also be a physical address, an entity program
Unit, an entity erased cell or be made up of multiple continuous print physical address, the present invention is the most in addition
Limit.Mapping relations between logical block and solid element can be recorded in by memory management circuitry 502
One or more logic-entity mapping.When main frame 11 is intended to read data from memory storage apparatus 10 or write
When entering data to memory storage apparatus 10, memory management circuitry 502 can be according to this one or more logic
-entity mapping performs the data access for memory storage apparatus 10.
In this exemplary embodiment, main frame 11 runs one or more smart card application program 410.Main frame
11 (or smart card application programs 410) can access smart card chip 408 to obtain the data needed for operation.Example
As, smart card application program 410 can be instant messaging application program, short message application program, call should
With various types of application programs such as program or safety verification application programs, and smart card application program 410
Kind be not limited to above-mentioned.Such as, main frame 11 also run an operating system (operating system, be called for short:
OS) and based on this operating system smart card application program 410 is run.This operating system e.g. Android
(android) 4.4.2 or the operating system of other types/version.
In this exemplary embodiment, main frame 11 (or smart card application program 410) can be by assigning one or many
The access instruction of individual temporary file communicates with smart card chip 408.Such as, main frame 11 (or smart card
Application program 410) one or more temporary file can be set up in smart card chip 408, and will be about this
The information of a little logical block addresses shared by temporary file pass to memorizer control circuit unit 404 (or
Memory management circuitry 502).Afterwards, serial data is transmitted to memory storage apparatus 10 when main frame 11
Time, memorizer control circuit unit 404 (or memory management circuitry 502) can judge from main frame 11 institute
Whether the serial data transmitted is write so far a little logical block addresses shared by temporary file.If data
String for write so far a bit logical block addresses shared by temporary files time, then memorizer control circuit unit
Serial data can be identified as to the communication number of smart card chip 408 by 404 (or memory management circuitry 502)
According to unit and be transferred to smart card chip 408.
Fig. 7 be shown by one example of the present invention embodiment with file system format memory module
The example of logical address.
Refer to Fig. 7, the operating system of main frame 11 can use file system by logical block
Logical address format one cut section (partition) 700 of chemical conversion of 610 (0)～610 (D).Cut section 700 includes
Main startup records (Master Boot Record, MBR) district 702, file configuration table district 704, directory area 706
With file area 708.
The logical address belonging to main startup recording areas 702 is to store portable memory storage device 10
Can the system information of memory space.The logical address belonging to file configuration table district 704 is to store literary composition
Part allocation list.File configuration table is the login value of the logical address recording storage file.Such as, literary composition
Can store two file configuration table in part allocation list district, one of them file configuration table is made by normal access
With, and another file configuration table is backup file configuration table.The logical address belonging to directory area 706 is
In order to store file description block, (File Description Block is called for short: FDB), it is in order to record mesh
Before the attribute information of the file that is stored in portable memory storage device 10 and catalogue.Particularly, literary composition
Part description block can record to store the initial logical address (that is, starting cluster) of these a little files.Belong to file
The logical address in district 708 is the content storing file practically.In this exemplary embodiment, segmentation
District 700 can be the cut section meeting FAT32 specification.Therefore, directory area 706 and file area 708 are belonged to
Sector can be grouped into bunch (cluster) 700 (0)～700 (W).In this exemplary embodiment, each bunch
The big I of 700 (0)～700 (W) is 16 kilobytes, but the present invention is not limited thereto.At other examples
In embodiment, the size of each bunch 700 (0)～700 (W) can also be 8 kilobytes, 32 kilobytes or
Other sizes.
Fig. 8 is the flow chart of the buffer management method shown by one example of the present invention embodiment, figure
9A is that the smart card chip shown by one example of the present invention embodiment sets up first at root when opening card
The example of temporary file, and Fig. 9 B be shown by one example of the present invention embodiment at temporary file number
According to the example setting up the first temporary file under folder.
Refer to Fig. 8, in step S805, memorizer control circuit unit 404 (or memorizer management
Circuit 502) can be when memory storage apparatus 10 perform initially to melt card program, root 900 times
Set up first data folder 911, and set up multiple temporary file (also in the first data folder 911
It is referred to as the first temporary file) 921 (1)～921 (n), now, memory storage apparatus 10 is not the most from main frame 11
Received any setting to instruct.
Specifically, the first data folder 911 is to be configured in reproducible nonvolatile memorizer module 406
In, and the first temporary file 921 (1)～921 (n) be stored in file system continuous print bunch 700 (W-3),
In 700 (W-2), 700 (W-1) and 700 (W) and cannot be deleted or revise.At memory storage apparatus
10 when initially melting card program, memorizer control circuit unit 404 (or memory management circuitry 502)
Bunch number (such as, the starting cluster number) of first temporary file 921 (1)～921 (n) can be pooled to root 900
Under the first data folder 911.Consequently, it is possible to the first temporary file 921 (1)～921 (n) just can build on
In one data folder 910.Here, the first temporary file 921 (1)～921 (n) can also correspond to logical block
610 (D-127)～610 (D).
Can only deposit significantly, since limit user at version later for Android (android) 4.4.2
Taking specific data folder, application program only has access right under the data folder oneself set up in other words,
Therefore in the version after Android 4.4.2, the application program of main frame 11 cannot access and is positioned at root 900
Under the first data folder 911 in the first temporary file 921 (1)～921 (n), the most just cannot be by access the
One temporary file 921 (1)～the logical block 610 (D-127) of 921 (n)～610 (D) transmit escape way life
Make performing the accessing operation to smart card chip 408.
In step S810, memorizer control circuit unit 404 (or memory management circuitry 502) meeting
Receive from main frame 11 and set instruction 630 to configure temporary file data folder 913 the second data folder 912.
Specifically, in the case of the version after the operating system of main frame 11 is Android 4.4.2, main
Machine 11 cannot access the first temporary file in the first data folder 911 being positioned under root 900
921 (1)～921 (n).In this example, smart card application program 410 first scanning can have access right
Whether the second data folder 912 has the first temporary file 921 (1)～921 (n).If the second data folder 912
In when there is not the first temporary file 921 (1)～921 (n), smart card application program 410 can be first at the second number
A dynamic temporary file (the also referred to as second temporary file 922) is set up according in folder 912.Such as, second
Temporary file 922 can be stored in bunch 700 (W-50) of counterlogic unit 610 (100).Then wisdom
Card application 410 can transmit instruction write serial data 620 to logical block 610 (100) and containing instruction
Configure the write instruction of header of the first temporary file 921 (1)～921 (n) to memory storage apparatus 10, and
And memorizer control circuit unit 404 (or memory management circuitry 502) meeting is according to indicated by write instruction
Logical address (that is, logical block 610 (100)) and its header identify corresponding data string 620
This write instruction is special instruction, and acquisition instruction is joined in the second data folder 912 from serial data 620
Put the setting instruction 630 of temporary file data folder 913.It is to say, memorizer control circuit unit 404
(or memory management circuitry 502) can be according to being included in write instruction about logical block 610 (100)
Information and its header judge to be intended to carry out the second data folder 912 configures temporary file data folder
913。
Although illustrating the logical address by accessing the second temporary file 922 in above-mentioned exemplary embodiment
Assign setting instruction 630, but the present invention is not limited thereto.When main frame 11 is to memory storage apparatus
10 when assigning the instruction of general read/write with access reproducible nonvolatile memorizer module 406, this
Read/write instruction may also comprise setting instruction 630.It is to say, main frame 10 can be in access manifolding formula
Carry out during non-volatile memory module 406 (rather than smart card chip 408) joining in the second data folder 912
Put temporary file data folder 913 and follow-up operation thereof.
In step S815, memorizer control circuit unit 404 (or memory management circuitry 502) meeting
It is connected to according to setting the instruction 630 starting cluster number by storage the first temporary file 921 (1)～921 (n) temporarily
File data presss from both sides 913 times.Specifically, memorizer control circuit unit 404 (or memorizer management electricity
Road 502) can be according to setting instruction 630, by interim for storage first literary composition in the directory area 706 of file system
The successive clusters 700 (W-3) of part 921 (1)～921 (n)～the starting cluster number 700 (W-3) of 700 (W) are pooled to temporarily
File data presss from both sides 913 times, consequently, it is possible to temporary file data folder just has the first temporary file 913 times
921 (1)～921 (n).Owing to temporary file data folder 913 is in what smart card application program 410 was set up
Second data folder 912 times, therefore smart card application program 410 has depositing of temporary file data folder 913
Weighting limits, and can be by the first temporary file under the corresponding temporary file data folder 913 of access
921 (1)～the logical block 610 (D-127) of 921 (n)～610 (D) to perform the access to smart card chip 408
Operation.
It should be noted that the starting cluster number 700 (W-3) at the first temporary file 921 (1)～921 (n) collects
After temporary file data folder 913 times, (that is, temporary file data folder 913 has the first temporary file
921 (1)～921 (n) after), smart card application program 410 can also transmit one delete instruction give storage
Device storage device 10, indicates the second temporary file 922 deleted under the second data folder 912.It addition,
In step S810, if the first temporary file 921 (1)～921 (n) can be scanned for 912 times at the second data folder,
Representing above-mentioned steps S815 to be executed, therefore smart card application program 410 avoids the need for second
Data folder 912 is set up the second temporary file 922, and can be directly by the corresponding temporary file number of access
According to the first temporary file 921 (1) in folder 913～the logical block 610 (D-127) of 921 (n)～610 (D), with
Perform the accessing operation to smart card chip 408.
Figure 10 is the detailed process of the buffer management method shown by one example of the present invention embodiment
Figure.
Refer to Figure 10, when smart card application program 410 is performed to transmit instruction to smart card chip 408
Time, in step S1001, smart card application program 410 can judge whether the second data folder 912 has
First temporary file 921 (1)～921 (n).
If the second data folder 912 has the first temporary file 921 (1)～921 (n), in the step s 1003,
Smart card application program 410 can be by the serial data of the instruction containing smart card chip 408 to be sent to and finger
Show that the logical address write data to belonging to the first temporary file 921 (1)～921 (n) (that is, stores first to face
Time file 921 (1)～921 (n) bunch) write instruction be sent to memory storage apparatus 10.
In step S1005, memorizer control circuit unit 404 (or memory management circuitry 502) meeting
Smart card application program 410 from main frame 11 receives the data of this write instruction and this write instruction corresponding
String.
In step S1007, memorizer control circuit unit 404 (or memory management circuitry 502) meeting
Judge whether the logical address of this write instruction belongs to the first temporary file 921 (1)～the logic of 921 (n) correspondence
Unit 610 (D-127)～610 (D).
If the logical address of this write instruction belongs to the first temporary file 921 (1)～the logic list of 921 (n) correspondence
Unit 610 (D-127)～time 610 (D), memorizer control circuit unit 404 (or storage in step S1009
Device management circuit 502) instruction in the serial data of this write instruction corresponding can be sent to smart card chip
408。
If the logical address of this write instruction is not belonging to the first temporary file 921 (1)～the logic of 921 (n) correspondence
When unit 610 (D-127)～610 (D), in step S1011, memorizer control circuit unit 404 (or is deposited
Reservoir management circuit 502) according to the logical address of this write instruction, the serial data of this write instruction can be write
Enter to duplicative volatile 406.
If judging in step S1001, the second data folder 912 does not has the first temporary file
921 (1)～time 921 (n), in step S1013, smart card application program 410 can be at the second data folder 912
Middle set up the second temporary file 922 and by about storing the logical address of the second temporary file 922 (i.e.,
Bunch) information send memorizer control circuit unit 404 (or memory management circuitry 502) to.
Afterwards, in step S1015, smart card application program 410 can utilize according to the second temporary file
The escape way that 922 are set up transmits instruction and sets up temporary file data folder 913 in the second data folder 912
Setting instruction 630 give memorizer control circuit unit 404 (or memory management circuitry 502).
Then in step S1017, memorizer control circuit unit 404 (or memory management circuitry 502)
Temporary file data folder 913 can be set up 912 times at the second data folder according to setting instruction 630.
In step S1019, memorizer control circuit unit 404 (or memory management circuitry 502) meeting
Will storage the first temporary file in the directory area 706 of respective file system according to setting instruction 630
921 (1)～the starting cluster number 700 (W-3) of the successive clusters 700 (W-3) of 921 (n)～700 (W) be collected to the second number
According to 912 (as shown in Figure 9 B) of folder.
Afterwards, in step S1021, smart card application program 410 can transmit one and delete instruction to delete
Except the first data folder 911.And afterwards, step S1003 can be performed.
Although it should be noted that smart card application program 410 has access in the second data folder 912
Authority, but the first temporary file 921 (1)～921 (n) owing to being stored in the second data folder 912 is positioned at
Bunch 700 (W-3) of file system～700 (W), and the duplicative that these bunches or these bunches correspond to
The entity erased cell of nonvolatile memory 406 can be set to when memory storage apparatus 10 holds card
The state that cannot delete.If therefore memorizer control circuit unit 404 (or memory management circuitry 502)
The first interim literary composition in the second data folder 912 is deleted in smart card application program 410 instruction receiving main frame 11
During the deletion instruction of part 921 (1)～921 (n), memorizer control circuit unit 404 (or memorizer management electricity
Road 502) the first temporary file 921 (1)～921 (n) will not be deleted, and transmit error message to main frame 11.
Figure 11 A to Figure 11 C be shown by one example of the present invention embodiment under temporary file data folder
The schematic diagram of the change of directory area when setting up the first temporary file.
Refer to Figure 11 A, when this memory storage apparatus 10 is initialised out card, at the first interim literary composition
The first temporary file 921 (1) recorded in part directory area 1101～the starting cluster number of 921 (n) are (i.e.,
Root directory area 0x00036F01) can be pooled to 1103 times, now first temporary file 921 (1)～921 (n) meeting
In the first data folder 911 being stored under root 900, wherein the first data folder 911 bunch number is
0x00000000。
In Figure 11 B, when memorizer control circuit unit 404 (or memory management circuitry 502) is from master
Machine 11 receives after setting instruction 630 and configuring temporary file data folder 913 in the second data folder 912,
The starting cluster number (that is, 0x00036F01) of the first temporary file 921 (1)～921 (n) can be pooled to the second data
1105 times, clip directory district, now the first temporary file 921 (1)～921 (n) can be stored in the second data folder 912
Under temporary file data folder 913 in, wherein temporary file data folder 913 bunch number is 0x00000006.
Meanwhile, corresponding first temporary file 921 (1) in original root directory area 1103～the data meeting of 921 (n) starting cluster number
It is changed, and its first character festival-gathering is set to E5, now the first data folder under root 900
911 have been deleted.
In Figure 11 C, store the first temporary file 921 (1)～921 (n) starting cluster number is the most successfully pooled to
Temporary file data folder 913 times, therefore the smart card application program 410 of main frame 11 can be by access first
The logical address of temporary file 921 (1)～921 (n) accesses smart card chip 408.
In sum, the present invention is by bunch number being pooled to the successive clusters of the first temporary file main frame and can deposit
In the second data folder taken so that can correctly deposit during the logical address of host accessing the first temporary file
Take smart card chip.Even if during host accessing data bigger than bunch size, due to the first temporary file
Bunch be continuous print, the most also will not produce the access incorrect problem of data.
Last it is noted that various embodiments above is only in order to illustrate technical scheme, rather than right
It limits；Although the present invention being described in detail with reference to foregoing embodiments, this area common
Skilled artisans appreciate that the technical scheme described in foregoing embodiments still can be modified by it,
Or the most some or all of technical characteristic is carried out equivalent；And these amendments or replacement, and
The essence not making appropriate technical solution departs from the scope of various embodiments of the present invention technical scheme.
Claims (24)
1. a buffer management method, is used for having reproducible nonvolatile memorizer module and intelligence
The memory storage apparatus of intelligent card chip, it is characterised in that described buffer management method includes:
Receive from described main frame before setting instruction, the first data folder set up multiple first temporary file,
Wherein those first temporary files are stored to file system multiple of corresponding described memory storage apparatus
Successive clusters, described first data folder is arranged in described reproducible nonvolatile memorizer module and main frame
Operating system cannot access the file in described first data folder；
Receiving described setting from described main frame to instruct, wherein said setting instructs instruction in the second data folder
Configuration temporary file data folder, described second data folder is configured in described duplicative non-volatile memories
In device module and the described operating system of described main frame can access the file in described second data folder；And
Those successive clusters of those the first temporary files will be stored in the directory area of corresponding described file system
Bunch number be collected under described temporary file data folder.
Buffer management method the most according to claim 1, it is characterised in that also include:
In described second data folder, set up second face by being installed on the smart card application program of described main frame
Time file, wherein said second temporary file be stored to described file system bunch；And
Write serial data is assigned the most described to the write instruction of logical address by described smart card application program
Memory storage apparatus, wherein said serial data comprises described setting instruction and described logical address is corresponding
Store described bunch of described second temporary file.
Buffer management method the most according to claim 2, it is characterised in that from described main frame
Receive the described step setting instruction to include:
The described described number setting instruction is comprised according to the described logical address identification of said write instruction instruction
According to string, and from described serial data, obtain described setting instruction.
Buffer management method the most according to claim 2, it is characterised in that also include:
By the second data folder described in described smart card application scan and judge in described second data folder
Whether there are those the first temporary files,
Wherein build in described second data folder by being installed on the described smart card application program of described main frame
Found described second temporary file and assign the described serial data of write to the most described by described smart card application program
The said write instruction of logical address is at described second data folder to the step of described memory storage apparatus
Non-it is performed when having those first temporary files.
Buffer management method the most according to claim 1, it is characterised in that also include:
Those companies of those the first temporary files will be stored in the described directory area of corresponding described file system
After described bunch number of continuous bunch is collected under described second data folder, transmits and delete instruction to delete described the
One data folder.
Buffer management method the most according to claim 1, it is characterised in that described main frame leads to
Cross the instruction of transmission read/write and with reading or write described memory storage apparatus, and described read/write refers to
Order includes that described setting instructs.
Buffer management method the most according to claim 1, it is characterised in that also include:
If receive instruction delete those the first temporary files deletion instruction, do not delete those first
Temporary file and transmit error message with respond instruction delete those the first temporary files described deletion refer to
Order.
Buffer management method the most according to claim 1, it is characterised in that also include:
Those companies of those the first temporary files will be stored in the described directory area of corresponding described file system
After described bunch number of continuous bunch is collected under described second data folder, passed by described smart card application program
Send deletion instruction to delete described second temporary file.
9. a memory storage apparatus, it is characterised in that including:
Connect interface unit, be electrically connected to main frame；
Reproducible nonvolatile memorizer module；
Smart card chip；And
Memorizer control circuit unit, is electrically connected to described connection interface unit, duplicative non-volatile
Property memory module and described smart card chip,
Wherein said memorizer control circuit unit is receiving before setting instructs in the first data from described main frame
Setting up multiple first temporary file in folder, wherein those first temporary files are stored to corresponding described storage
Multiple successive clusters of the file system of device storage device, described first data folder is arranged in described duplicative
In non-volatile memory module and the operating system of described main frame cannot access in described first data folder
File；
The wherein said instruction instruction configuration temporary file data folder in the second data folder that sets, described second
Data folder is configured in described reproducible nonvolatile memorizer module and the described operation of described main frame
System can access the file in described second data folder；And
Wherein said memorizer control circuit unit should by storage in the directory area of corresponding described file system
Bunch number being collected under described temporary file data folder of those successive clusters of a little first temporary files.
Memory storage apparatus the most according to claim 9, it is characterised in that described memorizer
Circuit management unit receives write instruction with described the from the smart card application program being installed on described main frame
Setting up the second temporary file in two data folders, wherein said second temporary file is stored to described file system
System bunch,
Wherein said memory circuitry administrative unit receives said write instruction from described smart card application program
With write serial data to logical address, wherein said serial data comprise described set instruction and described logically
Location is corresponding store described second temporary file described bunch.
11. memory storage apparatus according to claim 10, it is characterised in that described memorizer
Circuit management unit comprises described setting according to the described logical address identification of said write instruction instruction and instructs
Described serial data, and obtain from described serial data described set instruction.
12. memory storage apparatus according to claim 10, it is characterised in that described memorizer
Circuit management unit receives scanning signal to scan described second data folder also from described smart card application program
Judge whether described second data folder has those the first temporary files,
Wherein when described second data folder is non-have those first temporary files time, described memory circuitry pipe
Reason unit receives said write from the described smart card application program being installed on described main frame and instructs with described
Second data folder is set up described second temporary file and receives said write from described smart card application program
Instruct to write described serial data to described logical address.
13. memory storage apparatus according to claim 9, it is characterised in that described memorizer
Circuit management unit will store those first temporary files in the described directory area of corresponding described file system
Described bunch number of those successive clusters be collected under described second data folder after, receive from described main frame and delete
Except instruction is to delete described first data folder.
14. memory storage apparatus according to claim 9, it is characterised in that described main frame leads to
Cross the instruction of transmission read/write and with reading or write described memory storage apparatus, and described read/write refers to
Order includes that described setting instructs.
15. memory storage apparatus according to claim 9, it is characterised in that deposit described in if
Memory circuit administrative unit receives instruction from described main frame and deletes the deletion instruction of those the first temporary files
Time, described memory circuitry administrative unit is not deleted those first temporary files and transmits error message extremely
Described main frame deletes the described deletion instruction of those the first temporary files to respond instruction.
16. memory storage apparatus according to claim 9, it is characterised in that described memorizer
Circuit management unit will store those first temporary files in the described directory area of corresponding described file system
Described bunch number of those successive clusters be collected under described second data folder after, apply from described smart card
Program receives deletes instruction to delete described second temporary file.
17. 1 kinds of storage device management systems, it is characterised in that including:
Main frame；And
Memory storage apparatus, has reproducible nonvolatile memorizer module and smart card chip and can
It is electrically connected to described main frame discretely,
Wherein said memory storage apparatus from described main frame receive set instruction before in the first data folder
Setting up multiple first temporary file, wherein those first temporary files are stored to corresponding described memorizer and deposit
Multiple successive clusters of the file system of storage device, it is non-easily that described first data folder is arranged in described duplicative
In the property lost memory module and the operating system of described main frame cannot access the literary composition in described first data folder
Part；
The wherein said instruction instruction configuration temporary file data folder in the second data folder that sets, described second
Data folder is configured in described reproducible nonvolatile memorizer module and the described operation of described main frame
System can access the file in described second data folder；And
Wherein said memory storage apparatus will store in the directory area of corresponding described file system those
Bunch number being collected under described temporary file data folder of those successive clusters of one temporary file.
18. storage device management systems according to claim 17, it is characterised in that described storage
Device storage device receives write instruction with described second from the smart card application program being installed on described main frame
Setting up the second temporary file in data folder, wherein said second temporary file is stored to described file system
Bunch,
Wherein said memory storage apparatus receives said write from described smart card application program and instructs to write
Entering serial data to logical address, wherein said serial data comprises and described sets instruction and described logical address is
Corresponding store described second temporary file described bunch.
19. storage device management systems according to claim 18, it is characterised in that described storage
Device storage device comprises described setting instruction according to the described logical address identification of said write instruction instruction
Described serial data, and from described serial data, obtain described setting instruction.
20. storage device management systems according to claim 18, it is characterised in that described storage
Device storage device receives scanning signal to scan described second data folder and to sentence from described smart card application program
Whether disconnected described second data folder there are those the first temporary files,
Wherein when described second data folder is non-have those first temporary files time, described memorizer storage dress
Put and receive said write instruction with described second from the described smart card application program being installed on described main frame
Data folder is set up described second temporary file and receives said write instruction from described smart card application program
To write described serial data to described logical address.
21. storage device management systems according to claim 17, it is characterised in that described storage
Device storage device will store those the first temporary files in the described directory area of corresponding described file system
After described bunch number of those successive clusters is collected under described second data folder, receives from described main frame and delete
Instruction is to delete described first data folder.
22. storage device management systems according to claim 17, it is characterised in that described main frame
By transmitting read/write instruction to read or to write described memory storage apparatus, and described read/write
Instruction includes that described setting instructs.
23. storage device management systems according to claim 17, it is characterised in that if described
Memory storage apparatus receives instruction from described main frame and deletes the deletion instruction of those the first temporary files
Time, described memory storage apparatus is not deleted those first temporary files and transmits error message to described
Main frame deletes the described deletion instruction of those the first temporary files to respond instruction.
24. storage device management systems according to claim 17, it is characterised in that described storage
Device storage device will store those the first temporary files in the described directory area of corresponding described file system
After described bunch number of those successive clusters is collected under described second data folder, from described smart card application journey
Sequence receives deletes instruction to delete described second temporary file.
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| US20030081938A1 (en) * | 2001-10-01 | 2003-05-01 | Hajime Nishimura | Information processing apparatus, information processing method, recording medium, control |
| US20140156913A1 (en) * | 2012-12-05 | 2014-06-05 | Phison Electronics Corp. | Data processing method, memory controller and memory storage apparatus |
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