CN106154741B - Mask plate, defocus testing method and defocus testing system - Google Patents
Mask plate, defocus testing method and defocus testing system Download PDFInfo
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- CN106154741B CN106154741B CN201510198746.2A CN201510198746A CN106154741B CN 106154741 B CN106154741 B CN 106154741B CN 201510198746 A CN201510198746 A CN 201510198746A CN 106154741 B CN106154741 B CN 106154741B
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Abstract
The invention provides a mask plate, a defocus testing method and a testing system thereof, wherein the mask plate is provided with a testing pattern, and the testing pattern comprises the following components: the reference grating graph group comprises a plurality of first strip graphs which are arranged in parallel; the test grating graph group comprises a plurality of second strip graphs which are arranged in parallel, each second strip graph comprises a reference strip and a plurality of test strips which are arranged in parallel, the width of the first strip graph and the width of the reference strip are larger than the width of each test strip, and the first strip graph and the second strip graph extend along the same direction. By adopting the test pattern provided by the invention, a test structure can be formed on a wafer synchronously with the actually required pattern in actual production. The defocus amount of the wafer can be obtained by testing the position offset between the reference mark and the test mark in the test mark by using the conventional overlay precision measuring equipment.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a mask plate, a defocus testing method and a defocus testing system.
Background
In the semiconductor field, exposure is one of the most important processes. An exposure machine for performing exposure mainly includes a plurality of units such as an illumination unit, a reticle stage, a wafer stage, an alignment system, and a lens system. When an exposure machine is used for carrying out an exposure process, a wafer is placed on a wafer bearing table, a mask plate is placed on the mask bearing table, light is emitted by an illuminating unit, enters a lens system after penetrating through a pattern on the mask plate, and then irradiates the wafer, so that a photoresist material on the wafer is reacted.
Generally, when performing photolithography, the wafer stage is positioned at the optimal focal depth as much as possible, and the wafer on the wafer stage is positioned at the optimal focal depth. However, because the state of each wafer after entering the exposure machine is different, and the distance between each wafer and the lens system of the exposure machine is different, it is difficult to position each wafer at the optimal focal depth. This requires detecting the distance between the wafer and the optimal depth of focus (defocus amount), and adjusting the distance between the wafer and the lens system of the exposure machine according to the defocus amount when the defocus amount is large, so as to ensure that the wafer falls near the optimal depth of focus.
In the prior art, a method of forming an in-line test pattern (inline monitor) on a wafer is generally used to detect the defocus amount of the wafer. Specifically, the online test pattern is a grating-shaped pattern including a plurality of strips arranged side by side. When the wafer is subjected to photoetching, if the wafer is not at the position with the optimal focal depth, the space (CD) among the bars in the graph formed by photoetching the online graph is changed, the space is related to the defocusing amount of the wafer, and the defocusing amount of the wafer can be obtained by measuring the space, so that a reference amount is provided for adjusting the distance between the wafer and an exposure machine lens system when a subsequent wafer is manufactured.
However, the response of the online test pattern to the defocus variation of the wafer is not sensitive enough, the pitch variation between the bars caused by the defocus variation is small, and a CD detection machine (CDSEM) is difficult to capture the pitch variation between the bars caused by the defocus variation, so that the defocus error measured in the prior art is large, and in the photolithography process, the error of adjusting the distance between the wafer and the lens system of the exposure machine according to the defocus is large, and the wafer is not easy to fall near the optimal focal depth.
Disclosure of Invention
The invention aims to provide a mask plate, a defocus quantity testing method and a defocus quantity testing system, which can improve the accuracy of online defocus quantity measurement in actual production.
In order to solve the above problem, the present invention provides a mask plate, which has a test pattern thereon for forming a test structure on a wafer to test a defocus amount of the wafer, wherein the test pattern includes:
the reference grating pattern group comprises a plurality of first strip patterns which are arranged in parallel;
the test grating pattern group comprises a plurality of second strip patterns which are arranged in parallel, the second strip patterns and the first strip patterns extend along the same direction, each second strip pattern comprises a reference strip and a plurality of test strips, the reference strips and the test strips are arranged in parallel, and the width of the reference strips is larger than that of the test strips.
Optionally, the reference grating pattern group and the test grating pattern group are arranged adjacently, and the first strip patterns of the reference grating pattern group and the second strip patterns of the test grating pattern group are arranged along the same straight line in a one-to-one correspondence manner.
Optionally, the first stripe pattern and the second stripe pattern have the same width.
Optionally, the width of the first stripe pattern is the same as the distance between adjacent first stripe patterns.
Optionally, the width of the first stripe patterns is in a range of 12 to 20 micrometers, and a distance between adjacent first stripe patterns is in a range of 12 to 20 micrometers.
Optionally, the width of the test strip is the same as the distance between adjacent test strips.
Optionally, the width of the reference bar is in a range of 4 to 12 micrometers, the width of the test bar is in a range of 4 nm to 12 nm, and the distance between adjacent test bars is in a range of 600 nm to 800 nm.
Optionally, the test pattern includes four groups of reference grating patterns: a first, second, third and fourth reference grating pattern groups;
the test pattern further comprises four test grating pattern groups: the first test grating pattern group, the second test grating pattern group, the third test grating pattern group and the fourth test grating pattern group;
the first reference grating pattern group and the first test grating pattern group are adjacently arranged to form a rectangular first test pattern, the second reference grating pattern group and the second test grating pattern group are adjacently arranged to form a rectangular second test pattern, the third reference grating pattern group and the third test grating pattern group are adjacently arranged to form a rectangular third test pattern, and the fourth reference grating pattern group and the fourth test grating pattern group are adjacently arranged to form a rectangular fourth test pattern;
the first, second, third and fourth test patterns are arranged in a matrix of 2 rows and 2 columns, and in the first and third test patterns, the first strip patterns and the second strip patterns extend along a first direction; in the second and fourth test patterns, the first and second stripe patterns extend in a second direction, and the first direction is orthogonal to the second direction.
Optionally, the mask plate includes a plurality of exposure regions, the exposure regions are used for forming exposure units on the wafer, and the test pattern is disposed on the mask plate at the edge of the exposure regions.
The invention also provides a defocus testing method, which comprises the following steps:
providing a mask plate provided by the invention;
providing a wafer, wherein a photoresist layer is formed on the wafer;
exposing the wafer by using the mask plate to pattern the light resistance layer, and forming a test structure corresponding to a test pattern on the light resistance layer, wherein the test structure comprises:
the reference mark corresponds to the reference grating pattern group and comprises a plurality of first strip-shaped structures corresponding to the first strip-shaped patterns;
the test marks correspond to the test grating pattern groups, each test mark comprises a plurality of second strip-shaped structures corresponding to second strip-shaped patterns, each second strip-shaped structure comprises a reference strip-shaped structure and a plurality of test strip-shaped structures, the reference strip-shaped structures and the plurality of test strip-shaped structures are arranged in parallel, and the width of each reference strip-shaped structure is greater than that of each test strip-shaped structure;
measuring a position offset between the reference mark and the test mark;
and obtaining the defocusing amount of the wafer during exposure according to the position offset.
Optionally, a plurality of test patterns are arranged on the mask plate, and in the step of forming the test structure, a plurality of test structures corresponding to the plurality of test patterns are formed on the photoresist layer;
in the step of measuring the position offset between the reference mark and the test mark, testing the plurality of test structures to obtain a plurality of position offset measurement values;
and in the step of obtaining the defocusing amount, obtaining a plurality of defocusing amount measurement values according to a plurality of position offset measurement values, and taking the average value of the defocusing amount measurement values as the defocusing amount of the wafer during exposure.
Optionally, the mask plate includes a plurality of exposure regions, and each exposure region is used to form a corresponding exposure unit on the wafer;
the test pattern is positioned at the edge of each exposure area, and in the step of patterning the light resistance layer by the mask plate, the test structure is correspondingly formed on the light resistance layer at the edge of each exposure unit;
in the step of measuring the position offset between the reference mark and the test mark, the test structure on each exposure unit is measured, and the position offset measurement value of the test structure on each exposure unit is obtained, so that the defocus amount of each exposure unit during wafer exposure is obtained.
Optionally, in the step of measuring the position deviation amount between the reference mark and the test mark, an overlay accuracy measuring device is used to measure the position deviation amount between the reference mark and the test mark.
Optionally, before exposing the wafer with the mask plate, the method further includes: obtaining a functional relation between the position offset and the defocusing amount through experiments;
in the step of obtaining the defocus amount of the wafer during exposure according to the position offset amount,
and substituting the position offset into the functional relation to obtain the defocusing amount.
The invention also provides a defocus test system, comprising:
the manufacturing method comprises the following steps of forming a wafer, wherein a photoresist layer is formed on the wafer;
the mask plate is arranged in the photoetching equipment and used for patterning the light resistance layer in the process of exposing a wafer and forming a test structure corresponding to a test pattern on the light resistance layer, and the test structure comprises:
the reference mark corresponds to the reference grating pattern group and comprises a plurality of first strip-shaped structures corresponding to the first strip-shaped patterns;
the test marks correspond to the test grating pattern groups, each test mark comprises a plurality of second strip-shaped structures corresponding to second strip-shaped patterns, each second strip-shaped structure comprises a reference strip-shaped structure and a plurality of test strip-shaped structures, the reference strip-shaped structures and the plurality of test strip-shaped structures are arranged in parallel, and the width of each reference strip-shaped structure is greater than that of each test strip-shaped structure;
a measuring unit for measuring a position deviation amount between the reference mark and the test mark;
and the calculating unit is used for calculating the defocusing amount of the wafer in the photoetching equipment according to the position offset between the reference mark and the test mark.
Optionally, the mask plate includes a plurality of exposure regions, and each exposure region is used to form a corresponding exposure unit on the wafer;
the test pattern is positioned at the edge of each exposure area and used for correspondingly forming the test structure on the photoresist layer at the edge of each exposure unit in the step of patterning the photoresist layer by the mask plate;
in the step of measuring the position offset between the reference mark and the test mark, the measuring unit is used for measuring the test structure on each exposure unit to obtain a position offset measurement value of the test structure on each exposure unit, so as to obtain the defocus amount of each exposure unit during wafer exposure.
Optionally, the test system further includes: a storage unit for storing a functional relationship between the amount of positional shift and the defocus amount obtained by experiment.
Optionally, the measuring unit is an overlay accuracy measuring device.
Compared with the prior art, the technical scheme of the invention has the following advantages: by adopting the mask plate provided by the invention, a test structure can be synchronously formed on a wafer and an actual functional device in actual production. The existing overlay precision measuring equipment can be adopted to test the position offset between the reference mark and the test mark in the test mark, and the defocusing amount of the wafer can be obtained.
The mask plate comprises a test pattern, and the test pattern comprises: a reference grating pattern group for forming a reference mark; and the test grating pattern group is used for forming a test mark, and the reference mark and the test mark form the test structure. The test grating pattern group comprises a plurality of second strip patterns which are arranged in parallel, each second strip pattern comprises a reference strip and a plurality of test strips, the reference strip is used for forming a reference strip structure, the test strips are used for forming a test strip structure, the reference strip and the test strips are arranged in parallel, the width of the reference strip is larger than that of the test strips, therefore, the width of the reference strip structure is larger than that of the test strip structure, when a wafer is not exposed at the optimal focal depth, the top size of the test strip structure is reduced, and the top size of the reference strip structure and the top size of the first strip structure are not obviously changed. When the alignment precision measuring equipment is used for testing the position offset between the reference mark and the test mark, the position measured value of the reference mark obtained by the alignment precision measuring equipment does not offset, the obtained position measured value of the test mark can offset, and further the position offset between the reference mark and the test mark changes. The change of the top shape of the test strip-shaped structure is easily recognized by the overlay precision measuring equipment, so that the response of the position offset to the defocusing amount change of the wafer is sensitive, the test precision of the position offset is high, and the measurement precision of the defocusing amount is improved.
Drawings
FIGS. 1 and 2 are schematic views of a mask according to an embodiment of the present invention;
FIG. 3 is a diagram showing a distribution of test patterns on the mask blank shown in FIG. 1;
FIG. 4 is a schematic view of another embodiment of a masking plate of the present invention;
FIGS. 5-9 are schematic diagrams illustrating an embodiment of a defocus amount test method according to the present invention;
FIG. 10 is a diagram of an embodiment of a defocus amount test system of the present invention.
Detailed Description
In the prior art, the accuracy of online testing the defocusing amount of the wafer is poor during wafer exposure.
In order to solve the above technical problem, the present invention provides a mask plate. The mask plate comprises a test pattern, and the test pattern comprises: a reference grating pattern group for forming a reference mark; and the test grating pattern group is used for forming a test mark, and the reference mark and the test mark form the test structure. The test grating pattern group comprises a plurality of second strip patterns which are arranged in parallel, each second strip pattern comprises a reference strip and a plurality of test strips, the reference strip is used for forming a reference strip structure, the test strips are used for forming a test strip structure, the reference strip and the test strips are arranged in parallel, the width of the reference strip is larger than that of the test strips, therefore, the width of the reference strip structure is larger than that of the test strip structure, when a wafer is not exposed at the optimal focal depth, the top size of the test strip structure is reduced, and the top size of the reference strip structure and the top size of the first strip structure are not obviously changed. When the alignment precision measuring equipment is used for testing the position offset between the reference mark and the test mark, the position measured value of the reference mark obtained by the alignment precision measuring equipment does not offset, the obtained position measured value of the test mark can offset, and further the position offset between the reference mark and the test mark changes. The change of the top shape of the test strip-shaped structure is easily recognized by the overlay precision measuring equipment, so that the response of the position offset to the defocusing amount change of the wafer is sensitive, the test precision of the position offset is high, and the measurement precision of the defocusing amount is improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Referring to fig. 1 and 2, schematic diagrams of an embodiment of the masking plate of the present invention are shown.
The mask plate 700 provided by the present embodiment is used to form a test structure on a wafer to test the defocus amount of the wafer. The mask plate 700 has a test pattern thereon, and the test pattern includes:
a first reference grating pattern group 11, wherein the first reference grating pattern group 11 includes a plurality of first stripe patterns 01 arranged in parallel.
The first test grating pattern group 12 includes a plurality of second strip patterns 02 arranged in parallel, and the first strip patterns 01 and the second strip patterns 02 extend in the same direction.
Fig. 2 is an enlarged view of the first test grating pattern group 12 in fig. 1, and as shown in fig. 2, each of the second bar patterns 02 includes a reference bar 201 and a plurality of test bars 202 arranged in parallel, where the width of the reference bar 201 is greater than the width of the test bars 202.
In this embodiment, the mask plate 700 is used for exposing a photoresist layer on a wafer in an exposure machine, and after exposure and development are performed on the photoresist layer on the wafer by using the mask plate 700 of this embodiment, the photoresist layer is patterned to form a test structure corresponding to a test pattern, where the test structure includes:
a reference mark corresponding to the first reference grating pattern group 11, the reference mark including a plurality of first bar-shaped structures corresponding to the first bar-shaped patterns 01.
The test mark corresponding to the first test grating pattern group 12 includes a plurality of second bar structures corresponding to the second bar patterns 02, each of the second bar structures includes a reference bar structure and a plurality of test bar structures arranged in parallel, and the width of the reference bar structure is greater than that of the test bar structures.
The reference strip-shaped structure is formed by exposing and developing the reference strip-shaped 201 in the test pattern, and the test strip-shaped structure is formed by exposing and developing the test strip-shaped 202 in the test pattern.
The method for forming the photoresist pattern on the wafer includes: coating a photoresist layer on a wafer, putting the wafer into an exposure machine, exposing and developing the photoresist layer by adopting a mask plate pattern, and patterning the photoresist layer to form a photoresist pattern. When exposure is carried out through a mask plate pattern in an exposure machine, the larger the size of the mask plate pattern is, the larger the depth of field of the mask plate pattern is. That is, when the defocus amount of the wafer is increased, the mask plate pattern with larger size can form a clearer image on the photoresist layer, and the obtained photoresist pattern has better appearance; the smaller mask plate pattern forms a fuzzy image on the photoresist layer, the obtained photoresist pattern has a poor appearance, particularly the top of the photoresist pattern shrinks, and the top of the photoresist pattern is smaller than the bottom.
Therefore, when the mask plate of the embodiment is used for exposing and developing the photoresist layer on the wafer, under the condition that the wafer is exposed at the best focal depth, the defocusing amount of the wafer is 0, so that the obtained reference strip-shaped structure and the test strip-shaped structure have better appearances, the top width and the bottom width of the reference strip-shaped structure are basically the same, and the top width and the bottom width of the test strip-shaped structure are also basically the same. When the alignment precision measuring equipment is used for testing the position offset between the reference mark and the test mark, the position measurement values of the reference mark and the test mark, which are obtained by the alignment precision measuring equipment, do not offset, and the obtained position offset is an accurate value, namely the position offset between the reference mark and the test mark is a pre-designed value. When the position coordinates of the reference mark and the test mark in the same direction are the same, the obtained position offset is 0.
During exposure, if the wafer is not at the optimal focal depth, the top size of the test strip-shaped structure formed after development is obviously reduced, and the top sizes of the reference strip-shaped structure and the first strip-shaped structure are not obviously changed. When the alignment precision measuring equipment is used for testing the position offset between the reference mark and the test mark, the position measured value of the reference mark obtained by the alignment precision measuring equipment does not offset, and the obtained position measured value of the test mark can offset.
Specifically, the test structure formed on the wafer is actually a photoresist pattern, and the principle of the overlay accuracy measurement device detecting the position of the photoresist pattern is as follows: the overlay accuracy measuring equipment is used for detecting light reflected by the photoresist pattern on the wafer to obtain the position of the photoresist pattern. Because the size of the top of the test strip-shaped structure is obviously reduced, when the test mark is measured, the overlay precision measuring equipment receives less reflected light of the test strip-shaped structure and more reflected light of the reference strip-shaped structure, so that the position measurement value of the second strip-shaped structure is obtained and deviates to the position of the reference strip-shaped structure.
And processing the measured values of the plurality of second strip-shaped structure positions detected by the overlay accuracy measuring equipment to obtain the measured values of the test mark positions, wherein the positions of the second strip-shaped structures deviate towards the position of the reference strip-shaped structure to cause the test mark positions to change, and further cause the position offset between the reference mark and the test mark to change.
By establishing the functional relationship between the position offset and the defocus amount, the defocus amount of the wafer can be conveniently obtained by adopting a method for measuring the position offset, and the state of other subsequent wafers in the exposure machine can be adjusted according to the defocus amount, for example: by adjusting the distance between the wafer and the mask plate, the subsequent wafer can be positioned near the optimal focal depth, and the quality of the semiconductor device on the subsequent wafer is further effectively improved.
Therefore, the mask plate provided by the invention can form a test structure on a wafer synchronously with the actually required pattern in actual production. The defocus amount of the wafer can be obtained by testing the position offset between the reference mark and the test mark in the test structure by using the conventional overlay precision measurement equipment. In the manufacturing of each batch of wafers, the defocusing amount of the previous wafer is obtained according to the test result of the test structure on the previous wafer, and the state of the subsequent wafer in the exposure machine is correspondingly adjusted, so that the whole batch of wafers are positioned near the optimal focal depth during exposure, and the quality of semiconductor devices on the whole batch of wafers is effectively improved.
When the top dimension of the test strip-shaped structure changes, the measured value of the position of the second strip-shaped structure, which is obtained by the alignment precision measuring equipment, is easily deviated to the position of the reference strip-shaped structure, so that the response of the position deviation amount between the reference mark and the test mark to the defocusing amount change of the wafer is sensitive, the test precision of the position deviation amount between the reference mark and the test mark is higher, and the measurement precision of the defocusing amount is further improved.
It should be noted that, since the top width of the test bar-shaped structure is easily reduced due to the defocus amount, when the wafer is not at the optimal focal depth, the position offset between the reference mark and the test mark is along the width direction of the test bar-shaped structure, i.e. along the width direction of the first bar-shaped pattern 01 and the second bar-shaped pattern 02.
In this embodiment, the mask plate 700 is applied to an exposure machine with a mask plate to wafer size ratio of 4:1, and the size ratio of the mask plate pattern on the mask plate to the photoresist pattern formed on the wafer is 4: 1.
It should be noted that the size of the mask pattern is proportional to the depth of field of the mask pattern. Specifically, with an exposure machine with a mask plate and wafer size ratio of 4:1, which is commonly used in the current photolithography process, when the size of a mask plate pattern is 16 micrometers, the depth of field of the mask plate pattern is about 60 micrometers, when the size of the mask plate pattern is 720 nanometers, the defocus amount of the mask plate pattern is about 30 micrometers, that is, when the defocus amount of the mask plate pattern with the size of 16 micrometers is 60 micrometers, the image on the photoresist layer is clearer, and when the defocus amount of the mask plate pattern with the size of 720 nanometers is 30 micrometers, the image on the photoresist layer is clearer. Under the same defocus amount, the photoresist pattern formed by the mask pattern with the size of 16 microns is good in appearance, and the photoresist pattern formed by the mask pattern with the size of 720 nanometers is easy to deform.
In this embodiment, the width of the first stripe patterns 01 is 16 microns, the distance between adjacent first stripe patterns 01 is 16 microns, and the width of the reference stripe 201 is 8 microns. Since the mask blank 700 of this embodiment is applied to a size system in which the ratio of the mask blank to the wafer size is 4:1, after the mask blank 700 of this embodiment is used to perform exposure and development on the photoresist layer on the wafer, the width of the first stripe structure formed corresponding to the first stripe pattern 01 is 4 micrometers, and the width of the reference stripe structure formed corresponding to the reference stripe 201 is 2 micrometers. When the width of the first stripe pattern 01 is 16 micrometers and the width of the reference stripe 201 is 8 micrometers, the correspondingly formed first stripe structure and the top of the reference stripe structure are less prone to deformation due to the change of defocus.
However, the widths of the first stripe patterns 01, the reference stripe 201, and the interval between adjacent first stripe patterns 01 are not limited in the present invention, and in other embodiments, the widths of the first stripe patterns may be in the range of 12 to 20 micrometers, the interval between adjacent first stripe patterns may be in the range of 12 to 20 micrometers, and the widths of the reference stripes may be in the range of 4 to 12 micrometers.
In this embodiment, the width of the test strip 202 is 720 nm, the design pitch between the test strips 202 is 720 nm, the width of the test strip structure correspondingly formed by the test strips 202 is 180 nm, and the pitch is 180 nm. When the width of the test strip 202 is 720 nm, the top of the correspondingly formed test strip 202 is more easily deformed due to the variation of the defocus amount.
The width of the test strips is not limited by the present invention, however, in other embodiments, the width of the test strips may be in the range of 4 nm to 12 nm, and the spacing between adjacent test strips may be in the range of 600 nm to 800 nm.
In this embodiment, the width of the first stripe pattern 01 is the same as the distance between adjacent first stripe patterns 01, and the width of the test stripe 202 is the same as the distance between adjacent test stripes 202, such mask pattern design is simple and difficult, the formed photoresist pattern has a regular structure, and measurement is facilitated. However, the present invention does not limit whether the width of the first stripe pattern 01 is the same as the interval between adjacent first stripe patterns 01, and whether the width of the test stripe 202 is the same as the interval between adjacent test stripes 202.
In this embodiment, the first reference grating pattern group 11 and the first test grating pattern group 12 are arranged adjacently, and each of the first stripe patterns 01 and each of the second stripe patterns 02 are arranged along the same straight line in a one-to-one correspondence. The method has the advantages that when the wafer is positioned at the optimal focal depth, the first strip-shaped structures and the second strip-shaped structures which are respectively and correspondingly formed by the first strip-shaped patterns 01 and the second strip-shaped patterns 02 are arranged along the same straight line in a one-to-one correspondence manner, the position coordinates of the reference marks and the test marks in the width direction of the first strip-shaped structures are the same, and the obtained position offset is 0; when the wafer is not at the optimal focal depth, the position offset between the reference mark and the test mark is increased, so that the functional relation between the obtained position offset and the defocus amount is simpler and is convenient to calculate.
Referring to fig. 3, a distribution diagram of test patterns on a mask plate 700 of this embodiment is shown, as shown in fig. 3, in this embodiment, the mask plate 700 includes a plurality of exposure regions 701, the exposure regions 701 are used to form exposure units on a wafer, and the test patterns are disposed on the mask plate 700 at the edges of the exposure regions. In this embodiment, three test patterns are arranged outside the edge of each exposure area 701, but the number of the first test patterns 10 outside the edge of each exposure area 701 is not limited in the present invention. This is advantageous in that the plurality of exposure regions 701 correspondingly form a plurality of exposure units on the wafer, and a plurality of first test patterns 10 are formed outside the edge of each exposure region 701, so that a plurality of test structures can be formed around each exposure unit, so as to measure the defocus amount of each exposure unit during wafer exposure.
Referring to fig. 4, a schematic diagram of another embodiment of the masking plate of the present invention is shown.
The test pattern on the mask plate of this embodiment includes four reference grating pattern groups: a first reference grating pattern group 11, a second reference grating pattern group 21, a third reference grating pattern group 31 and a fourth reference grating pattern group 41.
The test pattern further comprises four test grating pattern groups: a first test grating pattern group 12, a second test grating pattern group 22, a third test grating pattern group 32 and a fourth test grating pattern group 42.
Each of the reference grating pattern groups is adjacent to one of the test grating pattern groups, the first reference grating pattern group 11 and the first test grating pattern group 12 are arranged adjacent to each other to form a rectangular first test pattern 10, the second reference grating pattern group 21 and the second test grating pattern group 22 are arranged adjacent to each other to form a rectangular second test pattern 20, the third reference grating pattern group 31 and the third test grating pattern group 32 are arranged adjacent to each other to form a rectangular third test pattern 30, and the fourth reference grating pattern group 41 and the fourth test grating pattern group 42 are arranged adjacent to each other to form a rectangular fourth test pattern 40.
The first, second, third and fourth test patterns 10, 20, 30 and 40 are arranged in a matrix of 2 rows and 2 columns, in the first and third test patterns 10 and 40, the first reference grating pattern group 11, the first test grating pattern group 12, the third reference grating pattern group 31 and the third test grating pattern group 32 extend in a first direction (YY 'direction in the drawing), in the second and fourth test patterns, the second reference grating pattern group 21, the second test grating pattern group 22, the fourth reference grating pattern group 41 and the fourth test grating pattern group 42 extend in a second direction (XX' direction in fig. 4), the first direction is orthogonal to the second direction, and the first, second, third and fourth test patterns 10, 20, 30 and 40 are centrally symmetrical about a center.
In this embodiment, the first test pattern 10 can form a first test structure on the photoresist layer, the second test pattern 20 can form a second test structure on the photoresist layer, the third test pattern 30 can form a third test structure on the photoresist layer, and the fourth test pattern 40 can form a fourth test structure on the photoresist layer.
The first, second, third and fourth test structures all comprise a plurality of first strip-shaped structures and second strip-shaped structures which are arranged in parallel. Wherein the first and second stripe structures of the first and third test structures extend in a first direction, and the first and second stripe structures of the first and third test structures extend in a second direction, respectively, in a width direction thereof, so that a position deviation amount between the reference mark and the test mark caused by the defocus amount in the first and third test structures is in the second direction. The first and second bar structures of the second and fourth test structures extend in the second direction, and the first and second bar structures of the second and fourth test structures extend in the first direction in the width direction, so that the amount of positional shift between the reference mark and the test mark according to the defocus amount in the second and fourth test structures is in the first direction.
According to the amounts of positional deviation in the first direction and the second direction, respectively, a more accurate defocus amount can be obtained.
The invention also provides a defocus testing method, which comprises the following steps:
a lithographic apparatus is provided.
And providing a mask plate, wherein the mask plate is provided with the test pattern provided by the invention.
A wafer is provided, and a photoresist layer is formed on the wafer.
Exposing the mask plate to pattern the light resistance layer and form a test structure corresponding to a test pattern on the light resistance layer, wherein the test structure comprises:
the reference mark corresponds to the reference grating pattern group and comprises a plurality of first strip-shaped structures corresponding to the first strip-shaped patterns;
the test marks correspond to the test grating pattern groups, each test mark comprises a plurality of second strip-shaped structures corresponding to second strip-shaped patterns, each second strip-shaped structure comprises a reference strip-shaped structure and a plurality of test strip-shaped structures which are arranged in parallel, and the width of each reference strip-shaped structure is greater than that of each test strip-shaped structure;
measuring a position offset between the reference mark and the test mark;
and obtaining the defocusing amount of the wafer during exposure according to the position offset.
Referring to fig. 5 to 9, schematic diagrams of an embodiment of the defocus amount test method of the present invention are shown. Referring first to fig. 5, the method for testing defocus amount of the present embodiment includes:
a mask plate 700 according to a first embodiment of the present invention is provided.
With continued reference to fig. 5, a wafer 500 is provided, the wafer 500 having a photoresist layer 600 formed thereon.
The mask plate 700 is used to pattern the photoresist layer 600, and a test structure corresponding to a test pattern is formed on the photoresist layer 600. In this embodiment, specifically, the step of patterning the photoresist layer 600 includes: the wafer 500 is exposed in a lithography apparatus, and then the photoresist layer 600 is developed, forming a first test structure on the photoresist layer 600.
In this embodiment, since the mask is the mask 700 provided in the first embodiment of the present invention, reference may be continued to fig. 1 and fig. 2, and the test pattern includes:
a first reference grating pattern group 11, wherein the first reference grating pattern group 11 includes a plurality of first stripe patterns 01 arranged in parallel.
The first test grating pattern group 12 includes a plurality of second strip patterns 02 arranged in parallel, and the first strip patterns 01 and the second strip patterns 02 extend in the same direction.
As shown in fig. 2, each of the second stripe patterns 02 includes a reference stripe 201 and a plurality of test stripes 202 arranged in parallel, where the width of the reference stripe 201 is greater than the width of the test stripes 202.
Referring to fig. 6, a schematic diagram of a first test structure formed by the test method of the present embodiment is shown, and referring to fig. 1 in combination, the first test structure includes:
the fiducial mark 110 corresponding to the first fiducial grating pattern group 11, the fiducial mark 110 including a plurality of first bar structures 101 corresponding to the first bar patterns 01.
A test mark 120 corresponding to the first test grating pattern group 12, the test mark 120 comprising a plurality of second bar structures 102 corresponding to the second bar patterns 02.
Referring to fig. 7 in combination with fig. 2, each of the second strip structures 102 includes a reference strip structure 1021 and a plurality of test strip structures 1022 arranged in parallel, and widths of the first strip structure 101 and the reference strip structure 1021 are greater than widths of the test strip structures 1022.
In this embodiment, after the reference mark 110 and the test mark 120 are formed, an overlay accuracy measuring device is used to measure a position offset between the reference mark 110 and the test mark 120, and a defocus amount of the wafer during exposure is obtained according to the position offset.
When a photoresist pattern is formed in an exposure machine through exposure and development of a mask plate pattern, the larger the size of the mask plate pattern is, the larger the depth of field of the mask plate pattern is. That is, when the defocus amount of the wafer is increased, the mask plate pattern with larger size can form a clearer image on the photoresist layer, and the obtained photoresist pattern has better appearance; the smaller mask plate pattern forms a fuzzy image on the photoresist layer, the obtained photoresist pattern has a poorer appearance, which is expressed by the shrinkage of the top of the photoresist pattern, and the size of the top of the photoresist pattern is smaller than that of the bottom of the photoresist pattern.
Referring collectively to fig. 8, a cross-sectional view is shown of the resulting reference stripe structures 1021 and test stripe structures 1022 when the wafer is exposed at the best depth of focus (as at dashed line 501 in fig. 5). At the optimal depth of focus, the defocus amount of the wafer is 0, so the features of the obtained reference bar structures 1021 and the obtained test bar structures 1022 are both good, the top widths and the bottom widths of the reference bar structures 1021 are substantially the same, and the top widths and the bottom widths of the test bar structures 1022 are also substantially the same.
When the positional offset between the reference mark 110 and the test mark 120 is measured using an overlay accuracy measuring apparatus, the measured value of the position of the second bar-shaped structure 102 is at the center position of the second bar-shaped structure 102 (the obtained measured value of the position of the second bar-shaped structure 102 is shown by an arrow in fig. 8). The positions of the reference mark 110 and the test mark 120 obtained by the overlay accuracy measuring equipment do not deviate, and the obtained position deviation amount is an accurate value, that is, the position deviation amount between the reference mark 110 and the test mark 120 is a pre-designed value. When the position coordinates of the reference mark 110 and the test mark 120 in the same direction are the same, the resulting position deviation amount is 0.
Referring collectively to fig. 9, a cross-sectional view is shown of the resulting reference stripe structures 1021 and test stripe structures 1022 when the wafer is not exposed at the optimal depth of focus (as at dashed line 502 or dashed line 503 in fig. 5). When the wafer is not exposed at the optimal depth of focus, the top dimensions of the test strip structures 1022 are obtained with a relatively significant reduction, while the top dimensions of the reference strip structures 1021 and the first strip structures 101 (not shown in fig. 9) do not change significantly.
When the alignment precision measuring equipment is used for testing the position offset between the reference mark and the test mark, the measured value of the position of the reference mark 110 obtained by the alignment precision measuring equipment does not deviate, and the measured value of the position of the test mark 120 obtained by the alignment precision measuring equipment deviates.
Specifically, the overlay accuracy measuring device detects light reflected by a photoresist pattern on a wafer to obtain the position of the photoresist pattern. Since the top dimension of the test strip structure 1022 is significantly reduced, the overlay accuracy measuring apparatus receives less reflected light from the test strip structure 1022 and more reflected light from the reference strip structure 1021, and the obtained measured value of the position of the second strip structure 102 is shifted toward the position of the reference strip structure 1021 (the obtained measured value of the position of the second strip structure 102 is shown by an arrow in fig. 9), that is, the measured value of the position of the test mark 120 is shifted, so that the measured values of the positions of the reference mark 110 and the test mark 120 detected by the overlay accuracy measuring apparatus generate a position shift amount.
The measured values of the positions of the plurality of second bar structures 102 detected by the overlay accuracy measuring apparatus are processed to obtain the position measured value of the test mark 120, and the position measured value of the second bar structure 102 deviates to the reference bar structure 1021, which causes the measured value of the position of the test mark 120 to change, and further causes the position deviation between the reference mark 110 and the test mark 120 to change.
In the present embodiment, the functional relationship between the amount of positional deviation and the defocus amount can be obtained through experiments. By establishing the functional relationship between the position offset and the defocus amount between the reference mark 110 and the test mark 120, the defocus amount of the wafer can be conveniently obtained by adopting a method for measuring the position offset, and the state of other subsequent wafers in the exposure machine, such as the distance between the wafer and the mask plate, can be adjusted according to the defocus amount, so that the subsequent wafers are positioned near the optimal focus depth, and the quality of semiconductor devices on the subsequent wafers is effectively improved.
Therefore, the test method of the defocus amount provided by the invention can form a test structure on a wafer synchronously with the actually required pattern in actual production. The defocus amount of the wafer can be obtained by testing the position offset between the reference mark 110 and the test mark 120 in the test structure by using the existing overlay accuracy measurement equipment. In the manufacturing of each batch of wafers, the defocusing amount of the previous wafer is obtained according to the test result of the test mark on the previous wafer, and the state of the subsequent wafer in the exposure machine is correspondingly adjusted, so that the whole batch of wafers are positioned near the optimal focal depth during exposure, and the quality of semiconductor devices on the whole batch of wafers is effectively improved.
The change of the top dimension of the test bar 1022 easily causes the measured value of the position of the second bar 102 obtained by the overlay accuracy measuring apparatus to shift to the position of the reference bar 1021, so that the response of the position shift amount between the reference mark 110 and the test mark 120 to the defocus amount change of the wafer is sensitive, the test accuracy of the position shift amount between the reference mark 110 and the test mark 120 is high, and the measurement accuracy of the defocus amount is further improved.
It should be noted that, since the top width of the test bar-shaped structure 1022 is likely to become smaller due to the increased defocus amount, when the wafer is not at the optimal focal depth, the position offset between the reference mark and the test mark is along the width direction of the test bar-shaped structure 1022, i.e., along the width direction of the first bar-shaped pattern 01 and the second bar-shaped pattern 02.
In this embodiment, the width of the first stripe pattern 01 is 16 micrometers, the width of the reference stripe 201 is 8 micrometers, the distance between the first stripe patterns 01 is 16 micrometers, the width of the first stripe structure 101 correspondingly formed by the first stripe patterns 01 is 4 micrometers, the width of the reference stripe structure 1021 correspondingly formed by the reference stripe 201 is 2 micrometers, and the distance between the first stripe structures 101 is 4 micrometers.
The width of the test strip 202 is 720 nm, the distance between the test strips 202 is 720 nm, the width of the test strip structure 1022 correspondingly formed by the test strips 202 is 180 nm, and the distance is 180 nm.
It should be noted that the size of the mask pattern is proportional to the depth of field of the mask pattern. Specifically, with an exposure machine with a mask plate and wafer size ratio of 4:1, which is commonly used in the current photolithography process, when the size of a mask plate pattern is 4 micrometers, the depth of field of the mask plate pattern is about 60 micrometers, when the size of the mask plate pattern is 180 nanometers, the defocus amount of the mask plate pattern is about 30 micrometers, that is, when the defocus amount of the mask plate pattern with the size of 4 micrometers is 60 micrometers, the image on the photoresist layer is clearer, and when the defocus amount of the mask plate pattern with the size of 180 nanometers is 30 micrometers, the image on the photoresist layer is clearer. Under the same defocus amount, the photoresist pattern formed by the mask pattern with the size of 4 microns is better in appearance, and the photoresist pattern formed by the mask pattern with the size of 180 nanometers is easy to deform.
The width and the pitch of the first stripe structures 101, the reference stripe structures 1021 and the test stripe structures 1022 are not limited in the present invention, and alternatively, the width of the first stripe structures 101 may be in the range of 3 to 5 micrometers, the pitch between the plurality of first stripe structures 101 may be in the range of 3 to 5 micrometers, the width of the reference stripe structures 1021 may be in the range of 1 to 3 micrometers, the width of the test stripe structures 1022 may be in the range of 150 nm to 200 nm, and the pitch between the plurality of test stripes 202 may be in the range of 150 nm to 200 nm.
The width of the first strip-shaped patterns 01 is the same as the distance between the first strip-shaped patterns 01, the width of the test strips 202 is the same as the distance between the test strips 202, the design of the mask plate patterns is simple and convenient and is not easy, and the formed photoresist patterns have regular structures and are convenient to measure. However, the present invention does not limit whether the width of the first stripe pattern 01 is the same as the distance between the plurality of first stripe patterns 01, and whether the width of the test stripe 202 is the same as the distance between the plurality of test stripes 202.
It should be noted that, in this embodiment, the mask plate has a plurality of test patterns, a plurality of test structures are correspondingly formed on the photoresist layer, and in the step of testing the position offset between the reference mark 110 and the test mark 120, the plurality of test structures are tested to obtain a plurality of position offset measurement values, so as to obtain a plurality of defocus measurement values. Then, an average value of the defocus measurement values may be used as a defocus amount of the wafer during exposure, and used as a reference value for adjusting the wafer position.
It should be noted that, in this embodiment, the wafer includes a plurality of exposure units (die), the exposure units are correspondingly formed by exposure areas on the mask plate 700, and in the step of patterning the photoresist layer by using the mask plate 700, the test structure is formed outside the edge of each exposure unit.
Specifically, in this embodiment, the mask blank 700 is the mask blank 700 in the first embodiment of the mask blank provided by the present invention, and with reference to fig. 3, the mask blank 700 includes a plurality of exposure regions 701, and three first test patterns 10 are disposed outside the edge of each exposure region 701, so that three test structures are formed outside the edge of each exposure unit.
In the step of measuring the position offset between the reference mark and the test mark, the test structure on each exposure unit may be tested to obtain the position offset measurement values of the three test structures on each exposure unit, and obtain an average value of the position offset measurement values of the three test structures, and the average value is substituted into a functional relationship between the position offset and the defocus amount, so as to obtain the defocus amount of each exposure unit at the position of the wafer during exposure.
In the step of adjusting the state of the subsequent wafer in the exposure machine according to the defocus amount, the state of the subsequent wafer in the exposure machine is adjusted according to the defocus amount of each exposure unit during the wafer exposure, so that each corresponding exposure unit in the subsequent wafer can be in the vicinity of the optimal focal depth during the wafer exposure, and the semiconductor device on each exposure unit can be better in quality.
It should be noted that, in other embodiments, in the step of adjusting the state of the subsequent wafer in the exposure machine according to the defocus amount, the state of the subsequent wafer in the exposure machine may also be adjusted according to an average value of the defocus amount measurements of all the exposure units, for example, the position of the subsequent wafer in the direction perpendicular to the mask plate 700 enables the subsequent wafer to be located near the optimal depth of focus, and such step of adjusting the state of the subsequent wafer is relatively simple and easy to operate.
The invention also provides a defocusing amount test system which can be used for but is not limited to the test method provided by the invention.
Fig. 10 is a schematic diagram of an embodiment of a defocus test system according to the present invention, and referring to fig. 10, in the embodiment, the test system includes:
a wafer 500 ', in this embodiment, a photoresist layer 600 ' is formed on the wafer 500 '.
The lithographic apparatus 800, in this embodiment, the lithographic apparatus 800 comprises an exposure apparatus and a development apparatus.
The mask blank 700 ' provided by the invention comprises a test pattern, and the mask blank 700 ' is arranged in the lithography equipment 800 and used for patterning the photoresist layer 600 ' in the process of exposing the wafer 500 ' to form a test structure corresponding to the test pattern on the photoresist layer 600 '. In this embodiment, the mask plate is the mask plate 700' provided in the first embodiment of the mask plate of the present invention.
In this embodiment, in the photolithography apparatus, the mask plate 700 ' is used to pattern the photoresist layer 600 ', so that a test structure corresponding to a test pattern can be formed on the photoresist layer 600 '. The test structure includes a fiducial mark and a test mark. The test structure includes:
the reference mark corresponds to the reference grating pattern group and comprises a plurality of first strip-shaped structures corresponding to the first strip-shaped patterns;
the test mark of corresponding test grating pattern group, the test mark includes a plurality of second bar structures that correspond second bar graph, every a benchmark bar structure and a plurality of test bar structure that second bar structure includes, benchmark bar structure with a plurality of test bar structure parallel arrangement, the width of benchmark bar structure is greater than the width of test bar structure.
In this embodiment, the test system further includes:
and a measurement unit 801 connected to the lithography apparatus 800, for measuring a position offset between the reference mark and the test mark on the wafer. In this embodiment, the measuring unit is an overlay accuracy measuring device.
A storage unit 803 for storing a functional relationship between the amount of positional shift and the defocus amount obtained by experiment.
And a calculating unit 802 connected to the measuring unit 801 and the storage unit 803, and configured to calculate a defocus amount of the wafer in the lithography apparatus according to a position offset between the reference mark and the test mark.
When exposure is performed in the lithography apparatus, if the wafer 500' is not at the optimal depth of focus, the top size of the test stripe structure formed after development is significantly reduced, while the top sizes of the reference stripe structure and the first stripe structure are not significantly changed. When the alignment precision measuring equipment is used for testing the position offset between the reference mark and the test mark, the position measured value of the reference mark obtained by the alignment precision measuring equipment does not offset, the obtained position measured value of the test mark can offset, and the position offset is changed.
The storage unit 803 of the test system of this embodiment stores the function relationship between the position offset and the defocus amount obtained through experiments, and the calculation unit 802 can calculate the defocus amount of the wafer in the lithography apparatus according to the position offset measured by the measurement unit 801 and by calling the function relationship in the storage unit 803.
It should be noted that, whether the storage unit 803 is included is not limited in the present invention, and in other embodiments, the storage unit 803 may not be included. The calculation unit 802 may directly calculate the defocus amount according to the position offset.
The test system can be used for the method for measuring the defocusing amount, and the test system is integrated with a calculation unit for calculating the defocusing amount, so that the test method for the defocusing amount provided by the invention can be conveniently implemented, the defocusing amount of the wafer is obtained, and the state of the subsequent wafer in the exposure machine is correspondingly adjusted according to the defocusing amount, so that the whole batch of wafers are in the vicinity of the optimal focal depth during exposure, and the quality of semiconductor devices on the whole batch of wafers is effectively improved.
It should be noted that, in this embodiment, the mask plate 700 'includes a plurality of exposure regions, and each exposure region is used to form a corresponding exposure unit on the wafer 500'; the test pattern is located at the edge of each exposure area, and in the step of patterning the photoresist layer by the mask plate, the test structure is correspondingly formed on the photoresist layer 600' at the edge of each exposure unit.
In the step of measuring the position offset between the reference mark and the test mark, the test structure on each exposure unit is measured, and the position offset measurement value of the test structure on each exposure unit is obtained, so that the defocus amount of each exposure unit during wafer exposure is obtained.
In the step of adjusting the state of the subsequent wafer in the exposure machine according to the defocus amount, the state of the subsequent wafer in the exposure machine is adjusted according to the defocus amount of each exposure unit during the wafer exposure, so that each corresponding exposure unit in the subsequent wafer can be in the vicinity of the optimal focal depth during the wafer exposure, and the semiconductor device on each exposure unit can be better in quality.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (21)
1. A method for measuring defocus, comprising:
providing a mask plate, wherein the mask plate is provided with a test pattern and used for forming a test structure on a wafer so as to test the defocusing amount of the wafer; the test pattern includes: the reference grating pattern group comprises a plurality of first strip patterns which are arranged in parallel; the test grating pattern group comprises a plurality of second strip patterns which are arranged in parallel, the second strip patterns and the first strip patterns extend along the same direction, each second strip pattern comprises a reference strip and a plurality of test strips, the reference strips and the test strips are arranged in parallel, and the width of the reference strips is greater than that of the test strips; the reference grating pattern group and the test grating pattern group are arranged adjacently, and the first strip patterns of the reference grating pattern group and the second strip patterns of the test grating pattern group are arranged along the same straight line in a one-to-one correspondence manner;
providing a wafer, wherein a photoresist layer is formed on the wafer;
exposing the wafer by using the mask plate to pattern the light resistance layer, and forming a test structure corresponding to a test pattern on the light resistance layer, wherein the test structure comprises:
the reference mark corresponds to the reference grating pattern group and comprises a plurality of first strip-shaped structures corresponding to the first strip-shaped patterns;
the test marks correspond to the test grating pattern groups, each test mark comprises a plurality of second strip-shaped structures corresponding to second strip-shaped patterns, each second strip-shaped structure comprises a reference strip-shaped structure and a plurality of test strip-shaped structures, the reference strip-shaped structures and the plurality of test strip-shaped structures are arranged in parallel, and the width of each reference strip-shaped structure is greater than that of each test strip-shaped structure;
measuring the position offset between the reference marks and the test marks which are arranged along the same straight line;
and obtaining the defocusing amount of the wafer during exposure according to the position offset.
2. The test method according to claim 1, wherein the first stripe pattern and the second stripe pattern have the same width.
3. The test method according to claim 1, wherein the width of the first stripe pattern is the same as the interval between adjacent first stripe patterns.
4. The test method as claimed in claim 1, wherein the width of the first stripe patterns is in a range of 12 to 20 micrometers, and the interval between adjacent first stripe patterns is in a range of 12 to 20 micrometers.
5. The test method of claim 1, wherein the width of the test strips and the spacing between adjacent test strips are the same.
6. The test method of claim 1, wherein the reference strips have a width in the range of 4 to 12 microns, the test strips have a width in the range of 4 nm to 12 nm, and the spacing between adjacent test strips is in the range of 600 nm to 800 nm.
7. The test method of claim 1, wherein the test pattern comprises four groups of reference grating patterns: a first, second, third and fourth reference grating pattern groups;
the test pattern further comprises four test grating pattern groups: the first test grating pattern group, the second test grating pattern group, the third test grating pattern group and the fourth test grating pattern group;
the first reference grating pattern group and the first test grating pattern group are adjacently arranged to form a rectangular first test pattern, the second reference grating pattern group and the second test grating pattern group are adjacently arranged to form a rectangular second test pattern, the third reference grating pattern group and the third test grating pattern group are adjacently arranged to form a rectangular third test pattern, and the fourth reference grating pattern group and the fourth test grating pattern group are adjacently arranged to form a rectangular fourth test pattern;
the first, second, third and fourth test patterns are arranged in a matrix of 2 rows and 2 columns, and in the first and third test patterns, the first strip patterns and the second strip patterns extend along a first direction; in the second and fourth test patterns, the first and second stripe patterns extend in a second direction, and the first direction is orthogonal to the second direction.
8. The testing method of claim 1, wherein the mask plate is provided with a plurality of test patterns, and in the step of forming the test structure, a plurality of test structures corresponding to the plurality of test patterns are formed on the photoresist layer;
in the step of measuring the position offset between the reference mark and the test mark, testing the plurality of test structures to obtain a plurality of position offset measurement values;
and in the step of obtaining the defocusing amount, obtaining a plurality of defocusing amount measurement values according to a plurality of position offset measurement values, and taking the average value of the defocusing amount measurement values as the defocusing amount of the wafer during exposure.
9. The test method of claim 1, wherein the mask plate includes a plurality of exposure regions, each exposure region being used to form a corresponding exposure unit on the wafer;
the test pattern is positioned at the edge of each exposure area, and in the step of patterning the light resistance layer by the mask plate, the test structure is correspondingly formed on the light resistance layer at the edge of each exposure unit;
in the step of measuring the position offset between the reference mark and the test mark, the test structure on each exposure unit is measured, and the position offset measurement value of the test structure on each exposure unit is obtained, so that the defocus amount of each exposure unit during wafer exposure is obtained.
10. The test method according to claim 1, wherein in the step of measuring the positional deviation amount between the reference mark and the test mark, the positional deviation amount between the reference mark and the test mark is measured using an overlay accuracy measuring apparatus.
11. The method of claim 10, wherein before exposing the wafer with the mask, further comprising: obtaining a functional relation between the position offset and the defocusing amount through experiments;
in the step of obtaining the defocus amount of the wafer during exposure according to the position offset amount,
and substituting the position offset into the functional relation to obtain the defocusing amount.
12. A defocus amount test system, comprising:
the manufacturing method comprises the following steps of forming a wafer, wherein a photoresist layer is formed on the wafer;
the mask plate is arranged in the photoetching equipment, and is provided with a test pattern for forming a test structure on the wafer so as to test the defocusing amount of the wafer;
the test pattern includes: the reference grating pattern group comprises a plurality of first strip patterns which are arranged in parallel; the test grating pattern group comprises a plurality of second strip patterns which are arranged in parallel, the second strip patterns and the first strip patterns extend along the same direction, each second strip pattern comprises a reference strip and a plurality of test strips, the reference strips and the test strips are arranged in parallel, and the width of the reference strips is greater than that of the test strips; the reference grating pattern group and the test grating pattern group are arranged adjacently, and the first strip patterns of the reference grating pattern group and the second strip patterns of the test grating pattern group are arranged along the same straight line in a one-to-one correspondence manner;
the test structure includes:
the reference mark corresponds to the reference grating pattern group and comprises a plurality of first strip-shaped structures corresponding to the first strip-shaped patterns;
the test marks correspond to the test grating pattern groups, each test mark comprises a plurality of second strip-shaped structures corresponding to second strip-shaped patterns, each second strip-shaped structure comprises a reference strip-shaped structure and a plurality of test strip-shaped structures, the reference strip-shaped structures and the plurality of test strip-shaped structures are arranged in parallel, and the width of each reference strip-shaped structure is greater than that of each test strip-shaped structure;
the measuring unit is used for measuring the position offset between the reference mark and the test mark which are arranged along the same straight line;
and the calculating unit is used for calculating the defocusing amount of the wafer in the photoetching equipment according to the position offset between the reference mark and the test mark.
13. The test system of claim 12, wherein the first stripe pattern and the second stripe pattern have the same width.
14. The test system as claimed in claim 12, wherein the width of the first stripe patterns is the same as the interval between adjacent first stripe patterns.
15. The test system as claimed in claim 12, wherein the first stripe patterns have a width in a range of 12 to 20 μm, and a pitch between adjacent first stripe patterns is in a range of 12 to 20 μm.
16. The test system of claim 12, wherein the width of the test strips and the spacing between adjacent test strips are the same.
17. The test system of claim 12, wherein the reference strips have a width in the range of 4 to 12 microns, the test strips have a width in the range of 4 nm to 12 nm, and the spacing between adjacent test strips is in the range of 600 nm to 800 nm.
18. The test system of claim 12, wherein the test pattern comprises four groups of reference grating patterns: a first, second, third and fourth reference grating pattern groups;
the test pattern further comprises four test grating pattern groups: the first test grating pattern group, the second test grating pattern group, the third test grating pattern group and the fourth test grating pattern group;
the first reference grating pattern group and the first test grating pattern group are adjacently arranged to form a rectangular first test pattern, the second reference grating pattern group and the second test grating pattern group are adjacently arranged to form a rectangular second test pattern, the third reference grating pattern group and the third test grating pattern group are adjacently arranged to form a rectangular third test pattern, and the fourth reference grating pattern group and the fourth test grating pattern group are adjacently arranged to form a rectangular fourth test pattern;
the first, second, third and fourth test patterns are arranged in a matrix of 2 rows and 2 columns, and in the first and third test patterns, the first strip patterns and the second strip patterns extend along a first direction; in the second and fourth test patterns, the first and second stripe patterns extend in a second direction, and the first direction is orthogonal to the second direction.
19. The test system of claim 12, wherein the mask plate includes a plurality of exposure regions, each exposure region being used to form a corresponding exposure unit on the wafer;
the test pattern is positioned at the edge of each exposure area and used for correspondingly forming the test structure on the photoresist layer at the edge of each exposure unit in the step of patterning the photoresist layer by the mask plate;
in the step of measuring the position offset between the reference mark and the test mark, the measuring unit is used for measuring the test structure on each exposure unit to obtain a position offset measurement value of the test structure on each exposure unit, so as to obtain the defocus amount of each exposure unit during wafer exposure.
20. The test system of claim 12, further comprising: a storage unit for storing a functional relationship between the amount of positional shift and the defocus amount obtained by experiment.
21. The test system of claim 12, wherein the measurement unit is an overlay accuracy measurement device.
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CN108267940A (en) * | 2016-12-30 | 2018-07-10 | 无锡华润上华科技有限公司 | Alignment board tests the overlay mark of focus |
CN111290224B (en) * | 2020-02-20 | 2023-04-07 | 上海华力微电子有限公司 | Unit mark and design method thereof |
CN112631069A (en) * | 2020-12-22 | 2021-04-09 | 长江存储科技有限责任公司 | Mask plate and method for correcting alignment precision |
CN113031389B (en) * | 2021-03-24 | 2024-07-19 | 上海华虹宏力半导体制造有限公司 | Mask monitoring pattern, mask and mask monitoring method |
CN114623787B (en) * | 2022-03-10 | 2024-05-03 | 长鑫存储技术有限公司 | Calibration mark for calibrating overlay measurement accuracy, measurement method and calibration method |
CN115145127B (en) * | 2022-09-05 | 2022-11-25 | 上海传芯半导体有限公司 | Detection structure of alignment precision, preparation method thereof and detection method of alignment precision |
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