CN106124970A - The fault filling method of SRAM type FPGA and device - Google Patents
The fault filling method of SRAM type FPGA and device Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318516—Test of programmable logic devices [PLDs]
- G01R31/318519—Test of field programmable gate arrays [FPGA]
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Abstract
The present invention relates to fault filling method and the device of a kind of SRAM type FPGA, the method includes the initial configuration file obtaining FPGA to be measured；Obtain logical resource in the use in initial configuration file, and determine that in use, logical resource correspondence can configure the configuration file position of memory element；Determining direct fault location position, direct fault location position is corresponding with the configuration file position of configurable memory element；The configuration bit position of upset direct fault location position obtains direct fault location configuration file；Direct fault location configuration file is downloaded in FPGA to be measured.The fault filling method of this SRAM type FPGA, without whole positions of FPGA are carried out direct fault location, by only the logical resource in using being carried out direct fault location, the direct fault location efficiency of SRAM type FPGA can be improved, further, tester can evaluate whether FPGA function is had an impact by fault rapidly according to the feedback of direct fault location.
Description
Technical field
The present invention relates to FPGA space reliability technical field, particularly relate to the direct fault location side of a kind of SRAM type FPGA
Method and device.
Background technology
SRAM (Static Random Access Memory, i.e. static RAM) type FPGA (Field-
Programmable Gate Array, i.e. field programmable gate array) due to its repeatable configuration, motility height, aboundresources
Etc. advantage, it is widely used in space industry.The internal resource of SRAM type FPGA is realized by the memory element of SRAM type, and SRAM
The memory element of type is the most sensitive to space radiation, the single-particle inversion serious threat that Space heavy ion and proton produce wherein
It is properly functioning, becomes industry research and the emphasis of engineer applied and focus.
Single-particle inversion (Single Event Upset, SEU): refer to owing to single-particle radiation causes the logic state of circuit
Change, i.e. logical one becomes logical zero, or logical zero becomes logical one, causes circuit logic function chaotic.
Single-particle inversion is the one in single particle effect (Single Event Effects, SEE), fault filling method
The common method of assessment FPGA single particle effect sensitivity, its principle be use the technology such as hardware, software, emulation to device or
System is injected fault, the impact that device performance or system are run by assessment fault.SRAM type FPGA that row is commonly used in the trade at present
Fault filling method uses fault to inject at random or injects the evaluation realizing device radiation resistance by turn.But single-particle inversion
It is random in the generation position of SRAM type FPGA, injects or whole positions of FPGA are entered by injection mode by turn according to random
Row direct fault location, will take for the substantial amounts of time just can determine that abort situation, therefore, existing SRAM type FPGA fault filling method
Efficiency is low, it is impossible to evaluate whether fault produces impact to FPGA function rapidly.
Summary of the invention
Based on this, it is necessary to provide a kind of SRAM type FPGA that can improve direct fault location efficiency fault filling method and
Device.
The fault filling method of a kind of SRAM type FPGA, comprises the following steps:
Obtain the initial configuration file of FPGA to be measured；
Obtain logical resource in the use in described initial configuration file, and determine that in described use, logical resource correspondence can
The configuration file position of configuration memory cell；
Determine the configuration file position pair of direct fault location position, described direct fault location position and described configurable memory element
Should；
The configuration bit position overturning described direct fault location position obtains direct fault location configuration file；
Described direct fault location configuration file is downloaded in described FPGA to be measured.
In one embodiment, the configuration bit position of described upset described direct fault location position obtains direct fault location configuration literary composition
The step of part includes:
Overturn the configuration bit position of a type of configurable memory element in described direct fault location position and obtain fault note
Enter configuration file.
In one embodiment, the configuration bit position of described upset described direct fault location position obtains direct fault location configuration literary composition
The step of part includes:
Overturn the configuration bit position of polytype configurable memory element in described direct fault location position respectively and obtain event
Barrier injects configuration file.
In one embodiment, the step described direct fault location configuration file downloaded in described FPGA to be measured it
After, also include:
Run described FPGA to verify whether described FPGA lost efficacy and be verified result；
When the configuration bit position that described direct fault location position is corresponding is the most all reversed, returns and overturn described direct fault location
The configuration bit position of position obtains the step of direct fault location configuration file；
When the configuration bit position that described direct fault location position is corresponding is all reversed, according to described the result, described
The type of the configurable memory element that direct fault location position is corresponding with described direct fault location position determines failure mode.
In one embodiment, logical resource in the use in the described initial configuration file of described acquisition, and determine described
The step using the configuration file position that middle logical resource correspondence can configure memory element includes:
Determine the user logic resource in described initial configuration file；
Distinguish in described user logic resource do not use logical resource and use in logical resource；
Determine that in described use, logical resource correspondence can configure the configuration file position of memory element.
A kind of fault injection device of SRAM type FPGA, including:
Initial configuration acquisition module, for obtaining the initial configuration file of FPGA to be measured；
Analyze module, for obtaining logical resource in the use in described initial configuration file, and determine in described use
Logical resource correspondence can configure the configuration file position of memory element；
Abort situation determines module, is used for determining that direct fault location position, described direct fault location position are deposited with described can configure
The configuration file position of storage unit is corresponding；
Flip module, obtains direct fault location configuration file for overturning the configuration bit position of described direct fault location position；
Direct fault location module, for downloading to described direct fault location configuration file in described FPGA to be measured.
In one embodiment, described flip module, it is used for overturning a type of in described direct fault location position joining
The configuration bit position putting memory element obtains direct fault location configuration file.
In one embodiment, described flip module, polytype for overturning in described direct fault location position respectively
The configuration bit position of configurable memory element obtains direct fault location configuration file.
In one embodiment, authentication module, it is used for running described FPGA to verify whether described FPGA lost efficacy and obtained
The result；
Failure analysis module, is used for when the configuration bit position that described direct fault location position is corresponding is all reversed, according to
The type of the configurable memory element that described the result, described direct fault location position are corresponding with described direct fault location position determines
Failure mode；
Described flip module, is additionally operable to when the configuration bit position that described direct fault location position is corresponding is the most all reversed,
The configuration bit position overturning next described direct fault location position obtains direct fault location configuration file.
In one embodiment, described analysis module, including:
User obtains source obtaining module, for determining the user logic resource in described initial configuration file；
Discriminating module, for distinguish in described user logic resource do not use logical resource and use in logical resource；
Memory element acquisition module, for determining that in described use, logical resource correspondence can configure the configuration literary composition of memory element
Part position.
The fault filling method of this SRAM type FPGA, by being analyzed being used in the initial configuration file to FPGA
Middle logical resource, and only the logical resource in using is carried out direct fault location.Only there is patrolling in use in single-particle inversion
When collecting in resource, it is only possible to produce impact to FPGA is properly functioning.The fault filling method of this SRAM type FPGA, it is not necessary to FPGA
Whole positions carry out direct fault location, by only to use in logical resource carry out direct fault location, it is possible to increase SRAM type
The direct fault location efficiency of FPGA, and, tester can evaluate fault to FPGA merit rapidly according to the feedback of direct fault location
Can whether have an impact.
Accompanying drawing explanation
Fig. 1 is the flow chart of the fault filling method of SRAM type FPGA of an embodiment；
Fig. 2 is the configuration bit position of configurable memory element corresponding to a direct fault location position of a kind of embodiment；
Fig. 3 is the direct fault location configuration file obtained by configuration bit bit flipping as shown in Figure 2；
Fig. 4 is the flow chart of the fault filling method of SRAM type FPGA of another kind of embodiment；
Fig. 5 is the high-level schematic functional block diagram of the fault injection device of SRAM type FPGA of an embodiment；
Fig. 6 is the high-level schematic functional block diagram of the fault injection device of SRAM type FPGA of another embodiment.
Detailed description of the invention
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples,
The present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention,
Do not limit the present invention.
In one embodiment, as shown in Figure 1, it is provided that the fault filling method of a kind of SRAM type FPGA, the present embodiment
Illustrating as a example by being applied to computer in this way, this computer runs a kind of application program, is somebody's turn to do by this program
Realize the fault filling method of SRAM type FPGA.The method comprises the following steps:
S102: obtain the initial configuration file of FPGA to be measured.
FPGA, i.e. field programmable gate array, user can be according to on-the-spot practical situation, at the input dress being connected with FPGA
Putting input user and design the demand of circuit, FPGA designs circuit automatically according to user's request, and generation changes design circuit correspondence
Initial configuration file.
S104: obtain logical resource in the use in initial configuration file, and determine that in use, logical resource correspondence can be joined
Put the configuration file position of memory element.
Resource contained in FPGA is the abundantest, including basic logical block, DSP resource and block RAM etc..Patrol in using
Volume resource refer to used in the circuit according to user's request design to FPGA in logical resource.Configurable memory element bag
Include BRAM (Block Random Access Memory block random access memory), LUT (Look-Up-Table, look-up table)
With at least one in trigger etc..In a particular embodiment, user is by with reference to user's manual, in first configuration file
Hold form to be analyzed, analyze logical resource in the use in initial configuration file, and logical resource correspondence can in using
The configuration file position of configuration memory cell being input to is run in the computer of application program, thus at the beginning of computer gets
Logical resource in use in beginning configuration file, and determine that in use, logical resource correspondence can configure the configuration file of memory element
Position.
S106: determine direct fault location position, direct fault location position is corresponding with the configuration file position of configurable memory element.
In present embodiment, using the configuration file position of configurable memory element as direct fault location position.Concrete
In embodiment, fault can be overturn using a type of configurable memory element as direct fault location object for mock up flat.
Or using polytype configurable memory element as direct fault location object, it is used for simulating Multiple-bit upsets fault.
S108: the configuration bit position of upset direct fault location position obtains direct fault location configuration file.
Concrete, according to the configurable memory element corresponding with direct fault location position, search and obtain configurable memory element
Configuration bit position, obtain the configuration bit position that direct fault location position is corresponding.In a kind of embodiment, a certain direct fault location position
The configuration bit position of corresponding configurable memory element is as shown in Figure 2.The event that configuration bit bit flipping as shown in Figure 2 is obtained
Barrier configuration file is as shown in Figure 3.
S110: direct fault location configuration file is downloaded in FPGA to be measured.
Concrete, by fault configuration file by JTAG (Joint Test Action Group；Joint test working group)
Download in SARM type FPGA.
The fault filling method of SRAM type FPGA of this embodiment, by carrying out in the initial configuration file to FPGA point
Analyse logical resource in being used, and only the logical resource in using is carried out direct fault location.Single-particle inversion only occurs
Time on the logical resource used, it is only possible to produce impact to FPGA is properly functioning.The fault filling method of this SRAM type FPGA,
Without whole positions of FPGA are carried out direct fault location, by only the logical resource in using being carried out direct fault location, it is possible to carry
The direct fault location efficiency of high SRAM type FPGA, and, tester can evaluate fault rapidly according to the feedback of direct fault location
Whether FPGA function is had an impact.
Wherein in an embodiment, step S108 includes: in upset direct fault location position, a type of can configure is deposited
The configuration bit position of storage unit obtains direct fault location configuration file.
Configurable memory element includes polytype, and such as, (Block Random Access Memory block is random for BRAM
Access memorizer), LUT (Look-Up-Table, look-up table) and trigger etc..By overturning a type of configurable storage
The configuration bit position of unit, it is possible to the unit upset fault of simulation SARM type FPGA.
Wherein in an embodiment, step S108 includes: overturn polytype in direct fault location position joining respectively
The configuration bit position putting memory element obtains direct fault location configuration file.
By overturning the configuration bit position of polytype configurable memory element, it is possible to the multidigit of simulation SARM type FPGA
Upset fault.
Wherein in an embodiment, as shown in Figure 4, after step silo, also include:
S112: run whether FPGA lost efficacy with checking FPGA and be verified result.
Whether the FPGA being filled with direct fault location configuration file by operation is caused with the fault of the injection of checking configuration
FPGA lost efficacy.Concrete, the result includes losing efficacy and not losing efficacy and concrete failure mode.Different direct fault location positions
And the failure mode that the type of configurable memory element corresponding to different faults injection phase obtains may be identical.
Configuration bit position corresponding to S114: failure judgement injection phase is the most all reversed.The most then perform step
S116；If it is not, then return step S108.
In the present embodiment, the direct fault location position determined has multiple.One or one group of direct fault location position of upset every time
Put the configuration bit position of the configurable memory element of correspondence.After each run is filled with the FPGA to be measured of fault configuration file,
Judge that the configuration bit position corresponding with direct fault location position is the most all reversed.When being judged as NO, return step S108 with
Overturn the configuration bit position of direct fault location position one by one and obtain the direct fault location configuration file of correspondence.
S116: according to the class of the result, the direct fault location position configurable memory element corresponding with direct fault location position
Type determines failure mode.
Concrete, unit upset is injected to inject with Multiple-bit upsets and is determined that the method for failure mode is different.With unit upset note
As a example by entering, it is assumed that the capacity of the internal logic resource that user uses is l, total m configurable Storage Unit Type, produce n kind
Failure mode, according to type and the fault of configurable memory element corresponding to unit upset injection phase, direct fault location position
Injecting the failure mode guided to summarize, the result obtained is as shown in table 1.
Table 1 unit upset fault location injects result
| Unit upset injection phase | The type of configurable memory element | Whether have an impact | Failure mode |
| Unit upset 1 | Class1 | Yes/No | Failure mode 1 |
| Unit upset 2 | Type 2 | Yes/No | Failure mode 2 |
| … | … | … | … |
| Unit upset l | Type m | Yes/No | Failure mode n |
According to table 1, the interior of various failure mode (Failure Mode i, FMi, 1≤i≤n) correspondence can be calculated
Portion's logical resource quantity, NFMi.It is calculated FMi scale factor in user logic resource, i.e. Failure Factor α furtherFMi:
αFMi=NFMi/Ntotal
Wherein, NtotalTotal capacity for internal logic resource.
As a example by Multiple-bit upsets, according to user's request, determine that Multiple-bit upsets direct fault location combines, it is assumed that its quantity is x, right
The configurable Storage Unit Type answered is combined as y, produces z kind failure mode.According to Multiple-bit upsets injection phase, upturned position institute
The failure mode guided at the type (BRAM, LUT, trigger etc. and combinations thereof) of configurable memory element, direct fault location is entered
Row is summed up, as shown in table 2.
Table 2 Multiple-bit upsets fault location injects result
| Multiple-bit upsets injection phase | The type of configurable memory element | Whether have an impact | Failure mode |
| Multiple-bit upsets combination 1 | Type combination 1 | Yes/No | Failure mode 1 |
| Multiple-bit upsets combination 2 | Type combination 2 | Yes/No | Failure mode 2 |
| … | … | … | … |
| Multiple-bit upsets combination x | Type combination y | Yes/No | Failure mode z |
The fault filling method of above-mentioned SRAM type FPGA, it is possible to the anti-single particle upset property of thoroughly evaluating SRAM type FPGA
Can, disclose failure mode comprehensively, find anti-single particle upset weak link.It is used as the inefficacy place, location that the method obtains
So that device is carried out specific aim reinforcing.
In another embodiment, the user logic resource during step S104 comprises determining that initial configuration file；Distinguish
In user logic resource do not use logical resource and use in logical resource；Determine in use that logical resource correspondence is configurable to deposit
The configuration file position of storage unit.
The method is by distinguishing the logical resource of user's use and untapped internal logic resource, and precise positioning user make
Logical resource, and make a distinction with logical resource in not using logical resource in user logic resource and using, thus smart
Position accurately and use can configure in logical resource memory element and the position of configurable memory element, exist the most pointedly
Configurable memory element carries out direct fault location, it is possible to increase the direct fault location efficiency of SRAM type FPGA.
The present invention also provides for the fault injection device of a kind of SRAM type FPGA, includes as shown in Figure 5:
Initial configuration acquisition module 102, for obtaining the initial configuration file of FPGA to be measured.
Analyze module 104, for obtaining logical resource in the use in initial configuration file, and determine logic money in use
Source correspondence can configure the configuration file position of memory element.
Abort situation determines module 106, is used for determining direct fault location position, direct fault location position and configurable memory element
Configuration file position corresponding.
Flip module 108 obtains direct fault location configuration file for the configuration bit position overturning direct fault location position.
Direct fault location module 110, for downloading to direct fault location configuration file in FPGA to be measured.
The fault injection device of SRAM type FPGA of this embodiment, by carrying out in the initial configuration file to FPGA point
Analyse logical resource in being used, and only the logical resource in using is carried out direct fault location.Single-particle inversion only occurs
Time on the logical resource used, it is only possible to produce impact to FPGA is properly functioning.The fault injection device of this SRAM type FPGA,
Without whole positions of FPGA are carried out direct fault location, by only the logical resource in using being carried out direct fault location, it is possible to carry
The direct fault location efficiency of high SRAM type FPGA, and, tester can evaluate fault rapidly according to the feedback of direct fault location
Whether FPGA function is had an impact.
In another embodiment, flip module 108, it is used for overturning a type of can configure in direct fault location position and deposits
The configuration bit position of storage unit obtains direct fault location configuration file.
In another embodiment, flip module, polytype configurable in upset direct fault location position respectively
The configuration bit position of memory element obtains direct fault location configuration file.
In another embodiment, as shown in Figure 6, authentication module 112, judge module 114 and failure analysis mould are also included
Block 116,
Authentication module 112, is used for running whether FPGA lost efficacy with checking FPGA and be verified result.
Judge module 114, for judging that the configuration bit position corresponding with direct fault location position is the most all reversed.
Failure analysis module 116, for when the configuration bit position that direct fault location position is corresponding is all reversed, according to testing
The type of the configurable memory element that card result, direct fault location position is corresponding with direct fault location position determines failure mode.
Flip module 108, is additionally operable to when the configuration bit position that direct fault location position is corresponding is the most all reversed, under upset
The configuration bit position of one direct fault location position obtains fault configuration file.
In another embodiment, analyze module, including: user obtains source obtaining module 1041, discriminating module 1042
With memory element acquisition module 1043.
User obtains source obtaining module 1041, for determining the user logic resource in initial configuration file；
Discriminating module 1042, for distinguish in user logic resource do not use logical resource and use in logical resource.
Memory element acquisition module 1043, for determining that in use, logical resource correspondence can configure the configuration literary composition of memory element
Part position.
This device is by distinguishing the logical resource of user's use and untapped internal logic resource, and precise positioning user make
Logical resource, and make a distinction with logical resource in not using logical resource in user logic resource and using, thus smart
Position accurately and use can configure in logical resource memory element and the position of configurable memory element, exist the most pointedly
Configurable memory element carries out direct fault location, it is possible to increase the direct fault location efficiency of SRAM type FPGA.
Each technical characteristic of above example can combine arbitrarily, for making description succinct, not to above-described embodiment
In all possible combination of each technical characteristic be all described, but, as long as there is not lance in the combination of these technical characteristics
Shield, is all considered to be the scope that this specification is recorded.
Embodiment described above only have expressed the several embodiments of the present invention, and it describes more concrete and detailed, but also
Can not therefore be construed as limiting the scope of the patent.It should be pointed out that, come for those of ordinary skill in the art
Saying, without departing from the inventive concept of the premise, it is also possible to make some deformation and improvement, these broadly fall into the protection of the present invention
Scope.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (10)
1. a fault filling method for SRAM type FPGA, comprises the following steps:
Obtain the initial configuration file of FPGA to be measured；
Obtain logical resource in the use in described initial configuration file, and determine that in described use, logical resource correspondence can configure
The configuration file position of memory element；
Determining direct fault location position, described direct fault location position is corresponding with the configuration file position of described configurable memory element；
The configuration bit position overturning described direct fault location position obtains direct fault location configuration file；
Described direct fault location configuration file is downloaded in described FPGA to be measured.
The fault filling method of SRAM type FPGA the most according to claim 1, it is characterised in that
The configuration bit position of described upset described direct fault location position obtains the step of direct fault location configuration file and includes:
Overturn the configuration bit position of a type of configurable memory element in described direct fault location position to obtain direct fault location and join
Put file.
The fault filling method of SRAM type FPGA the most according to claim 1, it is characterised in that the described fault of described upset
The configuration bit position of injection phase obtains the step of direct fault location configuration file and includes:
Overturn the configuration bit position of polytype configurable memory element in described direct fault location position respectively and obtain fault note
Enter configuration file.
The fault filling method of SRAM type FPGA the most according to claim 1, it is characterised in that by described direct fault location
After configuration file downloads to the step in described FPGA to be measured, also include:
Run described FPGA to verify whether described FPGA lost efficacy and be verified result；
When the configuration bit position that described direct fault location position is corresponding is the most all reversed, returns and overturn described direct fault location position
Configuration bit position obtain the step of direct fault location configuration file；
When the configuration bit position that described direct fault location position is corresponding is all reversed, according to described the result, described fault
The type of the configurable memory element that injection phase is corresponding with described direct fault location position determines failure mode.
The fault filling method of SRAM type FPGA the most according to claim 1, it is characterised in that described acquisition is described initially
Logical resource in use in configuration file, and determine that in described use, logical resource correspondence can configure the configuration literary composition of memory element
The step of part position includes:
Determine the user logic resource in described initial configuration file；
Distinguish in described user logic resource do not use logical resource and use in logical resource；
Determine that in described use, logical resource correspondence can configure the configuration file position of memory element.
6. the fault injection device of SRAM type FPGA, it is characterised in that including:
Initial configuration acquisition module, for obtaining the initial configuration file of FPGA to be measured；
Analyze module, for obtaining logical resource in the use in described initial configuration file, and determine logic in described use
Resource correspondence can configure the configuration file position of memory element；
Abort situation determines module, is used for determining direct fault location position, and described direct fault location position is single with described configurable storage
The configuration file position of unit is corresponding；
Flip module, obtains direct fault location configuration file for overturning the configuration bit position of described direct fault location position；
Direct fault location module, for downloading to described direct fault location configuration file in described FPGA to be measured.
The fault injection device of SRAM type FPGA the most according to claim 6, it is characterised in that
Described flip module, for overturning the configuration bit of a type of configurable memory element in described direct fault location position
Position obtains direct fault location configuration file.
The fault injection device of SRAM type FPGA the most according to claim 6, it is characterised in that described flip module, uses
Direct fault location is obtained in overturning the configuration bit position of polytype configurable memory element in described direct fault location position respectively
Configuration file.
The fault injection device of SRAM type FPGA the most according to claim 6, also includes:
Authentication module, is used for running described FPGA to verify whether described FPGA lost efficacy and be verified result；
Failure analysis module, for when the configuration bit position that described direct fault location position is corresponding is all reversed, according to described
The type of the configurable memory element that the result, described direct fault location position are corresponding with described direct fault location position determines inefficacy
Pattern；
Described flip module, is additionally operable to when the configuration bit position that described direct fault location position is corresponding is the most all reversed, upset
The configuration bit position of next described direct fault location position obtains direct fault location configuration file.
The fault injection device of SRAM type FPGA the most according to claim 6, it is characterised in that described analysis module, bag
Include:
User obtains source obtaining module, for determining the user logic resource in described initial configuration file；
Discriminating module, for distinguish in described user logic resource do not use logical resource and use in logical resource；
Memory element acquisition module, for determining that in described use, logical resource correspondence can configure the configuration file position of memory element
Put.
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| CN107092539A (en) * | 2017-02-24 | 2017-08-25 | 北京时代民芯科技有限公司 | A kind of FPGA direct fault location composite models based on configuration bit stream |
| CN112596506A (en) * | 2020-12-30 | 2021-04-02 | 中国科学院空天信息创新研究院 | Fault injection method, fault injector, storage medium and fault injection system |
| CN113253097A (en) * | 2021-05-31 | 2021-08-13 | 中国人民解放军国防科技大学 | SRAM type FPGA fault injection acceleration test method based on whole frame turnover |
| US11378622B1 (en) | 2021-01-05 | 2022-07-05 | Raytheon Company | Methods and systems for single-event upset fault injection testing |
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