CN106100633A - A kind of crystal oscillator drive circuit - Google Patents
A kind of crystal oscillator drive circuit Download PDFInfo
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- CN106100633A CN106100633A CN201610657864.XA CN201610657864A CN106100633A CN 106100633 A CN106100633 A CN 106100633A CN 201610657864 A CN201610657864 A CN 201610657864A CN 106100633 A CN106100633 A CN 106100633A
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L3/00—Starting of generators
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L5/00—Automatic control of voltage, current, or power
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/15—Constructional features of resonators consisting of piezoelectric or electrostrictive material
- H03H9/17—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
- H03H9/19—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator consisting of quartz
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The embodiment of the invention discloses a kind of crystal oscillator drive circuit, described circuit includes: bias current generation unit, resistance unit and electric current can configure amplifier unit；Wherein, bias current generation unit, can configure amplifier unit with described resistance unit and described electric current respectively and be connected, providing operating current for can configure amplifier unit to described resistance unit and electric current；Resistance unit, can configure amplifier unit with described electric current and is connected, and sets up DC point for can configure amplifier unit to described electric current；Electric current can configure amplifier unit, it is connected with input and the outfan of crystal oscillator respectively, for operating current being amplified under the control of DC point, to drive crystal oscillator starting of oscillation, achieve the power consumption reducing drive circuit, reduce the area shared by drive circuit, and improve the purpose of the scope of application of drive circuit.
Description
Technical field
The present embodiments relate to circuit engineering, particularly relate to a kind of crystal oscillator drive circuit.
Background technology
Along with making rapid progress of science and technology, electronic product is constantly weeded out the old and bring forth the new, but the realization of each electronic product
Be unableing to do without digital circuit, the work of digital circuit be unable to do without again agitator, produces clock pulses accurately by agitator, thus
Control digital circuit to have and sequentially work.Crystal oscillator is widely used in on-chip integration system, is commonly used to as real-time clock
Module provides a clock source accurately.Along with Internet of Things and use the universal of battery powered portable mobile apparatus,
Asking battery several years of can effectively powering even more long-time, the power consumption of crystal oscillator drive circuit in chip is just proposed by this
Strict restriction, typically requires that its operating current controls at 1 below μ A.
The drive circuit of a kind of conventional crystal oscillator in prior art as shown in Figure 1, by an inverting amplifier
INV and feedback resistance RF composition.Whole crystal-oscillator circuit also includes off-chip quartz crystal and matching capacitance C1, C2.Wherein,
Phase inverter INV and feedback resistance RF constitutes drive circuit, compensates the inherent loss of quartz crystal, maintains the vibration of system, to this end,
The minimum mutual conductance that phase inverter INV must provide for is
Wherein, RmFor the equivalent series resistance of crystal oscillator, ω is the resonant frequency of crystal oscillator, C0Static Electro for crystal oscillator
Hold, C1, C2 are the capacitance of off-chip matching capacitance, circuit design typically requires the mutual conductance of inverting amplifier reach this minimum across
At least 5 times led, with ensure crystal oscillator at various manufacturing process, under voltage, and the change of temperature, can starting of oscillation.Instead
In phase amplifier INV, NMOS and PMOS transistor are all operated in saturation region, and its mutual conductance with the relation of operating current is:
Wherein, VgsFor the gate source voltage of transistor, VthFor the threshold voltage of transistor, IDFor drain current.
But, the shortcoming of this structural circuit is that the overdrive voltage of transistor is bigger, and with the liter of supply voltage
High and increase.Cause its current utilization efficiency low, and phase inverter electric current changes along with the change of supply voltage, causes circuit
Oscillating characteristic the biggest with mains voltage variations.For ensureing starting of oscillation, circuit design must leave the biggest surplus, the merit that circuit consumes
Consume the biggest.Such as under 3.3V voltage, the electric current representative value consumed during the crystal oscillator of this drives 32.768kHz is about
It is 6～7 μ A.On the other hand, feedback resistance RF provides DC point, general requirement in the starting of oscillation incipient stage for phase inverter INV
Its resistance is more than 10M Ω, and this will take the biggest area in the chips, increases chip cost.
Summary of the invention
The present invention provides a kind of crystal oscillator drive circuit, to reduce the power consumption of drive circuit, reduces driving electricity simultaneously
Area shared by road, and improve the scope of application of drive circuit.
The embodiment of the present invention provides a kind of crystal oscillator drive circuit, and described circuit includes:
Bias current generation unit, resistance unit and electric current can configure amplifier unit；Wherein,
Bias current generation unit, can configure amplifier unit with described resistance unit and described electric current respectively and is connected, and uses
Operating current is provided in can configure amplifier unit to described resistance unit and electric current；
Resistance unit, can configure amplifier unit with described electric current and is connected, for can configure amplifier list to described electric current
Unit sets up DC point；
Electric current can configure amplifier unit, is connected with input and the outfan of crystal oscillator respectively, at direct current
Under the control of operating point, operating current is amplified, to drive crystal oscillator starting of oscillation.
Preferably, described circuit also includes: signal amplifies and shaping unit, can configure amplifier unit with electric current and is connected,
For the input end signal of crystal oscillator is amplified and shaping, and export crystal oscillator starting of oscillation marking signal.
Further, described circuit also includes: start unit, amplifies with whole with bias current generation unit and signal respectively
Shape unit is connected, and under the control of starting of oscillation marking signal, controls the startup of bias current generation unit.
Preferably, described bias current generation unit specifically includes:
First PMOS transistor, the second PMOS transistor, the first nmos pass transistor, the second nmos pass transistor and the first electricity
Resistance, wherein:
First PMOS transistor is connected with the grid of the second PMOS transistor, and source electrode connects power supply, constitutes current mirror, and first
The drain electrode of PMOS transistor is connected with the first end of the first resistance and the grid of the first nmos pass transistor；Second PMOS transistor
Drain electrode be connected with the grid of the second PMOS transistor and the drain electrode of the second nmos pass transistor；The grid of the second nmos pass transistor with
The drain electrode of the first nmos pass transistor and the second end of the first resistance are connected, and the source electrode of the second nmos pass transistor and a NMOS are brilliant
The source grounding of body pipe.
Preferably, described resistance unit specifically includes:
3rd PMOS transistor, the 3rd nmos pass transistor, the 4th nmos pass transistor and three nmos pass transistors are composed in series
The 5th nmos pass transistor, wherein,
The grid of the 3rd PMOS transistor and the grid of the second PMOS transistor are connected, and source electrode connects power supply, drain electrode and the 5th
The grid of nmos pass transistor and the drain and gate of the 4th nmos pass transistor are connected；The source electrode and the 3rd of the 4th nmos pass transistor
The drain and gate of nmos pass transistor is connected；The source ground of the 3rd nmos pass transistor.
Preferably, described electric current can configure amplifier unit and specifically includes:
4th PMOS transistor, the 5th PMOS transistor, the 6th PMOS transistor, the 8th PMOS transistor, the 9th PMOS
Transistor, the 6th nmos pass transistor, the 7th nmos pass transistor, the 8th nmos pass transistor, the tenth nmos pass transistor and the 11st
Nmos pass transistor, wherein,
The source electrode of the 4th PMOS transistor connects power supply, grid and the 3rd PMOS transistor grid and the 5th PMOS transistor
Grid is connected, drain electrode and the drain electrode of the 6th nmos pass transistor, the drain electrode of the 5th nmos pass transistor and the outfan of crystal oscillator
It is connected；The grid of the 6th nmos pass transistor and the input of the source electrode of the 5th nmos pass transistor and crystal oscillator are connected, source electrode
Ground connection；The source electrode of the 8th PMOS transistor connects power supply, and grid connects current controling signal, drain electrode and the source electrode of the 5th PMOS transistor
It is connected；The drain electrode of the 5th PMOS transistor is connected with the drain electrode of the 7th nmos pass transistor and the outfan of crystal oscillator；7th
The source electrode of nmos pass transistor and the drain electrode of the tenth nmos pass transistor are connected, and the grid of grid and the 6th nmos pass transistor is connected；The
The source ground of ten nmos pass transistors, grid connects current controling signal；The source electrode of the 9th PMOS transistor connects power supply, and grid connects electricity
Flow control signals, drain electrode is connected with the source electrode of the 6th PMOS transistor；The grid of the 6th PMOS transistor and the 5th PMOS crystal
The grid of pipe is connected, and drain electrode is connected with the drain electrode of the 8th nmos pass transistor and the outfan of crystal oscillator；8th NMOS crystal
The grid of pipe and the grid of the 7th nmos pass transistor are connected, and the drain electrode of source electrode and the 11st nmos pass transistor is connected；11st
The grid of nmos pass transistor connects current controling signal, source ground.
Preferably, the amplification of described signal specifically includes with shaping unit:
7th PMOS transistor, the 9th nmos pass transistor, Schmidt trigger sum counter, wherein, the 7th PMOS crystal
The source electrode of pipe connects power supply, and the grid of grid and the 6th PMOS transistor is connected, drain electrode and the input of Schmidt trigger and the
The drain electrode of nine nmos pass transistors is connected；The grid of the 9th nmos pass transistor and the grid of the 8th nmos pass transistor are connected, and source electrode connects
Ground；The outfan of Schmidt trigger is connected with the input of enumerator, the outfan output starting of oscillation marking signal of enumerator.
Preferably, described start unit specifically includes:
The tenth PMOS transistor, the tenth bi-NMOS transistor and the 13rd NMOS crystalline substance that three PMOS transistor are composed in series
Body pipe, wherein,
The source electrode of the tenth PMOS transistor connects power supply, and grid is connected with the outfan of enumerator, drain electrode and the 13rd NMOS
The grid of transistor and the drain electrode of the tenth bi-NMOS transistor are connected；The drain electrode of the 13rd nmos pass transistor and a PMOS crystal
The grid of pipe is connected, source ground；The source ground of the tenth bi-NMOS transistor, the grid phase of grid and the first nmos pass transistor
Even.
The crystal oscillator drive circuit that the embodiment of the present invention provides, including: bias current generation unit, resistance unit and
Electric current can configure amplifier unit；Wherein, bias current generation unit, can configure with described resistance unit and described electric current respectively
Amplifier unit is connected, and provides operating current for can configure amplifier unit to described resistance unit and electric current；Resistance unit,
Can configure amplifier unit with described electric current to be connected, setting up DC point for can configure amplifier unit to described electric current；
Electric current can configure amplifier unit, is connected with input and the outfan of crystal oscillator respectively, at DC point
Under control, operating current is amplified, to drive crystal oscillator starting of oscillation, by using resistance unit can join to described electric current
Put amplifier unit and set up DC point, reduce the area shared by drive circuit, can configure amplifier by arranging electric current
Unit improves the scope of application of drive circuit, reduces the power consumption of drive circuit simultaneously.
Accompanying drawing explanation
Fig. 1 is the drive circuit schematic diagram of a kind of crystal oscillator of the prior art；
Fig. 2 is the driving circuit structure schematic diagram of a kind of crystal oscillator that the embodiment of the present invention one provides；
Fig. 3 is the driving circuit structure schematic diagram of a kind of crystal oscillator that the embodiment of the present invention two provides；
Fig. 4 is the driving circuit structure schematic diagram of a kind of crystal oscillator that the embodiment of the present invention two provides.
Detailed description of the invention
The present invention is described in further detail with embodiment below in conjunction with the accompanying drawings.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, in order to just
Part related to the present invention is illustrate only rather than entire infrastructure in description, accompanying drawing.
Embodiment one
The driving circuit structure schematic diagram of a kind of crystal oscillator that Fig. 2 provides for the embodiment of the present invention one, the present embodiment
It is applicable to provide clock accurately for digital circuit.As in figure 2 it is shown, the driving of a kind of crystal oscillator of the present embodiment offer
Electrical block diagram, including: bias current generation unit 210, resistance unit 220 and electric current can configure amplifier unit 230；
Wherein,
Bias current generation unit 210, can configure amplifier unit 230 with resistance unit 220 and electric current respectively and is connected, and uses
Operating current is provided in can configure amplifier unit 230 to resistance unit 220 and electric current；
Resistance unit 220, can configure amplifier unit 230 and is connected with electric current, for can configure amplifier unit to electric current
230 set up DC point；Preferably, resistance unit 220 can be to be made up of MOS transistor, because MOS transistor is compared general
Logical resistance device occupied area is little, it is possible to save the area shared by whole drive circuit.
Electric current can configure amplifier unit 230, is connected with the input XIN and outfan XOUT of crystal oscillator respectively,
For operating current being amplified under the control of DC point, to drive crystal oscillator starting of oscillation.
The technical scheme of the present embodiment, gives described resistance unit and the configurable amplification of electric current by bias current generation unit
Device unit provides operating current；By resistance unit, can configure amplifier unit to described electric current and set up DC point；Pass through
Electric current can configure amplifier unit and is amplified operating current under the control of DC point, to drive crystal oscillator to rise
Shake, reduce the power consumption of drive circuit, set up direct current work by using resistance unit to can configure amplifier unit to described electric current
Make a little, reduce the area shared by drive circuit, can configure amplifier unit improve the suitable of drive circuit by arranging electric current
Use scope.
Embodiment two
Fig. 3 is the driving circuit structure schematic diagram of a kind of crystal oscillator that the embodiment of the present invention two provides, in above-mentioned reality
On the basis of executing example, embodiment adds signal and amplify and shaping unit 240 and start unit 250, referring specifically to Fig. 3 institute
Showing, described drive circuit includes:
Bias current generation unit 210, resistance unit 220, electric current can configure amplifier unit 230, signal amplifies with whole
Shape unit 240 and start unit 250；Wherein,
Bias current generation unit 210, can configure amplifier unit 230 with resistance unit 220 and electric current respectively and is connected, and uses
Operating current is provided in can configure amplifier unit 230 to resistance unit 220 and electric current；
Resistance unit 220, can configure amplifier unit 230 and is connected with electric current, for can configure amplifier unit to electric current
230 set up DC point；
Electric current can configure amplifier unit 230, is connected with the input XIN and outfan XOUT of crystal oscillator respectively,
For operating current being amplified under the control of DC point, to drive crystal oscillator starting of oscillation；
Signal amplifies and shaping unit 240, can configure amplifier unit 230 with electric current and is connected, for crystal oscillator
Input XIN signal be amplified and shaping, and export crystal oscillator starting of oscillation marking signal OSC-READY；
Start unit 250, amplifies with bias current generation unit 210 and signal respectively and is connected with shaping unit 240, be used for
Under the control of starting of oscillation marking signal OSC-READY, control the startup of bias current generation unit 210.
Preferably, as a kind of implementation of described drive circuit, shown in Figure 4, start unit 250 specifically wraps
Include:
The tenth PMOS transistor P10 that three PMOS transistor are composed in series, the tenth bi-NMOS transistor N12 and the 13rd
Nmos pass transistor N13, wherein,
The source electrode of the tenth PMOS transistor P10 meets power vd D, and grid is connected with the outfan of enumerator COUNTER, drain electrode
It is connected with the grid of the 13rd nmos pass transistor N13 and the drain electrode of the tenth bi-NMOS transistor N12；13rd nmos pass transistor
The drain electrode of N13 is connected with the grid of the first PMOS transistor P1, source ground；The source ground of the tenth bi-NMOS transistor N12,
The grid of grid and the first nmos pass transistor N1 is connected.
Exemplarily, bias current generation unit 210 specifically may include that
First PMOS transistor P1, the second PMOS transistor P2, the first nmos pass transistor N1, the second nmos pass transistor N2 and
First resistance R, wherein:
The grid of the first PMOS transistor P1 and the second PMOS transistor P2 is connected, and source electrode meets power vd D, constitutes electric current
Mirror, the drain electrode of the first PMOS transistor P1 is connected with first end of the first resistance R and the grid of the first nmos pass transistor N1；The
The drain electrode of two PMOS transistor P2 is connected with the grid of the second PMOS transistor P2 and the drain electrode of the second nmos pass transistor N2；Second
The grid of nmos pass transistor N2 and second end of the drain electrode of the first nmos pass transistor N1 and the first resistance R are connected, the 2nd NMOS
The source electrode of transistor N2 and the source grounding of the first nmos pass transistor N1.
Exemplarily, resistance unit 220 specifically may include that
3rd PMOS transistor P3, the 3rd nmos pass transistor N3, the 4th nmos pass transistor N4 and three nmos pass transistor strings
The 5th nmos pass transistor N5 that joint group becomes, wherein,
The grid of the 3rd PMOS transistor P3 and the grid of the second PMOS transistor P2 are connected, and source electrode connects power supply, drain electrode with
The grid of the 5th nmos pass transistor N5 and the drain and gate of the 4th nmos pass transistor N4 are connected；The source of the 4th nmos pass transistor N4
Pole is connected with the drain and gate of the 3rd nmos pass transistor N3；The source ground of the 3rd nmos pass transistor N3.
Exemplarily, electric current can configure amplifier unit 230 and specifically may include that
4th PMOS transistor P4, the 5th PMOS transistor P5, the 6th PMOS transistor P6, the 8th PMOS transistor P8,
9th PMOS transistor P9, the 6th nmos pass transistor N6, the 7th nmos pass transistor N7, the 8th nmos pass transistor N8, the tenth NMOS
Transistor N10 and the 11st nmos pass transistor N11, wherein,
The source electrode of the 4th PMOS transistor P4 connects power supply, grid and the 3rd PMOS transistor P3 grid and the 5th PMOS crystal
The grid of pipe P5 is connected, drain electrode and the drain electrode of the 6th nmos pass transistor N6, the drain electrode of the 5th nmos pass transistor N5 and crystal oscillation
The outfan XOUT of device is connected；The grid of the 6th nmos pass transistor N6 and the source electrode of the 5th nmos pass transistor N5 and crystal oscillator
Input XIN be connected, source ground；The source electrode of the 8th PMOS transistor P8 meets power vd D, grid connect current controling signal,
Drain electrode is connected with the source electrode of the 5th PMOS transistor P5；The drain electrode of the 5th PMOS transistor P5 and the leakage of the 7th nmos pass transistor N7
Pole is connected with the outfan XOUT of crystal oscillator；The source electrode of the 7th nmos pass transistor P7 and the leakage of the tenth nmos pass transistor N10
The most connected, the grid of grid and the 6th nmos pass transistor N6 is connected；The source ground of the tenth nmos pass transistor N10, grid connects electricity
Flow control signals；The source electrode of the 9th PMOS transistor P9 meets power vd D, and grid meets current controling signal, drain electrode and the 6th PMOS
The source electrode of transistor P6 is connected；The grid of the 6th PMOS transistor P6 and the grid of the 5th PMOS transistor P5 are connected, drain electrode with
The drain electrode of the 8th nmos pass transistor N8 is connected with the outfan XOUT of crystal oscillator；The grid of the 8th nmos pass transistor N8 and
The grid of seven nmos pass transistor N7 is connected, and the drain electrode of source electrode and the 11st nmos pass transistor N11 is connected；11st nmos pass transistor
The grid of N11 connects current controling signal, source ground.
Exemplarily, signal amplification specifically may include that with shaping unit 240
7th PMOS transistor P7, the 9th nmos pass transistor N9, Schmidt trigger T sum counter COUNTER, wherein,
The source electrode of the 7th PMOS transistor P7 connects power supply, and the grid of grid and the 6th PMOS transistor P6 is connected, and drain electrode is touched with Schmidt
The drain electrode of the input and the 9th nmos pass transistor N9 of sending out device T is connected；The grid of the 9th nmos pass transistor N9 and the 8th NMOS are brilliant
The grid of body pipe N8 is connected, source ground；The outfan of Schmidt trigger T is connected with the input of enumerator COUNTER, meter
The outfan output starting of oscillation marking signal OSC-READY of number device COUNTER.
Wherein it is desired to explanation, owing to bias current generation unit 210 exists the degeneracy operating point that electric current is zero, because of
This is in order to make drive circuit at any time can normally work, and described drive circuit also needs to include that start unit 250 helps
Bias current generation unit 210 sets up correct DC point.The work process of start unit 250 is: when circuit is not actuated
Time, the grid voltage of the first nmos pass transistor N1 is zero, and the electric current of the first PMOS transistor P1 and the second PMOS transistor P2 is
Zero, and crystal oscillator starting of oscillation marking signal OSC-READY is low level, and therefore the tenth bi-NMOS transistor N12 turns off, the
Ten PMOS transistor P10 conductings, charge to the gate node of the 13rd nmos pass transistor N13, the 13rd nmos pass transistor N13's
Grid voltage raises, the 13rd nmos pass transistor N13 conducting, and conducting electric current makes the second PMOS transistor P2 grid voltage fall
Low, therefore the second PMOS transistor P2 and the first PMOS transistor P1 are gradually turned on, the grid voltage of the first nmos pass transistor N1
Rise.After circuit start is stably, the grid voltage of the first nmos pass transistor N1 makes the tenth bi-NMOS transistor N12 lead
Logical, due to the pipe of the most spacious ratio that the tenth PMOS transistor P10 is selected, its ducting capacity is weaker than the tenth bi-NMOS transistor
N12, therefore the grid voltage of the 13rd nmos pass transistor N13 drops to nearly zero, and the 13rd nmos pass transistor N13 turns off.This
Time start unit 250 in the tenth bi-NMOS transistor N12 and the tenth PMOS transistor P10 pipe all turn on, this branch road can disappear
Consumption one part of current, but after starting of oscillation stablized by crystal oscillator, starting of oscillation marking signal OSC-READY is set to high level, will
Tenth PMOS transistor P10 turns off, thus realizes when, after crystal oscillator steady operation, start unit 250 does not consume electric current, from
And further reduce the power consumption of whole drive circuit.
In bias current generation unit 210, the first PMOS transistor P1 and the second PMOS transistor P2 are image current
Mirror, it is assumed that the ratio of the breadth length ratio of the second nmos pass transistor N2 and the first nmos pass transistor N1 isWherein, K table
Show the ratio of the breadth length ratio of the second nmos pass transistor N2 and the first nmos pass transistor N1, W, L represent respectively transistor raceway groove width and
Long, then the bias current that bias current generation unit 210 produces is:
Wherein, IBRepresenting bias current, W, L represent raceway groove width and the length of the first nmos pass transistor N1 respectively, and K represents second
The ratio of the breadth length ratio of nmos pass transistor N2 and the first nmos pass transistor N1, R represents the resistance of the first resistance R, μnRepresent that NMOS is brilliant
The carrier mobility of body pipe, CoxThe transistor gate electric capacity of representation unit area.Visible, bias current IBSize and power supply electricity
VDD is unrelated for pressure, and therefore along with the change of supply voltage VDD, the operating current change of circuit is little, and correspondingly, circuit design is not
With leaving the biggest surplus, reduce the power consumption of circuit further.
It is the 6th nmos pass transistor N6 that electric current can configure play amplification in amplifier unit 230, the 7th NMOS crystal
Pipe N7 and the 8th nmos pass transistor N8, play current source effect is the 4th PMOS transistor P4, the 5th PMOS transistor P5 and
Six PMOS transistor P6, that play on-off action is the tenth nmos pass transistor N10, the 11st nmos pass transistor N11 and the 8th PMOS
Transistor P8, the 9th PMOS transistor P9.Tenth nmos pass transistor N10, the 11st nmos pass transistor N11 and the 8th PMOS crystal
Pipe P8, the current controling signal that the grid of the 9th PMOS transistor P9 connects, can need to be realized by program according to design.
Wherein, in whole drive circuit, the 3rd PMOS transistor P3, the 4th PMOS transistor P4, the 5th PMOS transistor
P5, the 6th PMOS transistor P6 and the first PMOS transistor P1 and the second PMOS transistor P2 constitute mirror current source, for each several part
Unit provides bias current.Wherein the 4th PMOS transistor P4, the 5th PMOS transistor P5 and the 6th PMOS transistor P6 are constituted can
Configuration current mirror, provides electric current for amplifier.By controlling switching tube the tenth nmos pass transistor N10, the 11st nmos pass transistor
N11 and the 8th PMOS transistor P8, the regulation electric current that is switched on and off of the 9th PMOS transistor P9 can configure amplifier unit
Size of current.When crystal oscillator characteristics is different, and the off-chip matching capacitance of use varies in size, and temperature and manufacturing process become
During change, required amplifier mutual conductance also can change, and therefore using electric current to can configure amplifier unit can be various different
Under the conditions of flexible configuration power consumption size, reach ultimate attainment low power consumption characteristic.Typically, when using lowest power consumption configuration, the 5th
PMOS transistor P5 and the 6th PMOS transistor P6 branch road turn off, and electric current is zero, and now the 6th nmos pass transistor N6 is as amplification
Device drives crystal oscillator, by designing suitable transistor size so that the 6th nmos pass transistor N6 is biased in subthreshold value
District, the now mutual conductance of amplifier circuit with the relation of operating current isWherein, n be one relevant to technique
Parameter, its representative value is between 1～2, IDFor operating current, k is Boltzmann constant, and T is absolute temperature, and q is electron charge,
Under room temperature, kT/q ≈ 26mV.Visible, compared to traditional transistor inverter amplifying circuit, this it is biased under certain electric current,
Be operated in the transistor amplifier circuit of sub-threshold region have higher current efficiency (under certain electric current, be provided that bigger across
Lead), such that it is able to realize low power consumption characteristic.5th nmos pass transistor N5 is operated in linear zone, and constituting a resistance is the 6th
Nmos pass transistor N6 sets up DC point, and the 3rd nmos pass transistor N3 and the 4th nmos pass transistor N4 composition diode connects
Transistor provides bias voltage for the 5th nmos pass transistor N5.Make the 3rd nmos pass transistor N3 and the 6th NMOS brilliant by design
Body pipe N6 mates, and makes them have identical grid voltage, it is assumed that the 4th nmos pass transistor N4's and the 5th nmos pass transistor N5
The ratio of breadth length ratio isThen the conducting resistance of the 5th nmos pass transistor N5 is
Wherein, W, L represent raceway groove width and length, the K of nmos pass transistor respectivelyrRepresent the 4th nmos pass transistor N4 and the 5th nmos pass transistor
The ratio of the breadth length ratio of N5, μnRepresent the carrier mobility of nmos pass transistor, CoxThe transistor gate electric capacity of representation unit area, Ip3
Represent the operating current of the 3rd PMOS transistor P3；Suitable resistance value can be obtained by regulation relevant parameter.Typically, right
In 32.768kHz crystal oscillator, in order to not affect circuit start-oscillation characteristic, typically require that feedback resistance RF, more than 10M Ω, uses
Described transistor resistance design can be substantially reduced the area shared by feedback resistance, thus reduces the face of whole drive circuit
Long-pending.
When drive circuit steady operation, generation sine is shaken by input XIN and the input XOUT end of crystal oscillator
Swing signal, but amplitude is less.Amplifying with shaping unit 240 at signal, the 9th nmos pass transistor N9 is to crystal oscillator
Input XIN signal amplifies, and obtains final square-wave output signal OSC-OUT by Schmidt trigger T shaping, then leads to
Cross and enumerator COUNTER output crystal oscillator starting of oscillation marking signal OSC-READY is set.
The technical scheme of the present embodiment, gives described resistance unit and the configurable amplification of electric current by bias current generation unit
Device unit provides operating current；By resistance unit, can configure amplifier unit to described electric current and set up DC point；Pass through
Electric current can configure amplifier unit and is amplified operating current under the control of DC point, to drive crystal oscillator to rise
Shake, reduce the power consumption of drive circuit, set up direct current work by using resistance unit to can configure amplifier unit to described electric current
Make a little, reduce the area shared by drive circuit, can configure amplifier unit improve the suitable of drive circuit by arranging electric current
Use scope.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although by above example, the present invention is carried out
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other Equivalent embodiments more can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (8)
1. a crystal oscillator drive circuit, it is characterised in that including: bias current generation unit, resistance unit and electric current
Configurable amplifier unit；Wherein,
Bias current generation unit, can configure amplifier unit with described resistance unit and described electric current respectively and is connected, be used for
Described resistance unit and electric current can configure amplifier unit and provide operating current；
Resistance unit, can configure amplifier unit with described electric current and is connected, and builds for can configure amplifier unit to described electric current
Vertical DC point；
Electric current can configure amplifier unit, is connected with input and the outfan of crystal oscillator respectively, in DC operation
Operating current is amplified, to drive crystal oscillator starting of oscillation under the control of point.
Circuit the most according to claim 1, it is characterised in that also include: signal amplifies and shaping unit, can join with electric current
Put amplifier unit to be connected, for the input end signal of crystal oscillator is amplified and shaping, and export crystal oscillator
Starting of oscillation marking signal.
Circuit the most according to claim 2, it is characterised in that also include: start unit, produces single respectively with bias current
Unit is connected with shaping unit with signal amplification, under the control of starting of oscillation marking signal, controls bias current generation unit
Start.
Circuit the most according to claim 3, it is characterised in that described bias current generation unit specifically includes:
First PMOS transistor, the second PMOS transistor, the first nmos pass transistor, the second nmos pass transistor and the first resistance, its
In:
First PMOS transistor is connected with the grid of the second PMOS transistor, and source electrode connects power supply, constitutes current mirror, and a PMOS is brilliant
The drain electrode of body pipe is connected with the first end of the first resistance and the grid of the first nmos pass transistor；The drain electrode of the second PMOS transistor
It is connected with the grid of the second PMOS transistor and the drain electrode of the second nmos pass transistor；The grid of the second nmos pass transistor and first
The drain electrode of nmos pass transistor and the second end of the first resistance are connected, the source electrode of the second nmos pass transistor and the first nmos pass transistor
Source grounding.
Circuit the most according to claim 4, it is characterised in that described resistance unit specifically includes:
3rd PMOS transistor, the 3rd nmos pass transistor, the 4th nmos pass transistor and three nmos pass transistors be composed in series
Five nmos pass transistors, wherein,
The grid of the 3rd PMOS transistor and the grid of the second PMOS transistor are connected, and source electrode meets power supply, drain electrode and the 5th NMOS
The grid of transistor and the drain and gate of the 4th nmos pass transistor are connected；The source electrode of the 4th nmos pass transistor and the 3rd NMOS are brilliant
The drain and gate of body pipe is connected；The source ground of the 3rd nmos pass transistor.
Circuit the most according to claim 5, it is characterised in that described electric current can configure amplifier unit and specifically includes:
4th PMOS transistor, the 5th PMOS transistor, the 6th PMOS transistor, the 8th PMOS transistor, the 9th PMOS crystal
Pipe, the 6th nmos pass transistor, the 7th nmos pass transistor, the 8th nmos pass transistor, the tenth nmos pass transistor and the 11st NMOS are brilliant
Body pipe, wherein,
The source electrode of the 4th PMOS transistor connects power supply, grid and the 3rd PMOS transistor grid and the grid of the 5th PMOS transistor
Being connected, drain electrode is connected with the outfan of drain electrode, the drain electrode of the 5th nmos pass transistor and the crystal oscillator of the 6th nmos pass transistor；
The grid of the 6th nmos pass transistor and the input of the source electrode of the 5th nmos pass transistor and crystal oscillator are connected, source ground；
The source electrode of the 8th PMOS transistor connects power supply, and grid connects current controling signal, drain electrode is connected with the source electrode of the 5th PMOS transistor；
The drain electrode of the 5th PMOS transistor is connected with the drain electrode of the 7th nmos pass transistor and the outfan of crystal oscillator；7th NMOS is brilliant
The source electrode of body pipe and the drain electrode of the tenth nmos pass transistor are connected, and the grid of grid and the 6th nmos pass transistor is connected；Tenth NMOS
The source ground of transistor, grid connects current controling signal；The source electrode of the 9th PMOS transistor connects power supply, and grid connects electric current control
Signal, drain electrode is connected with the source electrode of the 6th PMOS transistor；The grid of the 6th PMOS transistor and the grid of the 5th PMOS transistor
The most connected, drain electrode is connected with the drain electrode of the 8th nmos pass transistor and the outfan of crystal oscillator；The grid of the 8th nmos pass transistor
Pole is connected with the grid of the 7th nmos pass transistor, and the drain electrode of source electrode and the 11st nmos pass transistor is connected；11st NMOS crystal
The grid of pipe connects current controling signal, source ground.
Circuit the most according to claim 6, it is characterised in that the amplification of described signal specifically includes with shaping unit:
7th PMOS transistor, the 9th nmos pass transistor, Schmidt trigger sum counter, wherein, the 7th PMOS transistor
Source electrode connects power supply, and the grid of grid and the 6th PMOS transistor is connected, drain electrode and the input and the 9th of Schmidt trigger
The drain electrode of nmos pass transistor is connected；The grid of the 9th nmos pass transistor and the grid of the 8th nmos pass transistor are connected, source ground；
The outfan of Schmidt trigger is connected with the input of enumerator, the outfan output starting of oscillation marking signal of enumerator.
Circuit the most according to claim 7, it is characterised in that described start unit specifically includes:
The tenth PMOS transistor, the tenth bi-NMOS transistor and the 13rd NMOS crystal that three PMOS transistor are composed in series
Pipe, wherein,
The source electrode of the tenth PMOS transistor connects power supply, and grid is connected with the outfan of enumerator, drain electrode and the 13rd NMOS crystal
The grid of pipe and the drain electrode of the tenth bi-NMOS transistor are connected；The drain electrode of the 13rd nmos pass transistor and the first PMOS transistor
Grid is connected, source ground；The source ground of the tenth bi-NMOS transistor, the grid of grid and the first nmos pass transistor is connected.
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| CN201610657864.XA CN106100633B (en) | 2016-08-11 | 2016-08-11 | Crystal oscillator driving circuit |
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| CN110113032A (en) * | 2019-05-17 | 2019-08-09 | 芯翼信息科技(南京)有限公司 | Crystal oscillation control circuit and its control method |
| CN111585539A (en) * | 2020-04-26 | 2020-08-25 | 和芯星通（上海）科技有限公司 | Crystal oscillator circuit and control method thereof |
| CN112600518A (en) * | 2021-01-06 | 2021-04-02 | 北京中科芯蕊科技有限公司 | Automatic amplitude control type crystal oscillator |
| CN112787661A (en) * | 2020-12-30 | 2021-05-11 | 湖南国科微电子股份有限公司 | Quick-oscillation-starting crystal oscillator driving circuit and integrated circuit |
| CN114019342A (en) * | 2022-01-05 | 2022-02-08 | 深圳佑驾创新科技有限公司 | Passive crystal oscillator test circuit |
| CN115437453A (en) * | 2021-06-03 | 2022-12-06 | 上海艾为电子技术股份有限公司 | Biasing circuit and self-biased OSC circuit |
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| CN114019342A (en) * | 2022-01-05 | 2022-02-08 | 深圳佑驾创新科技有限公司 | Passive crystal oscillator test circuit |
| CN114019342B (en) * | 2022-01-05 | 2022-04-05 | 深圳佑驾创新科技有限公司 | Passive crystal oscillator test circuit |
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