CN106097978A - Shifting deposit unit, shift register, gate driver circuit and display device - Google Patents
Shifting deposit unit, shift register, gate driver circuit and display device Download PDFInfo
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- CN106097978A CN106097978A CN201610698370.6A CN201610698370A CN106097978A CN 106097978 A CN106097978 A CN 106097978A CN 201610698370 A CN201610698370 A CN 201610698370A CN 106097978 A CN106097978 A CN 106097978A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
Abstract
The present invention provides a kind of shifting deposit unit, including input module, drive module, drop-down module, drop-down control module, high level input, low level input, first clock signal terminal, second clock signal end, signal input part and signal output part, the control end of drop-down control module is connected with signal input part, the first input end of drop-down control module is connected with high level signal input, second input of drop-down control module and the first clock signal terminal are connected, 3rd input of drop-down control module is connected with low level signal input, the outfan of drop-down control module is connected with the control end of drop-down module, first clock signal of input signal and the first clock signal terminal input that drop-down control module can input a signal into end input carries out XOR.The present invention also provides for a kind of shift register, a kind of gate driver circuit and a kind of display device.Shifting deposit unit provided by the present invention may insure that and only exports high level signal in the output stage.
Description
Technical field
The present invention relates to Display Technique field, in particular it relates to a kind of shifting deposit unit, one include this shift LD
The shift register of unit, a kind of gate driver circuit including this shift register and a kind of this gate driver circuit that includes
Display device.
Background technology
In a display device, utilize gate driver circuit to provide and sweep the scanning letter opened line by line so that the grid line of display floater
Number.Gate driver circuit includes the stages shift deposit unit of cascade, every grade of shifting deposit unit correspondence a line grid line.
But prior art exists shifting deposit unit can not well close, cause grid line to open by mistake the phenomenon opened.
Summary of the invention
It is an object of the invention to provide a kind of shifting deposit unit, a kind of shift LD including this shifting deposit unit
Device, a kind of gate driver circuit including this shift register and a kind of display device including this gate driver circuit, including
The gate driver circuit of described shifting deposit unit does not haves the situation of output scanning signal by mistake.
To achieve these goals, as one aspect of the present invention, it is provided that a kind of shifting deposit unit, wherein, described
Shifting deposit unit includes input module, drives module, drop-down module, drop-down control module, high level input, low level defeated
Enter end, the first clock signal terminal, second clock signal end, signal input part and signal output part,
The outfan of described input module is connected with the control end of described driving module, with can be to described driving module
Control end charging；
The outfan of described driving module is connected with described signal output part, the first input end of described driving module and institute
Stating the electrical connection of second clock signal end, the second input of described driving module is connected with described first clock signal terminal, works as institute
State and drive the control termination of module when receiving high level signal, it is possible to by the first input end of described driving module and described signal
Outfan turns on, and when described first clock signal terminal input high level signal, the second input energy of described driving module
Enough control end conductings with described driving module；
First outfan of described drop-down module is connected with the control end of described driving module, the second of described drop-down module
Outfan is connected with described signal output part, and the input of described drop-down module is connected with described low level input, described under
When the control termination of drawing-die block receives high level signal, it is possible to by the input of described drop-down module and the first of this drop-down module
Outfan and the second outfan conducting of this drop-down module；
The control end of described drop-down control module is connected with described signal input part, and the first of described drop-down control module is defeated
Enter end to be connected with described high level signal input, the second input of described drop-down control module and the first clock signal terminal phase
Even, the 3rd input of described drop-down control module is connected with described low level signal input, described drop-down control module
Outfan is connected with the control end of described drop-down module, and it is defeated that described signal input part can be inputted by described drop-down control module
The first clock signal entering signal and described first clock signal terminal input carries out XOR.
Preferably, described drop-down control module includes phase inverter and output transistor, the first input end of described phase inverter
Being connected with described high level signal input, the second input of described phase inverter is connected with described low level signal input,
The control end of described phase inverter is connected with described signal input part, the outfan of described phase inverter and the grid of described output transistor
The most connected, the first pole of described output transistor is connected with the first clock signal terminal, and the second pole of described output transistor is formed
Outfan for described drop-down control module.
Preferably, described phase inverter includes the first inverted transistors and the second inverted transistors, described first anti-phase crystal
First pole of pipe is connected with described high level signal input with grid, the second pole of described first inverted transistors and described the
The first of two inverted transistors is the most connected, and the grid of described second inverted transistors is connected with described signal input part, and described
Second pole of two inverted transistors is connected with described low level signal input, and the outfan of described phase inverter is first anti-with described
The second of phase transistor is the most connected, and the breadth length ratio of described first inverted transistors is more than the wide length of described second inverted transistors
Ratio.
Preferably, described input module includes input transistors, and the grid of described input transistors and the first pole are with described
Signal input part is connected, and the second pole of described input transistors is formed as the outfan of described input module.
Preferably, described driving module includes driving transistor, the first electric capacity, and the grid of described driving transistor is with described
The outfan of input module is connected, and the first pole of described driving transistor is connected with second clock signal end, described driving crystal
Second pole of pipe is connected with described signal output part, the first end of described first electric capacity and the outfan phase of described input module
Even, the second end of described first electric capacity is connected with described signal output part.
Preferably, described driving module also includes the second electric capacity, the first end of described second electric capacity and the first clock signal
End is connected, and the second end of described second electric capacity is connected with the grid of described driving transistor.
Preferably, the amount of capacity phase of the capacity of described second electric capacity and the gate-drain parasitic capacitances of described driving transistor
With.
Preferably, described drop-down module includes the first pull-down transistor and the second pull-down transistor, described first time crystal pulling
The grid of body pipe is connected with the grid of described second pull-down transistor, to form the control end of described drop-down module, and described first
First pole of pull-down transistor is formed as the first outfan of described drop-down module, the second pole of described first pull-down transistor with
Described low level signal input is connected, and it is second defeated that the first pole of described second pull-down transistor is formed as described drop-down module
Going out end, the second pole of described second pull-down transistor is connected with described low level signal input.
As another aspect of the present invention, it is provided that a kind of shift register, described shift register includes the shifting of cascade
Position deposit unit, wherein, described shifting deposit unit is above-mentioned shifting deposit unit provided by the present invention.
Still another aspect as the present invention, it is provided that a kind of gate driver circuit, described gate driver circuit includes displacement
Depositor, wherein, described shift register is above-mentioned shift register provided by the present invention.
As it is still another aspect of the present invention to provide a kind of display device, described display device includes gate driver circuit,
Wherein, described gate driver circuit is above-mentioned gate driver circuit provided by the present invention.
Preferably, described display device is organic LED display device.
In shifting deposit unit provided by the present invention, drop-down control module can be by the first clock signal and input
Signal carries out XOR and exports to realize signal, thus controls drop-down module and turn on, defeated in charging stage and drop-down stage
Go out stage closedown.It may thereby be ensured that shifting deposit unit is only at output stage output high level signal.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and constitutes the part of description, with following tool
Body embodiment is used for explaining the present invention together, but is not intended that limitation of the present invention.In the accompanying drawings:
Fig. 1 is the module diagram of shifting deposit unit provided by the present invention；
Fig. 2 is the circuit diagram of a kind of embodiment of shifting deposit unit provided by the present invention；
Fig. 3 is the circuit diagram of the another kind of embodiment of shifting deposit unit provided by the present invention；
Fig. 4 is the simulation waveform schematic diagram utilizing gate driver circuit provided by the present invention output scanning signal.
Description of reference numerals
100: input module 200: drive module
300: drop-down module 400: drop-down control module
410: phase inverter
Detailed description of the invention
Below in conjunction with accompanying drawing, the detailed description of the invention of the present invention is described in detail.It should be appreciated that this place is retouched
The detailed description of the invention stated is merely to illustrate and explains the present invention, is not limited to the present invention.
As it is shown in figure 1, as one aspect of the present invention, it is provided that a kind of shifting deposit unit, described shifting deposit unit
Including input module 100, drive module 200, drop-down module 300, drop-down control module 400, high level input VDD, low electricity
Flat input VSS, the first clock signal terminal CLK1, second clock signal end CLK2, signal input part V (n-1) and signal output
End V (n).
The outfan of input module 100 is connected with the control end driving module 200.
The outfan driving module 200 is connected with signal output part V (n), drives the first input end and second of module 200
Clock signal terminal CLK2 is connected, and drives the second input of module 200 and the first clock signal terminal CLK1 to be connected, when driving module
When the control termination of 200 receives high level signal, it is possible to by the first input end of this driving module 200 and signal output part V (n)
Conducting, and when the first clock signal terminal CLK1 input high level signal, drive the second input and the driving module of module 200
Control end conducting.
First outfan of drop-down module 300 is connected with the control end driving module 200, and the second of drop-down module 300 is defeated
Going out end to be connected with signal output part V (n), the input of drop-down module 300 is connected with low level input Vss, drop-down module 300
Control termination when receiving high level signal, it is possible to defeated by the first of the drop-down module 300 of input and this of this drop-down module 300
Go out the second outfan conducting of end and this drop-down module 300.
The control end of drop-down control module 400 is connected with signal input part V (n-1), and the first of drop-down control module 400 is defeated
Enter end to be connected with high level signal input VDD, the second input of drop-down control module 400 and the first clock signal terminal CLK1
Being connected, the 3rd input of drop-down control module 400 is connected with low level signal input VSS, drop-down control module 400 defeated
Go out end to be connected with the control end of drop-down module 300.Drop-down control module 400 can input a signal into the input that end V (n-1) inputs
First clock signal of signal and the first clock signal terminal CLK1 input carries out XOR.
So-called XOR refers to, when input signal and the first clock signal are all high level signal or are all low level letter
Number time, drop-down control module 400 can be with the signal of output low level；When in input signal with the first clock signal is high
Level signal another when being low level signal, drop-down control module 400 exports high level signal.
For drop-down control module 400, the signal of its first input end input is high level signal forever, and it is the 3rd years old
The signal of input input is low level signal forever, and in the charging stage, it controls termination and receives high level signal, and it is second defeated
Entering termination, receive is the first clock signal.
The output stage of shifting deposit unit includes charging stage, output stage and drop-down stage.Provided by the present invention
Technical scheme in, by drive module 200 output signal.The signal driving module 200 to export is then to be believed by second clock
Number end CLK2 provide.It is to say, in the output stage, the second clock signal of second clock signal end CLK2 is high level.
The first clock signal that first clock signal terminal CLK1 receives is complementary with second clock signal sequence.The like, in charging
In the stage, the first clock signal is high level, and second clock signal is low level；It is low electricity in output stage the first clock signal
Flat, second clock signal is high level；Being high level in drop-down stage the first clock signal, second clock signal is low level.
One function of drop-down control module 400 is to control drop-down module 300 in charging stage (that is upper level shifting
The stage of position deposit unit output) close, so that drive the outfan of module 200 can the second clock of output low level
Signal.Another function of drop-down control module 400 is to control drop-down module 300 to turn in pull-down node, so that drive
The outfan output low level signal of module 200.
In the charging stage, the first clock signal of the first clock signal terminal CLK1 input is high level signal, signal input
What end V (n-1) inputted is also high level signal, and therefore, the control end output that drop-down control module 400 pulls down module 300 is low
Level signal, the most drop-down module 300 is to close.
In the output stage, the first clock signal of the first clock signal terminal CLK1 input is low level signal, and signal inputs
What end V (n-1) inputted is low level signal, therefore, and drop-down control module output low level signal so that drop-down module 300
Input and the first outfan, the second outfan disconnect.Module 200 is driven to have the merit of the storage electricity being filled with on last stage
Can, therefore, drive the control end of module 200 can keep high level so that second clock signal end CLK2 and signal output part V
N () turns on, the signal of output high level.
In the drop-down stage, the first clock signal of the first clock signal end CLK1 input is high level signal, signal
What input V (n-1) inputted is low level signal, and therefore, drop-down control module 400 pulls down the control end output of module 300
First outfan of high level signal, the input of the most drop-down module 300 and this drop-down module 300 and this drop-down module
The second outfan conducting of 300, such that it is able to utilize the low level signal that low level input VSS inputs by signal output part V
N the current potential of () drags down, it is ensured that now will not export the signal of high level.
Therefore, in shifting deposit unit provided by the present invention, drop-down control module 400 can be by believing the first clock
Number and input signal carry out XOR to realize signal output, thus control drop-down module 300 on charging stage and drop-down rank
Section turns on, closes in the output stage.It may thereby be ensured that shifting deposit unit is only at output stage output high level signal.
In the present invention, the concrete structure of drop-down control module 400 is not particularly limited.Institute in figs. 2 and 3
In the preferred implementation shown, drop-down control module 400 includes phase inverter 410 and output transistor T4.The of this phase inverter 410
One input is connected with high level signal input VDD, the second input of phase inverter 410 and low level signal input VSS
Being connected, the end that controls of phase inverter 410 is formed as the first control end of drop-down control module 400, with signal input part V (n-1) phase
Even, the outfan of phase inverter 410 is connected with the grid of output transistor T4, and first pole of output transistor T4 is formed as drop-down control
Second control end of molding block 400, second pole of output transistor T4 is formed as the outfan of drop-down control module 400.
Operation principle based on phase inverter, when the control end input high level signal of phase inverter 410, phase inverter 410 is defeated
Going out low level signal, when the control end input low level signal of phase inverter 410, phase inverter 410 exports high level signal.
Specifically, when signal input part V (n-1) input high level signal, phase inverter 410 is to the grid of output transistor T4
Pole output low level signal, and now the first of output transistor T4 the extremely high level signal, therefore, output transistor T4 is now
It is off, thus output low level signal.
When signal input part V (n-1) input low level signal, the first clock signal terminal CLK1 input high level signal,
Phase inverter 410 exports high level signal to the grid of output transistor T1, so that output transistor T1 conducting, thus by the
The control end of the high level signal output extremely drop-down module 300 of one clock signal terminal CLK1.
When signal input part V (n-1) input low level signal, the first clock signal terminal CLK1 input low level signal,
Phase inverter 410 exports high level signal, now output transistor T4 conducting, and by the low electricity of the first clock signal terminal CLK1 input
The control end of ordinary mail number output extremely drop-down module 300.
In embodiment shown in fig. 2, for the ease of processing and manufacturing, phase inverter 410 includes the first inverted transistors
T1 and the second inverted transistors T2, the first pole of the first inverted transistors T1 is connected with high level signal input VDD with grid,
Second pole of the first inverted transistors T1 is extremely connected with the first of the second inverted transistors T2, the grid of the second inverted transistors T2
Being connected with signal input part V (n-1), the second pole of the second inverted transistors T2 is connected with low level signal input Vss, anti-phase
The outfan of device is extremely connected with the second of described first inverted transistors.Further, the breadth length ratio of the first inverted transistors T1 is more than
The breadth length ratio of the second inverted transistors T2.
When signal input part V (n-1) exports high level signal, the first transistor T1 and transistor seconds T2 is both turned on,
But, owing to the breadth length ratio of the first inverted transistors T1 is more than the breadth length ratio of the second inverted transistors T2, therefore, phase inverter 410
The voltage of outfan is pulled low, thus output low level signal.
When signal input part V (n-1) output low level signal, the first transistor T1 turns on, the second inverted transistors T2
Cut-off, therefore, phase inverter 410 outfan output high level signal.
Certainly, the present invention is not limited to this.As it is shown on figure 3, phase inverter 410 can also have a following structure: phase inverter 410
Including the first inverted transistors T1 and the second inverted transistors T2, the first inverted transistors T1 and the second inverted transistors T2, the
One inverted transistors T1 is P-type transistor, and the second inverted transistors T2 is N-type transistor.First inverted transistors T1 and second
The grid of inverted transistors T2 is all connected with signal input part V (n-1), and the first pole of the first inverted transistors T1 is defeated with high level
Entering to hold VDD to be connected, the second pole of the first inverted transistors T1 is extremely connected with the first of the second inverted transistors T2, the second anti-phase crystalline substance
First pole of body pipe T2 is connected with low level input VSS, and the first reverse transistor T1 is formed as the output of phase inverter 410
End.
In the present invention, the concrete structure of input module 100 is not particularly limited, in fig. 2 shown in concrete
In embodiment, input module 100 includes input transistors T3, and the grid of this input transistors T3 and the first pole input with signal
End V (n-1) is connected, and second pole of input transistors T3 is formed as the outfan of input module 100.
During signal input part V (n-1) input high level signal, the first pole of input transistors T3 conducting and the second pole, when
During signal input part V (n-1) input low level signal, first pole of input transistors T3 and the second pole disconnect.
In the present invention, the concrete structure driving module 200 do not had special restriction yet.In fig. 2 shown in concrete
In embodiment, drive module 200 to include driving transistor T6, the first electric capacity C2, drive grid and the input mould of transistor T6
The outfan of block 100 is connected, and drives first pole of transistor T6 to be connected with second clock signal end CLK2, drives transistor T6's
Second pole is connected with signal output part V (n), and first end of the first electric capacity C1 is connected with the outfan of input module 100, the first electricity
The second end holding C1 is connected with signal output part V (n).
It is easily understood that in the charging stage, charged to the first electric capacity C1 by input module 100.In the output stage, by
Being to close in drop-down module 300, therefore, first end of the first electric capacity C1 is floating, under boot strap, by the first electric capacity C1's
Second terminal potential is the highest, so that drive the first pole and the conducting of the second pole of transistor T6.
Preferably, module 200 is driven can also to include the second electric capacity C2, first end of the second electric capacity C2 and the first clock letter
Number end CLK1 be connected, second end of the second electric capacity C2 with drive transistor T6 grid be connected.In the present embodiment, the second electricity
Hold C2 to may be used for reducing the noise that the gate-drain parasitic capacitances Cgd of even counteracting driving transistor T6 causes.
In order to offset the gate-drain parasitic capacitances Cgd driving transistor T6, it is preferable that the capacity of the second electric capacity C2 and driving crystalline substance
The amount of capacity of the gate-drain parasitic capacitances Cgd of body pipe T6 is identical.
In the present invention, the concrete structure of drop-down module 300 is not particularly limited, the embodiment party shown in Fig. 2
In formula, drop-down module 300 includes the first pull-down transistor T5 and the second pull-down transistor T7.The grid of the first pull-down transistor T5
It is connected with the grid of the second pull-down transistor T7, to form the control end of drop-down module 300.The first of first pull-down transistor T5
Pole is formed as the first outfan of drop-down module 300, second pole of the first pull-down transistor T5 and low level signal input VSS
Being connected, first pole of the second pull-down transistor T7 is formed as the second outfan of drop-down module 300, the second pull-down transistor T7's
Second pole is connected with low level signal input VSS.
Control in drop-down module 300 terminates when receiving high level signal, the first pull-down transistor T5 and second time crystal pulling
Body pipe T7 is both turned on, such that it is able to outfan output low level signal.Control in drop-down module 300 terminates and receives low level
During signal, the first pull-down transistor T5 and the second pull-down transistor T7 is turned off.
As another aspect of the present invention, it is provided that a kind of shift register, described shift register includes the shifting of cascade
Position deposit unit, wherein, described shifting deposit unit is above-mentioned shifting deposit unit provided by the present invention.
Skilled addressee readily understands that, in the two-stage shifting deposit unit of cascade, next stage shift LD
The signal input part of unit is connected with the signal output part of upper level shifting deposit unit.
When the shifting deposit unit of upper level exports high level signal, the shifting deposit unit of next stage can be controlled
Drop-down module is closed, and by second clock signal end input low level signal.When the output of upper level shifting deposit unit is low
During level signal, next stage shifting deposit unit output high level signal can be controlled.
Shown in Fig. 4 is the waveform modelling figure of shifting deposit unit provided by the present invention, it can be seen that
Other any stage in addition to the output stage, are all able to ensure that signal output part does not export high level signal.
As it is still another aspect of the present invention to provide a kind of gate driver circuit, described gate driver circuit includes displacement
Depositor, wherein, described shift register is above-mentioned shift register provided by the present invention.
Described gate driver circuit is able to ensure that only have a line grid line to receive effective high level signal at synchronization,
Such that it is able to improve the display effect of the display device including described gate driver circuit.
Still another aspect as the present invention, it is provided that a kind of display device, described display device includes gate driver circuit,
Wherein, described gate driver circuit is above-mentioned gate driver circuit provided by the present invention.
Owing to display device provided by the present invention employs described gate driver circuit, thereby it can be assured that each row is only
Receiving scanning signal time side output high level signal, it is to avoid leaky, improve display quality.
Gate driver circuit provided by the present invention is particularly suited in organic LED display device, therefore, excellent
Selection of land, described display device is organic LED display device.
It is understood that the principle that is intended to be merely illustrative of the present of embodiment of above and the exemplary enforcement that uses
Mode, but the invention is not limited in this.For those skilled in the art, in the essence without departing from the present invention
In the case of god and essence, can make various modification and improvement, these modification and improvement are also considered as protection scope of the present invention.
Claims (12)
1. a shifting deposit unit, it is characterised in that described shifting deposit unit includes input module, drives module, drop-down
Module, drop-down control module, high level input, low level input, the first clock signal terminal, second clock signal end, letter
Number input and signal output part,
The outfan of described input module is connected with the control end of described driving module, with can be to the control of described driving module
End charging；
The outfan of described driving module is connected with described signal output part, the first input end of described driving module and described the
Two clock signal terminal electrical connections, the second input of described driving module is connected with described first clock signal terminal, drives when described
When the control termination of dynamic model block receives high level signal, it is possible to the first input end of described driving module is exported with described signal
End conducting, and when described first clock signal terminal input high level signal, the second input of described driving module can be with
The control end conducting of described driving module；
First outfan of described drop-down module is connected with the control end of described driving module, the second output of described drop-down module
End is connected with described signal output part, and the input of described drop-down module is connected with described low level input, described lower drawing-die
When the control termination of block receives high level signal, it is possible to by the first output of the input of described drop-down module with this drop-down module
End and the second outfan conducting of this drop-down module；
The control end of described drop-down control module is connected with described signal input part, the first input end of described drop-down control module
Being connected with described high level signal input, the second input of described drop-down control module and the first clock signal terminal are connected,
3rd input of described drop-down control module is connected with described low level signal input, the output of described drop-down control module
End is connected with the control end of described drop-down module, the input letter that described signal input part can be inputted by described drop-down control module
Number with described first clock signal terminal input the first clock signal carry out XOR.
Shifting deposit unit the most according to claim 1, it is characterised in that described drop-down control module include phase inverter and
Output transistor, the first input end of described phase inverter is connected with described high level signal input, the second of described phase inverter
Input is connected with described low level signal input, and the control end of described phase inverter is connected with described signal input part, described
The outfan of phase inverter is connected with the grid of described output transistor, the first pole of described output transistor and the first clock signal
End is connected, and the second pole of described output transistor is formed as the outfan of described drop-down control module.
Shifting deposit unit the most according to claim 2, it is characterised in that described phase inverter includes the first inverted transistors
With the second inverted transistors, the first pole of described first inverted transistors is connected with described high level signal input with grid,
Second pole of described first inverted transistors is extremely connected with the first of described second inverted transistors, described second inverted transistors
Grid be connected with described signal input part, the second pole of described second inverted transistors and described low level signal input phase
Even, the outfan of described phase inverter is extremely connected with the second of described first inverted transistors, the width of described first inverted transistors
Long than the breadth length ratio more than described second inverted transistors.
Shifting deposit unit the most as claimed in any of claims 1 to 3, it is characterised in that described input module bag
Including input transistors, grid and first pole of described input transistors are connected with described signal input part, described input transistors
The second pole be formed as the outfan of described input module.
Shifting deposit unit the most as claimed in any of claims 1 to 3, it is characterised in that described driving module bag
Including driving transistor, the first electric capacity, the grid of described driving transistor is connected with the outfan of described input module, described driving
First pole of transistor is connected with second clock signal end, the second pole of described driving transistor and described signal output part phase
Even, the first end of described first electric capacity is connected with the outfan of described input module, and the second end of described first electric capacity is with described
Signal output part is connected.
Shifting deposit unit the most according to claim 5, it is characterised in that described driving module also includes the second electric capacity,
First end of described second electric capacity and the first clock signal terminal are connected, the second end of described second electric capacity and described driving transistor
Grid be connected.
Shifting deposit unit the most according to claim 6, it is characterised in that the capacity of described second electric capacity and described driving
The amount of capacity of the gate-drain parasitic capacitances of transistor is identical.
Shifting deposit unit the most as claimed in any of claims 1 to 3, it is characterised in that described drop-down module bag
Include the first pull-down transistor and the second pull-down transistor, the grid of described first pull-down transistor and described second pull-down transistor
Grid be connected, to form the control end of described drop-down module, the first pole of described first pull-down transistor be formed as described under
First outfan of drawing-die block, the second pole of described first pull-down transistor is connected with described low level signal input, described
First pole of the second pull-down transistor is formed as the second outfan of described drop-down module, the second of described second pull-down transistor
Pole is connected with described low level signal input.
9. a shift register, described shift register includes the shifting deposit unit of cascade, it is characterised in that described displacement
Deposit unit is the shifting deposit unit in claim 1 to 8 described in any one.
10. a gate driver circuit, described gate driver circuit includes shift register, it is characterised in that described displacement is posted
Storage is the shift register described in claim 9.
11. 1 kinds of display devices, described display device includes gate driver circuit, it is characterised in that described gate driver circuit
For the gate driver circuit described in claim 10.
12. display devices according to claim 11, it is characterised in that described display device is that Organic Light Emitting Diode shows
Showing device.
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| CN201610698370.6A CN106097978B (en) | 2016-08-19 | 2016-08-19 | Shifting deposit unit, shift register, gate driving circuit and display device |
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| CN111785199A (en) * | 2020-07-10 | 2020-10-16 | 昆山国显光电有限公司 | Scanning driving circuit, display panel and display device |
| WO2021008020A1 (en) * | 2019-07-16 | 2021-01-21 | 深圳市华星光电半导体显示技术有限公司 | Drive circuit |
| CN115171610A (en) * | 2022-07-28 | 2022-10-11 | 惠科股份有限公司 | Drive circuit and display panel |
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| Publication number | Publication date |
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| CN106097978B (en) | 2018-08-03 |
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