CN106094963A - APD array chip bias voltage Full-automatic temperature compensation system - Google Patents
APD array chip bias voltage Full-automatic temperature compensation system Download PDFInfo
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- CN106094963A CN106094963A CN201610628039.7A CN201610628039A CN106094963A CN 106094963 A CN106094963 A CN 106094963A CN 201610628039 A CN201610628039 A CN 201610628039A CN 106094963 A CN106094963 A CN 106094963A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
Abstract
The invention discloses a kind of APD array chip bias voltage Full-automatic temperature compensation system.Including APD array chip (101), critesistor (108), a/d converter I (107), build-out resistor (110), a/d converter II (105), microprocessor (102), digital regulation resistance (103), output adjustable height die block (104), buzzer (109) and display module (106).The present invention draws APD array chip operating temperature by the resistance of detection critesistor, thus obtain required optimal reverse bias voltage, recycling digital regulation resistance changes the output voltage of output adjustable height die block, APD array chip is made to obtain the reverse bias voltage mated with current operating temperature, it is achieved that the Full-automatic temperature compensation function of APD array chip reverse bias voltage.
Description
Technical field
The present invention relates to APD bias voltage adjustment technology, particularly a kind of APD array bias high voltage Full-automatic temperature compensation
System.
Background technology
APD(avalanche photodide under high back voltage biasing) electric current flowing through APD can be made after light irradiates to produce snow
Collapse multiplier effect.APD reverse bias voltage is closer to avalanche breakdown voltage, and avalanche multiplication effect is the most notable, but can produce simultaneously
The raw additional noise effect flooding useful signal, the most accurately controls APD reverse bias voltage and becomes the maximum of the actual application of APD
A difficult problem.Owing to avalanche breakdown voltage changes with temperature, therefore APD bias high voltage need to be controlled and also follow variations in temperature.
" optical communication technique " periodical 12 phases in 2014, " APD bias voltage temperature compensation circuit based on ADL5317 and LM35 set
Meter "；" electronic design engineering " in February, 2015 (volume 23 the 3rd phase) " APD based on TPS40210 biases temperature compensation circuit design ", all
Disclosing APD bias voltage temperature compensation circuit design, it is disadvantageous in that: need to manually adjust multiple component parameters in circuit,
High-pressure modular voltage range is little and regulation is inconvenient." optics and photoelectric technology " periodical 4 phases in 2013 " have temperature-compensating
APD numeric control bias circuit "；" industrial control computer " the 3rd phase of volume 25 in 2012, " avalanche photodide based on DSP
Numeric control bias source is designed ", they are disadvantageous in that: although have employed microcontroller, but high-pressure modular subelement is still
So need manually regulation；And temperature measuring circuit is more complicated.
Also not for APD array chip in existing temperature compensation, all it is only limited to single APD, and all needs
Partial circuit parameter to be manually adjusted, is not carried out Full-automatic temperature compensation.
Summary of the invention
The invention aims to solve the problem that said system exists, it is provided that a kind of employing critesistor, numeral
Potentiometer, output adjustable height die block and microprocessor be applicable to APD(avalanche photodide) array chip bias voltage
Full-automatic temperature compensation system.
The present invention is achieved in that APD array bias voltage Full-automatic temperature compensation system includes a piece of APD array core
Sheet, critesistor, an AD(simulate numeral) transducer I, build-out resistor, AD(simulate numeral) transducer II, a micro-process
Device, a digital regulation resistance, an output adjustable height die block, a buzzer and a display module.Critesistor is fixed
On APD array chip, a/d converter I connect critesistor, output adjustable height die block outfan connect a/d converter II and
APD array chip, output adjustable height die block controls end and is connected with digital regulation resistance, and microprocessor connects a/d converter I, AD turns
Parallel operation II, digital regulation resistance, buzzer and display module.
APD array chip, chip is integrated with multiple APD unit, these APD unit may make up 1xN linear array and
NxN square array, wherein: N is 5-16.
Critesistor, as temperature sensor, its resistance value is sized to reflect APD array chip operating temperature.
A/d converter I, for gathering the dividing potential drop of critesistor.
Build-out resistor, closes for the exponential type nonlinear function of critesistor Yu temperature is converted into linear function
System, it is ensured that the concordance of sampling sensitivity.
Microprocessor, for reading the value of a/d converter I, calculates thermosensitive resistance, then tables look-up and obtain APD array chip work
Make temperature, then control digital regulation resistance and export suitable resistance value to output adjustable height die block；Described microprocessor is also
The value of a/d converter II to be read, thus obtain output adjustable height die block real output value；Described microprocessor also to be controlled
Buzzer warning processed and display module complete display.
Digital regulation resistance, is controlled to export suitable resistance value by microprocessor, so that output adjustable height die block output
The bias voltage value that APD array chip is required under current operating temperature, it is ensured that each APD unit on array chip is in and connects
The high gain state of nearly snowslide.
Output adjustable height die block, exports corresponding high-voltage value to APD array chip according to the resistance value of digital regulation resistance.
A/d converter II, for the magnitude of voltage of Real-time Collection output adjustable height die block output, prevents from exporting adjustable high pressure
Module damages the APD array chip of costliness because of fault.
Buzzer, sends warning when exporting adjustable height die block output voltage exception.
Display module, for showing critesistor partial pressure value, the resistance of critesistor, APD array chip operating temperature, number
Word potentiometer output valve and output adjustable height die block output voltage values.
The APD array chip bias high voltage Full-automatic temperature compensation system of the present invention, by detecting the resistance of critesistor
Drawing APD array chip operating temperature, thus obtain required optimal reverse bias voltage, recycling digital regulation resistance changes output
The output voltage of adjustable height die block, makes APD array chip obtain the reverse bias voltage mated with current operating temperature, it is achieved
The Full-automatic temperature compensation function of APD array chip reverse bias voltage.
It is an advantage of the current invention that: (1) uses the temperature sensing that critesistor gathers as APD array chip operating temperature
Device, volume is little, highly sensitive.(2) connecting output adjustable height die block with digital regulation resistance and control end, such microprocessor only needs
Digital regulation resistance output is controlled, it is not necessary to human intervention or use other hand regulator part, just according to the thermosensitive resistance measured
Output adjustable height die block output voltage values can be made automatically to follow the change of APD array chip operating temperature, it is achieved that full-automatic
Temperature-compensating.(3) by one build-out resistor of increase, the exponential type nonlinear function of critesistor with temperature is converted into
Linear functional relation, circuit structure is simple, also assures that the concordance of sampling sensitivity simultaneously.(4) use microprocessor built-in
A/d converter, it is not necessary to increase a/d converter chip board area will not be caused to increase.(5) output is gathered by a/d converter II
Adjustable height die block actual output voltage value, serves safeguard protection effect to expensive APD array chip.
Accompanying drawing explanation
Fig. 1 is present system structured flowchart.
Fig. 2 critesistor of the present invention sample graph.
Fig. 3 microprocessor of the present invention control flow chart.
Detailed description of the invention
Describe the detailed description of the invention of the present invention below in conjunction with the accompanying drawings in detail.
Embodiment:
Fig. 1 is the system architecture diagram realized according to the present invention, and this embodiment is by APD array chip 101, critesistor 108, AD
Transducer I 107, build-out resistor 110, a/d converter II 105, microprocessor 102, digital regulation resistance 103, export adjustable high pressure
Module 104, buzzer 109 and display module 106 are constituted.Critesistor 108 is fixed on APD array chip 101；A/d converter
I connects critesistor 108 and build-out resistor 110；The outfan of output adjustable height die block 104 connects a/d converter II 105 He
APD array chip 101；The control end of output adjustable height die block 104 is connected with digital regulation resistance 103；Microprocessor 102 connects
A/d converter I 107, a/d converter II 105, digital regulation resistance 103, display module 106 and buzzer 109.
APD array chip 101, the present embodiment selects the 5x5 APD square array that First sensor company of Germany produces
Chip, this chip is integrated with 25 APD unit, and these APD unit constitute 5x5 square array.
Critesistor 108, as temperature sensor, its resistance value can change with temperature, and the present embodiment selects the U.S.
The high accuracy negative temperature coefficient NTC thermistor of the band glass sheath that Vishay company produces, is encapsulated as 0805 paster, volume
Little, highly sensitive, and be fixed on APD array chip so that it is resistance value follows APD array chip 101 work at present temperature
Spend and change.
A/d converter I 107, for gathering the dividing potential drop of critesistor 108.A/d converter I 107 in the present embodiment uses
The built-in A/D converter of microprocessor 102, so without increasing extra AD conversion chip, does not results in temperature compensation system electricity
Road plate area increases.
Build-out resistor 110, is a precision resister being connected with critesistor 108, for by critesistor and temperature
Exponential type nonlinear function be converted into linear functional relation, it is ensured that the concordance of sampling sensitivity.
Microprocessor 102, selects the STM32F103RCT6 of the ARM Cortex M3 framework of ST Microelectronics's production
Microprocessor.For reading the value of a/d converter I 107, calculate the resistance of critesistor 108, then acquisition APD array core of tabling look-up
The operating temperature of sheet 101, then controls digital regulation resistance 103 and exports suitably value to the control exporting adjustable height die block 104
End；Microprocessor 102 is additionally operable to read the value of a/d converter II 105, thus obtains the reality of output adjustable height die block 104
Output valve, is sent warning when exporting adjustable height die block 104 output abnormality by microprocessor 102 buzzer to be controlled 109；
Microprocessor 102 display module to be controlled 106 shows the resistance of critesistor 108, the work at present of APD array chip 101
Temperature, the output resistance of digital regulation resistance 103 and output adjustable height die block 104 actual output high-voltage value, described high pressure
Value be APD array chip 101 obtain temperature compensated after bias voltage value.
Digital regulation resistance 103, selects the 10k Ω digital regulation resistance that Microchip company produces, and model is MCP41010.
Microprocessor 102 exports suitable electricity by controlling digital regulation resistance 103 according to the current operating temperature of APD array chip 101
Resistance extremely exports the control end of adjustable height die block 104, so that output adjustable height die block 104 exports APD array chip 101
Bias voltage value required under current operating temperature, it is ensured that 25 APD unit on APD array chip 101 are in close to snow
The high gain state collapsed.Owing to employing digital regulation resistance 103, microprocessor 102 needs according to the thermosensitive resistance control measured
Digital regulation resistance 103 processed exports, it is not necessary to human intervention or use other hand regulator part, so that it may make output adjustable height die block
104 output voltage values follow the change of APD array chip 101 operating temperature automatically, it is achieved that Full-automatic temperature compensation.
Output adjustable height die block 104, the 0-300V selecting Tianjin Dong Wen company to produce exports adjustable type high-pressure modular.Defeated
The end that controls going out adjustable height die block 104 connects the resistance outfan of digital regulation resistance 103, output adjustable height die block 104
Outfan connects APD array chip 101, provides suitable bias voltage for this chip.
A/d converter II 105, for the magnitude of voltage of Real-time Collection output adjustable height die block 104 output, can prevent output
Adjustable height die block 104 breaks down and damages the APD array chip 101 of costliness.In order to not increase whole temperature compensation system
Volume, a/d converter II 105 in the present embodiment is also the built-in A/D converter using microprocessor 102.
Buzzer 109, sends warning when exporting adjustable height die block 104 output voltage exception.
Display module 106, selects compact word Liquid Crystal Module.For showing partial pressure value and the resistance of critesistor 108
Value, the operating temperature of APD array chip 101, the resistance value of digital regulation resistance 103, the output electricity of output adjustable height die block 104
Pressure value.Also carry out flickering display when exporting adjustable height die block 104 output voltage exception.
Fig. 2 is critesistor sample graph, including: critesistor 108, a/d converter I 107, build-out resistor 110.This reality
Executing in example, build-out resistor 110 have employed low excursion with temperature, the high stability resistance that Vishay company of the U.S. produces；Critesistor
The high accuracy NTC thermistor of 108 band glass sheaths using Vishay company.Described sample circuit simple in construction, essence
Degree height, it is achieved that the linearisation of the exponential type nonlinear function of critesistor and temperature, it is ensured that the concordance of sampling sensitivity.
The APD array bias voltage Full-automatic temperature compensation system work process of the present embodiment is as follows:
1) microprocessor 102 reads the value of a/d converter I 107, calculates the resistance of critesistor 108, then acquisition APD battle array of tabling look-up
The current operating temperature of row chip 101, then calculates the resistance value that digital regulation resistance 103 should export.
2) digital regulation resistance 103 exports corresponding resistance value and extremely exports the control end of adjustable height die block 104, exports adjustable
High-pressure modular 104 is then just obtained to APD array chip 101, such APD array chip 101 by the voltage that outfan output is corresponding
Bias voltage required under current operating temperature.
3) a/d converter II 105 gathers the magnitude of voltage of output adjustable height die block 104 output, if this magnitude of voltage is abnormal,
Microprocessor 102 can adjust the output resistance of digital regulation resistance 103 immediately, and triggers buzzer 109 warning and display module 106
Flickering display, is prevented effectively from, because output adjustable height die block 104 is abnormal, expensive APD array chip 101 is caused damage.
Fig. 3 is microprocessor control flow chart, and microprocessor 102 is to operate in embedding as the control unit of the present embodiment
On formula operating system uC/OS II, the present embodiment is built together vertical 4 tasks, respectively: AD conversion task, calculates task, aobvious
Show and warning task and beginning a task with.This flow chart starts from step S301.
In step S302, system hardware is configured by microprocessor 102, simultaneously also to embedded OS uC/OS
II initializes, for performing follow-up each task preparation environment.
In step S303, uC/OS II startup begins a task with.
In step S304, the term of execution of beginning a task with, uC/OS II creates other three tasks, respectively: AD conversion
Task, calculates task, shows and warning task, after three described task creations complete, begin a task with and be i.e. suspended.Hereafter exist
Under uC/OS II scheduling, microprocessor 102 runs described three task in round-robin mode simultaneously, it may be assumed that step S305-
The AD conversion task of S309, the calculating task of step S310-S316, the display of step S317-S325 and warning task are simultaneously
Run.
In step S305, microprocessor 102 brings into operation AD conversion task.
In step S306, microprocessor 102 controls a/d converter I 107 and a/d converter II 105 is AD converted.
In step S307, microprocessor 102 sends the transformation result of a/d converter I 107 to mailbox 1, described mailbox
It is a kind of mechanism realizing communication between different task.
In step S308, microprocessor 102 sends the transformation result of a/d converter I 107 to mailbox 2.
In step S309, microprocessor 102 sends the transformation result of a/d converter II 105 to mailbox 3.
In step S310, microprocessor 102 brings into operation calculating task.
In step S311, calculate job enquiry mailbox 1, see and whether receive a/d converter I 107 sent in step S307
Transformation result, if received, proceed to step S312 immediately, after otherwise time delay reaches enter step S312.
In step S312, microprocessor 102 is calculated critesistor 108 according to the transformation result of a/d converter I 107
Resistance value, that then looks into critesistor resistance and temperature in program storage compares the most available APD array chip 101 of form
Current operating temperature.
In step S313, microprocessor 102 sends a message to mailbox 4, and described message content is APD array chip 101
Current operating temperature.
In step S314, microprocessor 102 calculates APD array chip according to APD array chip 101 current operating temperature
101 bias voltage values required at this working temperature, at the output according to output adjustable height die block and control planning curve
Calculate the resistance value that digital regulation resistance 103 should export.
In step S315, control digital regulation resistance 103 and export calculated resistance value to output adjustable height die block 104
Control end, then output adjustable height die block 104 exports the bias voltage value described in step S314, such APD array chip
101 just obtain the bias voltage after temperature-compensating.
In step S316, microprocessor 102 sends a message to mailbox 5, and described message content is that step S314 calculates
The resistance value that should export of digital regulation resistance 103 and APD array chip 101 needed for bias voltage value.
In step S317, microprocessor 102 brings into operation and shows and warning task.
In step S318, show and warning job enquiry mailbox 2, see and whether receive the a/d converter sent in step S308
The transformation result of I 107, if received, proceeds to step S319 immediately, enters step S319 after otherwise time delay reaches.
In step S319, the partial pressure value of display critesistor 108, described partial pressure value is turning by a/d converter I 107
Change what result conversion obtained.
In step S320, show and warning job enquiry mailbox 3, see and whether receive the a/d converter sent in step S309
The transformation result of II 105, if received, proceeds to step S321 immediately, enters step S321 after otherwise time delay reaches.
In step S321, the output voltage values of display output adjustable height die block 104, described output voltage values is by AD
The transformation result conversion of transducer II 105 obtains, if described output voltage values is abnormal, and buzzer warning, and show
Show that module carries out flickering display.
In step S322, show and warning job enquiry mailbox 4, see and whether receive the message sent in step S313, as
Fruit receives, and proceeds to step S323 immediately, enters step S323 after otherwise time delay reaches.
In step S323, the current operating temperature of display APD array chip 101.
In step S324, show and warning job enquiry mailbox 5, see and whether receive the digital current potential sent in step S316
Bias voltage value needed for resistance value that device 103 should export and APD array chip 101, if received, proceeds to step immediately
S325, enters step S325 after otherwise time delay reaches.
Biasing in step S325, needed for resistance value that display digit potentiometer 103 should export and APD array chip 101
Magnitude of voltage.
Although being described in conjunction with the accompanying embodiments of the present invention, but in this area, those skilled in the art can be in institute
Various changes and modifications are made in the range of attached claim.
Claims (1)
1. an APD array chip bias voltage Full-automatic temperature compensation system, it is characterised in that APD array chip biased electrical
Pressure Full-automatic temperature compensation system includes APD array chip (101), critesistor (108), a/d converter I (107), coupling electricity
Resistance (110), a/d converter II (105), microprocessor (102), digital regulation resistance (103), output adjustable height die block (104),
Buzzer (109) and display module (106)；Critesistor (108) is fixed on APD array chip (101), a/d converter I
(107) connecting critesistor (108), output adjustable height die block (104) outfan connects a/d converter II (105) and APD battle array
Row chip (101), output adjustable height die block (104) controls end and is connected with digital regulation resistance (103), and microprocessor (102) is even
Connect a/d converter I (107), a/d converter II (105), digital regulation resistance (103), buzzer (109) and display module
(106)；
Being integrated with multiple APD unit on APD array chip (101), these APD unit can constitute 1xN linear array and NxN side
Type array, wherein: N is 5-16；
Critesistor (108) is used as temperature sensor, and its resistance value is sized to reflect the work temperature of APD array chip (101)
Degree；
A/d converter I (107) is used for gathering the dividing potential drop of critesistor (108)；
Build-out resistor (110) is for being converted into linear letter by the exponential type nonlinear function of critesistor (108) Yu temperature
Number relation, it is ensured that the concordance of sampling sensitivity；
Microprocessor (102) is used for reading the value of a/d converter I (107), calculates the resistance of critesistor (108), then tables look-up
To the operating temperature of APD array chip (101), then control digital regulation resistance (103) export suitable resistance value to output can
Heighten die block (104)；The value of described microprocessor (102) a/d converter I to be read (105), thus obtain output can
Heighten die block (104) real output value；Described microprocessor (102) buzzer to be controlled (109) is reported to the police and shows
Module (106) completes display；
Digital regulation resistance (103) is controlled to export suitable resistance value by microprocessor (102), so that output adjustable height die block
(104) bias voltage that output APD array chip (101) is required under current operating temperature, it is ensured that each on array chip
APD unit is in the high gain state close to snowslide；
Output adjustable height die block (104) exports corresponding high-voltage value to APD array according to the resistance value of digital regulation resistance (103)
Chip (101)；
A/d converter I (105), for Real-time Collection output adjustable height die block (104) magnitude of voltage that exports, prevents from exporting adjustable
High-pressure modular (104) damages the APD array chip (101) of costliness because of fault；
Buzzer (109) sends warning when exporting adjustable height die block (104) output voltage exception；
Display module (106) is used for showing critesistor (108) partial pressure value, the resistance of critesistor (108), APD array chip
(101) operating temperature, digital regulation resistance (103) output valve and output adjustable height die block (104) output voltage values；
Described a/d converter is analog-digital converter.
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| CN201610628039.7A CN106094963A (en) | 2016-07-31 | 2016-07-31 | APD array chip bias voltage Full-automatic temperature compensation system |
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| CN201610628039.7A CN106094963A (en) | 2016-07-31 | 2016-07-31 | APD array chip bias voltage Full-automatic temperature compensation system |
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Cited By (6)
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| CN108445946A (en) * | 2018-04-04 | 2018-08-24 | 安徽问天量子科技股份有限公司 | The temperature self-adaptation control circuit and method of APD in quantum key dispatching system |
| CN110445541A (en) * | 2019-08-13 | 2019-11-12 | 青岛海信宽带多媒体技术有限公司 | Control method, device and the optical module of bias voltage are provided to APD |
| CN110596681A (en) * | 2019-10-21 | 2019-12-20 | 苏州玖物互通智能科技有限公司 | Voltage type closed loop temperature-dependent regulating system based on FPGA chip |
| CN110597342A (en) * | 2019-10-21 | 2019-12-20 | 苏州玖物互通智能科技有限公司 | Laser radar APD voltage type open loop temperature-dependent regulating system |
| CN110596680A (en) * | 2019-10-21 | 2019-12-20 | 苏州玖物互通智能科技有限公司 | Laser radar APD voltage type closed loop temperature-dependent regulating system |
| CN112621762A (en) * | 2021-01-07 | 2021-04-09 | 太原理工大学 | Touch perception acquisition system with temperature compensation function and method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108445946A (en) * | 2018-04-04 | 2018-08-24 | 安徽问天量子科技股份有限公司 | The temperature self-adaptation control circuit and method of APD in quantum key dispatching system |
| CN110445541A (en) * | 2019-08-13 | 2019-11-12 | 青岛海信宽带多媒体技术有限公司 | Control method, device and the optical module of bias voltage are provided to APD |
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| CN110596681A (en) * | 2019-10-21 | 2019-12-20 | 苏州玖物互通智能科技有限公司 | Voltage type closed loop temperature-dependent regulating system based on FPGA chip |
| CN110597342A (en) * | 2019-10-21 | 2019-12-20 | 苏州玖物互通智能科技有限公司 | Laser radar APD voltage type open loop temperature-dependent regulating system |
| CN110596680A (en) * | 2019-10-21 | 2019-12-20 | 苏州玖物互通智能科技有限公司 | Laser radar APD voltage type closed loop temperature-dependent regulating system |
| CN112621762A (en) * | 2021-01-07 | 2021-04-09 | 太原理工大学 | Touch perception acquisition system with temperature compensation function and method thereof |
| CN112621762B (en) * | 2021-01-07 | 2022-04-08 | 太原理工大学 | Touch perception acquisition system with temperature compensation function and method thereof |
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