CN106059567A

CN106059567A - STT-MRAM-based field-programmable gate array

Info

Publication number: CN106059567A
Application number: CN201610362193.4A
Authority: CN
Inventors: 徐庶; 孟皓; 李辉辉
Original assignee: CETHIK Group Ltd
Current assignee: CETHIK Group Ltd
Priority date: 2016-05-27
Filing date: 2016-05-27
Publication date: 2016-10-26

Abstract

The invention relates to an STT-MRAM-based field-programmable gate array. The STT-MRAM-based field-programmable gate array comprises a plurality of reconfigurable logic modules, programmable input and output units, an embedded memory and unit connection line wirings. An STT-MRAM is adopted as an FPGA of the embedded memory; and, through utilization of high-speed read-write performance, low power consumption and nonvolatility of the STT-MRAM, the problems of poor reliability and slow power-on starting of a traditional SRAM type FPGA are solved, and the problems of low working frequency and less logic resources of a traditional FLASH type FPGA are solved.

Description

A kind of field programmable gate array based on STT-MRAM

Technical field

The present invention relates to integrated circuit fields, particularly relate to a kind of field programmable gate array based on STT-MRAM.

Background technology

Field programmable gate array (Field-Programmable Gate Array, FPGA) a kind of programmable silicon core Sheet, it is at PAL (Programmable Array Logic), GAL (generic array logic), CPLD (Complex Programmable Logic Device) etc. the product of development further on the basis of programming device.FPGA is as special collection Become a kind of semi-custom circuit in circuit (ASIC) field to occur, both solved the deficiency of custom circuit, overcome again original The shortcoming that programming device gate circuit number is limited.

Type according to the on-chip memory used in FPGA is different, and the FPGA of current main flow is divided into two classes, is respectively FLASH type FPGA and SRAM type FPGA.The on-chip memory used in FLASH type FPGA is FLASH memory, compares SRAM type FPGA, its advantage is to have higher reliability and safety, runs power consumption lower, it is not necessary to independent non-in the configuration of FPGA off-chip Volatile memory (Non-Volatile Memory), FPGA powers on and can run；But shortcoming operating frequency is relatively low, is limited to The process of FLASH is difficult to reduce further and resource is less.

Comparing FLASH type FPGA, the on-chip memory that SRAM type FPGA uses is SRAM SRAM, its advantage That dominant frequency is high, and completely compatible with the CMOS technology of main flow, therefore SRAM type FPGA can integrated more logical resource, become This is lower；But its shortcoming is to need to configure nonvolatile storage in FPGA off-chip, adds chip complexity, powers on and configure afterwards Time is more longer than FLASH type FPGA, starts slower.

Summary of the invention

The present invention is to overcome above-mentioned weak point, it is therefore intended that provide a kind of field programmable gate based on STT-MRAM Array, uses STT-MRAM as the FPGA of in-line memory, utilizes the high-speed read-write performance of STT-MRAM, low-power consumption and Non-volatile, solve tradition SRAM type FPGA poor reliability, the problem that electrifying startup is slower, and solve traditional F LASH type FPGA operating frequency is low, the less problem of logical resource.

The present invention is to reach above-mentioned purpose by the following technical programs: a kind of field-programmable gate array based on STT-MRAM Row, including: several Reconfigurable logic modules, input-output unit able to programme, in-line memory, unit connecting line cloth Line；Wherein use STT-MRAM as in-line memory；Reconfigurable logic module by unit connecting line wiring respectively with Input-output unit able to programme, in-line memory connect；Several Reconfigurable logic modules are connected up by unit connecting line It is connected with each other；In-line memory is connected with input-output unit able to programme by the wiring of unit connecting line.

As preferably, described Reconfigurable logic module is made up of configurable switch matrix, multiplexer and trigger； Configurable switch matrix is connected with trigger by multiplexer.

As preferably, the described STT-MRAM basic unit of storage as in-line memory includes MTJ, MOS Field effect transistor, bi-directional drive selection circuit；Described MTJ is connected with metal-oxide-semiconductor field effect transistor；Metal-oxide-semiconductor field effect transistor drives with two-way Dynamic selection circuit connects.

As preferably, described MTJ is made up of free magnetism thin layer, sealing coat and fixed magnetic thin layer； Fixed magnetic thin layer, sealing coat, free magnetism thin layer stack gradually from bottom to top.

As preferably, the magnetization orientation of described free magnetism thin layer can change, the magnetization orientation of fixed magnetic thin layer Keep constant.

As preferably, when free magnetism thin layer is identical with the magnetization orientation of fixed magnetic thin layer, MTJ externally presents Go out low resistance state；When free magnetism thin layer is contrary with the magnetization orientation of fixed magnetic thin layer, MTJ externally presents high resistant State.

As preferably, described metal-oxide-semiconductor field effect transistor drives electric current for providing the read/write needed for MTJ；With word Line and bit line, wordline is connected with MTJ respectively with bit line.

The beneficial effects of the present invention is: the present invention use STT-MRAM as the embedded memory module of FPGA, can The information being arranged in STT-MRAM after realizing FPGA power down is not lost, and compares FLASH type FPGA and has higher read-write frequency Rate and lower power consumption, compare SRAM type FPGA and have bigger memory capacity.

Accompanying drawing explanation

Fig. 1 is the basic structure schematic diagram of FPGA of the present invention；

Fig. 2 is the structural representation of the STT-MRAM basic unit of storage of the embodiment of the present invention.

Detailed description of the invention

Below in conjunction with specific embodiment, the present invention is described further, but protection scope of the present invention is not limited in This:

Embodiment: as it is shown in figure 1, a kind of field programmable gate array based on STT-MRAM is by Reconfigurable logic module 1, input-output unit 2 able to programme, in-line memory 3, unit connecting line wiring 4 composition.Reconfigurable logic module 1, can Programming input/output module 2 and unit connecting wiring 4 are similar with traditional SRAM type FPGA or FLASH type FPGA.Wherein may be used Reconfiguring logic module 1 is the basic logic unit in FPGA, and each Reconfigurable logic module 1 comprises one and configurable opens Close matrix, some multiplexers and trigger, each FPGA comprises multiple Reconfigurable logic module.Input able to programme is defeated Go out the interface section that unit 2 is chip and external circuitry, complete under different electrical characteristic to the driving of input/output signal with Join requirement.Unit connecting wiring 4 is responsible for completing the connection between CLB, IOB and in-line memory according to user's request.

In-line memory 3 is to be made up of STT-MRAM.As in figure 2 it is shown, the basic unit of storage of STT-MRAM is to use Integrated circuit technology is a MTJ (Magnetic Tunneling Junction, MTJ), a metal-oxide-semiconductor field effect transistor 8, bi-directional drive selection circuit 9 processes.Wherein MTJ is responsible for stored bits information, MTJ be by free magnetism thin layer 5 (with Lower abbreviation free layer), sealing coat 6 and fixed magnetic thin layer 7 (hereinafter referred to as fixed layer) composition.The magnetization orientation of free layer can Changing, the magnetization orientation of fixed layer keeps constant.When free layer is identical with fixed layer magnetization orientation, MTJ externally presents low Resistance state, when free layer is contrary with fixed layer magnetization orientation, MTJ externally presents high-impedance state.

Metal-oxide-semiconductor field effect transistor 8 is responsible for providing the read/write needed for memory element MTJ to drive electric current.When this memory element is entered When row write enters data manipulation, opened by the wordline (Word Line, WL) of this field effect transistor and bit line (Bit Line, BL) simultaneously Open (illustrating with N-type field effect transistor, WL Yu BL all loads positive voltage then for opening) and this memory element can be chosen, then according to need Data to be write are different (writing " 0 " or one writing), select to drive sense of current by bi-directional drive selection circuit 9, field imitate The magnetization orientation writing driving electric current change free layer 5 should be produced by pipe 8, thus reach to write the effect of data.

When this memory element to be carried out the operation reading data, opened with bit line by the wordline of this field effect transistor simultaneously Open and can choose this memory element, then select to drive the sense of current to be flowed to certainly by fixed layer 7 by bi-directional drive selection circuit 9 By layer 5, field effect transistor 8 produce read current and pass through MTJ, read high and low resistance state information.

The FPGA realized based on the present invention, owing to using STT-MRAM medium as in-line memory, can realize FPGA The information being arranged in STT-MRAM after power down is not lost.Compare traditional SRAM type FPGA, not be used in when powering on from external Reading information in stand alone type memorizer, toggle speed is faster.Simultaneously as the read or write speed that STT-MRAM is than FLASH is faster, merit Consume lower, the FPGA therefore realized based on the present invention, compares traditional FLASH type FPGA and has higher read-write frequency and lower Power consumption.STT-MRAM memorizer has high access speed equally, and read-write time delay is even lower up to 5 nanoseconds, the erasable longevity Life reaches unlimited.Meanwhile, STT-MRAM still can reliably preserve data in the case of power down, compares SRAM and has higher depositing Storage density；And manufacturing cost is relatively low.

It is the specific embodiment of the present invention and the know-why used described in Yi Shang, if conception under this invention institute Make change, function produced by it still without departing from description and accompanying drawing contained spiritual time, must belong to the present invention's Protection domain.

Claims

1. a field programmable gate array based on STT-MRAM, it is characterised in that including: several Reconfigurable logic moulds Block (1), input-output unit able to programme (2), in-line memory (3), unit connecting line wiring (4)；Wherein use STT- MRAM is as in-line memory (3)；Reconfigurable logic module (1) connects up (4) respectively with able to programme by unit connecting line Input-output unit (2), in-line memory (3) connect；Several Reconfigurable logic modules (1) pass through unit connecting line cloth Line (4) is connected with each other；In-line memory (3) is by unit connecting line wiring (4) with input-output unit able to programme (2) even Connect.

A kind of field programmable gate array based on STT-MRAM the most according to claim 1, it is characterised in that: described can Reconfigure logic module (1) to be made up of configurable switch matrix, multiplexer and trigger；Configurable switch matrix is by many Path multiplexer is connected with trigger.

A kind of field programmable gate array based on STT-MRAM the most according to claim 1, it is characterised in that: described work STT-MRAM basic unit of storage for in-line memory includes that MTJ, metal-oxide-semiconductor field effect transistor (8), bi-directional drive are selected Select circuit (9)；Described MTJ is connected with metal-oxide-semiconductor field effect transistor (8)；Metal-oxide-semiconductor field effect transistor (8) and bi-directional drive selection circuit (9) connect.

A kind of field programmable gate array based on STT-MRAM the most according to claim 3, it is characterised in that: described magnetic Property tunnel knot is made up of free magnetism thin layer (5), sealing coat (6) and fixed magnetic thin layer (7)；Fixed magnetic thin layer (7), sealing coat (6), free magnetism thin layer (5) stack gradually from bottom to top.

A kind of field programmable gate array based on STT-MRAM the most according to claim 4, it is characterised in that: described from Can be changed by the magnetization orientation of laminated magnetic film (5), the magnetization orientation of fixed magnetic thin layer (7) keeps constant.

A kind of field programmable gate array based on STT-MRAM the most according to claim 5, it is characterised in that: work as freedom When laminated magnetic film (5) is identical with the magnetization orientation of fixed magnetic thin layer (7), MTJ externally presents low resistance state；When free magnetic When property thin layer (5) is contrary with the magnetization orientation of fixed magnetic thin layer (7), MTJ externally presents high-impedance state.

A kind of field programmable gate array based on STT-MRAM the most according to claim 3, it is characterised in that: described Metal-oxide-semiconductor field effect transistor (8) drives electric current for providing the read/write needed for MTJ；With wordline and bit line, wordline and bit line It is connected with MTJ respectively.