CN106059513B - Direct current detection protects circuit and the class-D amplifier using it - Google Patents
Direct current detection protects circuit and the class-D amplifier using it Download PDFInfo
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- CN106059513B CN106059513B CN201610371454.9A CN201610371454A CN106059513B CN 106059513 B CN106059513 B CN 106059513B CN 201610371454 A CN201610371454 A CN 201610371454A CN 106059513 B CN106059513 B CN 106059513B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
Abstract
Disclose a kind of direct current detection protection circuit and the class-D amplifier using it.The present invention passes through the two-pass DINSAR pulse-width signal (output signal of class-D amplifier pulse-width modulation circuit) that detection in the ideal situation should be complementary; compare the difference all the way between pulse-width signal duty ratio and the duty ratio of another way pulse-width signal; when the difference of duty ratio is excessive; there are DC currents to be input in class-D amplifier for judgement; output protection signal protects class-D amplifier; thus; can be whether to include DC current in lesser consumption detection class-D amplifier input signal, and protection is provided for class-D amplifier.Moreover, because the pulse-width signal with class-D amplifier is synchronous, real-time detection may be implemented.
Description
Technical field
The present invention relates to electronic circuit technologies, and in particular to a kind of direct current detection protection circuit and the D class using it
Amplifier.
Background technique
Class-D amplifier circuit is a kind of power amplifier of switching mode, compared with Linear Power Amplifier circuit, have it is high-efficient,
It generates heat few feature, is therefore widely used in the consumer electronics sectors such as smart television, mobile phone.
Fig. 1 is the circuit diagram of existing class-D amplifier.As shown in Figure 1, class-D amplifier in the prior art is usual
Including integrating circuit 1, pulse-width modulation circuit 2, driving power grade circuit 3 and feed circuit (feedback resistance in Fig. 1).Pass through to
The feedback signal of difference audio signal and feed circuit is superimposed and is led to by 1 input difference audio signal of integrating circuit, integrating circuit
It crosses integration operation to be filtered, filters out the noise signal other than class-D amplifier working frequency range (such as audio).Pulse-width modulation circuit
2 for being modulated to pulsewidth modulation (Pulse Width Modulation, PWM) signal for the differential signal that integrating circuit 1 exports.
Pulse-width modulation circuit 2 by comparator usually by respectively compared with a triangular signal, exporting corresponding differential signal
Pwm signal.The full-bridge circuit that driving power grade circuit 3 is constituted using two-way amplifying circuit as shown in Figure 2 passes through transistor half
The alternation of bridge is by the power amplification of pwm signal.Feed circuit is used for output signal feedback to input terminal.It is sound in application
When frequency power amplifier, loudspeaker can be directly transferred to by the amplified signal that driving power grade circuit 3 exports and be reduced to audio
Signal (loudspeaker itself has certain low-pass filtering ability) is reduced to audio signal transmission extremely via low-pass filter circuit
Loudspeaker plays.In general, class-D amplifier can also connect filter capacitor in the input terminal of integrating circuit 1 to carry out DC filtering.
Existing class-D amplifier can make direct current when damaging occurs in input filter capacitor or input port is short-circuited
(DC) electric current flow into class-D amplifier, and it is amplified be input to late-class circuit (such as loudspeaker), if DC current is sufficiently large
And the duration longer damage that will lead to late-class circuit.
Summary of the invention
In view of this, the present invention provides a kind of direct current detection protection circuit and the class-D amplifier using it, with smaller
Consumption detection class-D amplifier input signal in whether include DC current, avoid direct current input current damage late-class circuit, be
Class-D amplifier provides protection.
In a first aspect, a kind of direct current detection protects circuit, it is suitable for class-D amplifier, the class-D amplifier is used for will
Differential input signal amplifies after being converted to the first pulse-width signal and the second pulse-width signal, and the direct current detection is protected
Protection circuit includes：
Duty cycle difference detection circuit, for detecting accounting for for first pulse-width signal and the second pulse-width signal
Sky characterizes the detection voltage of the duty cycle difference than difference, in detection output output, and the detection output is described accounts for
Output end of the sky than difference detection circuit；
First comparator, for exporting the first comparison signal when the detection voltage is greater than first threshold；
Second comparator, for exporting the second comparison signal when the detection voltage is less than second threshold；
Logical detection circuit, for according to first comparison signal and described at least one predetermined detection period
Two comparison signal output protection signals.
Preferably, the duty cycle difference detection circuit includes：
Capacitor is connected between detection output and ground terminal；
Charging paths are connect with the detection output, for by capacitor charging described in steering；
Discharge paths are connect with the detection output, are discharged for controlled from the capacitor；And
Charge-discharge control circuit is greater than the in the level of first pulse-width signal for controlling the charging paths
It charges when the level of two pulse-width signals, while it is small in the level of first pulse-width signal to control the discharge paths
It discharges when the level of the second pulse-width signal.
Preferably, the charging paths include the first current source being serially connected and first switch；
The discharge paths include the second current source and second switch being serially connected；
Wherein, the controlled conducting of the first switch is to control the charging circuit charging, the controlled conducting of second switch
To control the discharge paths electric discharge.
Preferably, described when the level of first pulse-width signal and second pulse-width signal is equal
Charge-discharge control circuit controls the first switch and the second switch is both turned on；Alternatively,
When the level of first pulse-width signal and second pulse-width signal is equal, the charge and discharge is automatically controlled
First switch described in circuit control processed and the second switch are turned off.
Preferably, the direct current detection protection circuit further includes：
Reset circuit is connect with the detection output, for resetting the capacitor；
Wherein, the logical detection circuit is used to control the reset circuit every predetermined detection period output reset signal
Reset operation is carried out, and detects that the periodicity of the first comparison signal is greater than protection threshold value and exports the guarantor within a predetermined period of time
Shield signal detects that the amount of cycles of the second comparison signal exports the protection greater than when protecting threshold value within a predetermined period of time
Signal.
Preferably, the direct current detection protection circuit further includes：
Reset circuit is connect with the detection output, for resetting the capacitor；
Wherein, the logical detection circuit is used to control the reset circuit every predetermined detection period output reset signal
Reset operation is carried out, described in the logical detection circuit is exported when continuous N detection cycle detects the first comparison signal
Signal is protected, alternatively, the logic circuit exports the protection when continuous N detection cycle detects the second comparison signal
Signal, M are the integer greater than 2.
Preferably, the reset circuit includes：
First resistor and third switch, are connected in series between power end and detection output；
Second resistance and the 4th switch, are connected in series between detection output and ground terminal；
Wherein, the third switch and the 4th switch are controlled by reset signal and simultaneously turn on.
Preferably, the charge-discharge control circuit controls the charging paths according to reset signal and the discharge paths are same
When work.
Preferably, charge-discharge control circuit includes：
First NOT gate inputs second pulse-width signal；
First NAND gate, an input terminal input first pulse-width signal, another input terminal and described first
The output end of NOT gate connects；
Second NOT gate inputs first pulse-width signal；
Second NAND gate, an input terminal input second pulse-width signal, another input terminal and described second
The output end of NOT gate connects；
First nor gate, an input terminal input the reset signal, another input terminal and first NAND gate
Output end connection, exports the control signal of charging paths；
Second nor gate, an input terminal input the reset signal, another input terminal and second NAND gate
Output end connection, exports the control signal of discharge paths.
It preferably, further include threshold value generative circuit, the threshold value generative circuit includes：
3rd resistor is connected between power end and first threshold output end；
4th resistance is connected between the first threshold output end and second threshold output end；
5th resistance is connected between the second threshold output and ground；
Wherein, the first threshold output end exports the first threshold, and second threshold output end exports second threshold
Value.
Second aspect provides a kind of class-D amplifier, including：
Integrating circuit exports revised differential signal for input differential signal；
Pulse-width modulation circuit generates the first pulse-width signal and the second arteries and veins for distinguishing the differential signal after Introduced Malaria
Wide modulated signal；
Driving power grade circuit, for amplifying first pulse-width signal and the second pulse-width signal respectively；With
And
Direct current detection as described above protects circuit, with the driving power grade circuit connection；
Wherein, the driving power grade circuit is switched to without output state or high resistant shape after receiving the protection signal
State.
The present invention passes through two-pass DINSAR pulse-width signal (the class-D amplifier arteries and veins that detection in the ideal situation should be complementary
The output signal of wide modulation circuit), compare the letter complementary with another way pulse-width signal of pulse-width signal duty ratio all the way
Number duty ratio between difference, when the difference of duty ratio is excessive, judgement there are DC currents to be input in class-D amplifier
Situation, output protection signal protect class-D amplifier, believe thus, it is possible to be inputted with lesser consumption detection class-D amplifier
Whether include DC current in number, and provides protection for class-D amplifier.Moreover, because the pulse-width signal with class-D amplifier
It is synchronous, real-time detection may be implemented.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, the above and other purposes of the present invention, feature and
Advantage will be apparent from, in the accompanying drawings：
Fig. 1 is the circuit diagram of existing class-D amplifier；
Fig. 2 is the circuit diagram of semibridge system driving power grade circuit wherein all the way；
Fig. 3 is the circuit diagram of the class-D amplifier of the embodiment of the present invention；
Fig. 4 is the schematic diagram of a preferred embodiment of the direct current detection protection circuit of the embodiment of the present invention；
Fig. 5 is the schematic diagram of another preferred embodiment of the direct current detection protection circuit of the embodiment of the present invention；
Fig. 6 is the circuit diagram of the charge-discharge control circuit of direct current detection protection circuit shown in fig. 5.
Specific embodiment
Below based on embodiment, present invention is described, but the present invention is not restricted to these embodiments.Under
Text is detailed to describe some specific detail sections in datail description of the invention.Do not have for a person skilled in the art
The present invention can also be understood completely in the description of these detail sections.In order to avoid obscuring essence of the invention, well known method, mistake
There is no narrations in detail for journey, process, element and circuit.
In addition, it should be understood by one skilled in the art that provided herein attached drawing be provided to explanation purpose, and
What attached drawing was not necessarily drawn to scale.
It will also be appreciated that in the following description, " circuit " refers to be passed through electrically by least one element or sub-circuit
The galvanic circle that connection or electromagnetism connect and compose.When title element or the " connection of another element of circuit " being connected to " or element/circuit
" between two nodes when, it, which can be, is directly coupled or connected another element or there may be intermediary element, element it
Between connection can be physically, in logic or its combination.On the contrary, when claiming element " being directly coupled to " or " directly connecting
Be connected to " another element when, it is meant that the two be not present intermediary element.
Unless the context clearly requires otherwise, "include", "comprise" otherwise throughout the specification and claims etc. are similar
Word should be construed as the meaning for including rather than exclusive or exhaustive meaning；That is, be " including but not limited to " contains
Justice.
In the description of the present invention, it is to be understood that, term " first ", " second " etc. are used for description purposes only, without
It can be interpreted as indication or suggestion relative importance.In addition, in the description of the present invention, unless otherwise indicated, the meaning of " multiple "
It is two or more.
Fig. 3 is the circuit diagram of the class-D amplifier of the embodiment of the present invention.As shown in figure 3, the class-D amplifier includes
Integrating circuit 1, pulse-width modulation circuit 2, driving power grade circuit 3, feed circuit Rc and Rd and direct current detection protection electricity
Road 4.
Wherein, integrating circuit 1 includes operational amplifier OPA, and the integrating circuit inputs a pair of of differential signal output through repairing
Differential signal Vopa and Vopb after just.Filtering can also be set between the input terminal and differential signal input of integrating circuit 1
Capacitor carries out DC filtering to differential signal.
Integrating circuit 1 includes operational amplifier OPA, resistance Ra, resistance Rb, first integral capacitor C1 and second integral capacitor
C2.Operational amplifier OPA is the operational amplifier of two inputs, two output.Resistance Ra is connected to the first input end of integrating circuit 1
Between the first input end of operational amplifier OPA.Resistance Rb is connected to the second input terminal and operational amplifier of integrating circuit 1
Between the second input terminal of OPA.First integral capacitor C1 is connected to the first input end and the first output end of operational amplifier OPA
Between.Second integral capacitor C2 is connected between the second input terminal of operational amplifier OPA and second output terminal.
Pulse-width modulation circuit 2 is used to distinguish differential signal Vopa and Vopb generation the first pulsewidth modulation letter after Introduced Malaria
Number Vpwma and the second pulse-width signal Vpwmb.Wherein, the first pulse-width signal Vpwma is obtained by differential signal Vopa modulation
, the second pulse-width signal is modulated by differential signal Vopb and is obtained.Preferably, pulse-width modulation circuit 2 includes two arranged side by side
Comparator, a comparator compare differential signal Vopa and triangular wave Vtri and export the first pulse-width signal Vpwma.Another
Comparator compares differential signal Vopb and triangular wave Vtri and exports the second pulse-width signal Vpwmb, thus, it is possible to easily will
Two paths of differential signals is modulated to pwm signal.Certainly, pulse-width modulation circuit 2 can also realize PWM tune using other circuit structures
System.Typically for the differential signal with opposite phase of input, pulse-width modulation circuit 2 is modulated so that the first pulsewidth modulation is believed
Number Vpwma and the second pulse-width signal Vpwmb phase having the same, in this state the second pulse-width signal
Vpwmb actually corresponding input signal Vinb has opposite phase.In the ideal situation, the first pulse-width signal
Vpwma and the second pulse-width signal Vpwmb is high level simultaneously, while being low level.Circuit setting below is based on this
Premise carries out.Certainly, in some cases, the first pulse-width signal that pulse-width modulation circuit 2 can make modulation export
Vpwma and the second pulse-width signal Vpwmb phase complements, in the case, those skilled in the art are easy by adjusting inspection
The signal of survey realizes the present invention.
Driving power grade circuit 3 is exported in amplifying first pulse-width signal and the second pulse-width signal respectively
Output signal Vouta and Voutb.The power amplification circuit that driving power grade circuit 3 can use two-way as shown in Figure 2.Such as Fig. 2
Shown, power amplification circuit includes two transistors being connected between power supply and ground all the way.In the pulse-width signal of input
When for high level, the transistor turns connected to power supply, the transistor shutdown being connected to ground, thus the voltage that out-put supply limits
And electric current.When the pulse-width signal of input is low level, the transistor turns being connected to ground, the transistor connected to power supply
Shutdown.Thus, it is possible to which pwm signal is amplified.
Feed circuit is connected between the difference output end and integrating circuit 1 of driving power grade circuit 3.Specifically, it feeds back
Circuit is made of two-way feedback resistance Rc and Rd, wherein feedback resistance Rc is connected to the first output end of driving power grade circuit 3
Between the first input end of the operational amplifier OPA of integrating circuit 1, feedback resistance Rd is connected to driving power grade circuit 3
Between the second input terminal of the operational amplifier OPA of second output terminal and integrating circuit 1.
Direct current detection protection circuit 4 is connected for controlling pulse-width modulation circuit 2 and driving power grade circuit 3, is led to
It crosses pulse-width modulation circuit 2 and exports the first pulse-width signal Vpwma and the second pulse-width signal Vpwmb detection DC current,
When detecting DC current, output protection signal FAULT controls driving power grade circuit 3 and is switched to without output state or high resistant
State.Specifically, protection signal FAULT can be switched to without output state or high resistant shape with direct controlling and driving power stage circuit 3
State can also be triggered an enable signal HiZ control driving power grade circuit 3 by protection signal FAULT and is switched to without output shape
State or high-impedance state.In embodiments of the present invention, although high-impedance state is driving power grade circuit 3 relative to its power input
Still the resistance with output but with high (being greater than predetermined threshold), so that it cannot substantially put input signal
Greatly, so that even if there are DC current in input signal, driving power grade circuit will not damage subsequent conditioning circuit.
Specifically, as shown in figure 4, direct current detection protects circuit 4 to compare including duty cycle difference detection circuit 41, first
Compared with device CMP1, the second comparator CMP2 and logical detection circuit 42.
Wherein, duty cycle difference detection circuit 41 includes capacitor C, charging paths 41a and discharge paths 41b and charge and discharge
Control circuit 41c.Duty cycle difference detection circuit 41 is obtained between the two by detection pulse-width signal Vpwma and Vpwmb
Duty cycle difference, detection output det output characterization duty cycle difference detection voltage Vdet.
As shown in figure 4, capacitor C is connected between detection output det and ground terminal.Charging paths 41a and detection export
Det connection is held, for being charged by steering capacitor C.Specifically, charging paths 41a is connected to power end vdd and detection output
Between det, including the first current source A1 being serially connected and first switch S1.Discharge paths 41b and detection output det connects
It connects, discharges for controlled from capacitor C.Specifically, discharge paths 41b is connected between detection output det and ground terminal, including
The the second current source A2 and second switch S2 being serially connected.In first switch S1 conducting, the first current source A1 is injected to capacitor C
Electric current, charging paths are in running order.In second switch S2 conducting, the second current source A2 extracts electric current, electric discharge from capacitor C
Branch is in running order.Electric current of the electric current equal to the second current source A2 so that the first current source A1 can be set, exist as a result,
The voltage Vdet of capacitor C is constant when charging paths 41a and discharge paths 41b are worked at the same time.Thus, it is possible to by capacitor C's
The state of pulse-width signal in charge and discharge analog circuit, since DC detecting protection circuit does not need actually to pulsewidth tune
Signal processed is sampled, and the circuit parameter of circuit parameter and class-D amplifier is not directly dependent upon, therefore, the first current source A1
It can be set smaller with the electric current of the second current source A2, such as 10mA, it is possible thereby to reduce circuit power consumption.It is preferred real at one
It applies in mode, first switch S1 is controlled by the first pulse-width signal Vpwma, and second switch S2 is by the second pulse-width signal
Vpwmb control.Charging paths 41a charges when the first pulse-width signal Vpwma is high level as a result, and discharge paths 41b exists
Second pulse-width signal Vpwmb discharges when being high level.So in the first pulse-width signal Vpwma and the second pulsewidth tune
When signal Vpwmb strictly complementary processed, charging paths 41a and discharge paths 41b work at the same time or are simultaneously stopped work, due to charge and discharge
Electric current is equal, and therefore, in the pulse-width signal of the two-pass DINSAR mutual added time, the voltage of capacitor C is constant.In class-D amplifier
There are when DC current in input signal, can be deposited in the first pulsewidth modulated signal Vpwma and the second pulse-width signal Vpwmb
In mismatch, so as to cause the two not strictly complementary.At this point, both possible be high level or low level simultaneously.In the first pulsewidth
Modulated signal Vpwma be high level when, and the second pulse-width signal Vpwmb be low level when, illustrate the first pulsewidth modulation letter
The duty ratio of number Vpwma is bigger than the second pulse-width signal Vpwmb, while also illustrating audio corresponding to output signal Vouta
The amplitude of signal is greater than the amplitude of audio signal corresponding to output signal Voutb, and charging paths 41a charges, and discharges
Branch 41b does not work, and the voltage Vdet of capacitor C rises.When the first pulse-width signal Vpwma is low level, and the second arteries and veins
When wide modulated signal Vpwmb is high level, illustrate the duty ratio of the first pulse-width signal Vpwma than the second pulse-width signal
Vpwmb is small, while also illustrating that the amplitude of audio signal corresponding to output signal Vouta is less than corresponding to output signal Voutb
Audio signal amplitude, at this point, charging paths 41a does not work, and discharge paths 41b discharges, the voltage Vdet of capacitor C
Decline.DC component may be superimposed in biggish differential input signal.The voltage Vdet of capacitor C meets as a result,：Vdet=I*
T1/c-I*t2/c=I* △ t/c, wherein I is the electric current of current source, and t1 indicates Vouta>Voutb duration, t2 table
Show Vouta<Voutb duration, △ t=t1-t2, then △ t can characterize the duty ratio of Vouta and the duty ratio of Voutb
Between difference, c be capacitor C capacitance, therefore, Vdet can be characterized between the duty ratio of Vouta and the duty ratio of Voutb
Difference.In turn, whether excessive or too small if can compare the difference by two comparators.
Charge-discharge control circuit 41c is used to control charging paths 41a and is greater than second in the level of the first pulse-width signal
Charge when the level of pulse-width signal, and control discharge paths 41b the first pulse-width signal level less than the second arteries and veins
It discharges when the level of wide modulated signal.Charge-discharge control circuit 41c inputs the first, second pulse-width signal, to first switch
S1 exports the first pulse-width signal Vpwma, exports the second pulse-width signal Vpwmb to second switch S2.It is readily appreciated that, fills
Charge/discharge control circuit 41c can also be realized using other circuit structures or mode.
First comparator CMP1 is used for the first ratio of output when the voltage Vdet of detection output is greater than first threshold Vrefa
Compared with signal Det_a.Second comparator CMP2 is used to export the when the voltage Vdet of detection output is less than second threshold Vrefb
Two comparison signal Det_b.First comparison signal Det_a can characterize the first pulse-width signal Vpwma and the second pulsewidth modulation
The duty cycle difference of signal Vpwmb is excessively high.Direct current signal may be mixed into the first pulse-width signal Vpwma of this explanation.The
Two comparison signal Det_b can characterize the duty ratio of the second pulse-width signal Vpwmb and the first pulse-width signal Vpwma is accounted for
The too high difference of empty ratio.Direct current signal may be mixed into the second pulse-width signal Vpwmb of this explanation.
Logical detection circuit 42 be used for according at least one predetermined detection period the first comparison signal Det_a and
The second comparison signal Det_b output protection signal FAULT.For example, logical detection circuit 42 is detecting that first compares letter
Number Det_a or the second comparison signal Det_b, that is, output protection signal FAULT, or continuous multiple cycle detections are to same relatively letter
Number when output protection signal FAULT.Logical detection circuit 42 can carry out timing control for it with input clock signal CLK_TW.
The present embodiment passes through the two-pass DINSAR pulse-width signal (class-D amplifier that detection in the ideal situation should be complementary
The output signal of pulse-width modulation circuit), it is complementary with another way pulse-width signal to compare pulse-width signal duty ratio all the way
Difference between the duty ratio of signal judges to be input in class-D amplifier by DC current when the difference of duty ratio is excessive,
Output protection signal FAULT protects class-D amplifier, believes thus, it is possible to be inputted with lesser consumption detection class-D amplifier
Whether include DC current in number, and provides protection for class-D amplifier.
Fig. 5 is the schematic diagram of direct current detection protection another preferred embodiment of circuit of the embodiment of the present invention.Such as
Shown in Fig. 5, it includes duty detection circuit 41, first comparator CMP1, the second comparator that direct current detection, which protects circuit 4,
CMP2, logical detection circuit 42, reset circuit 43 and threshold value generative circuit 44.
Wherein, the circuit structure of duty detection circuit 41 is identical as Fig. 4, and details are not described herein.
In the preferred embodiment, reset circuit 43 is connect with detection output det, for the both ends reset capacitance C electricity
Pressure.Specifically, reset circuit 43 includes first resistor R1, second resistance R2, third switch S3 and the 4th switch S4.Wherein,
One resistance R1 and third switch S3 are connected in series between power end vdd and detection output det, and second resistance R2 and the 4th is opened
S4 is closed to be connected in series between detection output det and ground terminal.Third switch S3 and the 4th switch S4 are controlled by reset signal
RST (when reset signal RST is effective) is simultaneously turned on.When third switch S3 and the 4th switch S4 are simultaneously turned on, capacitor C can be with
Charge-exchange is carried out by first resistor R1 and second resistance R2 and power end vdd or ground terminal, so that detection output
The voltage of det is reset to initial value.The initial value is determined by the resistance value of first resistor R1 and second resistance R2.Preferably, it is
It is convenient for circuit design, can sets equal with the resistance value of second resistance R2 for first resistor R1.
Logical detection circuit 42 carries out reset behaviour every predetermined detection period output reset signal RST control reset circuit 43
Make, and (period for example including continuous 1000 detection cycles) detects that receiving first compares letter within a predetermined period of time
The periodicity of number Det_a, which is greater than protection threshold value and exports the protection signal FAULT or detect within a predetermined period of time, to be received
Output protection signal FAULT when the amount of cycles of second comparison signal Det_b is greater than protection threshold value.That is, logic detection
Circuit 42 monitors whether to receive the first comparison signal Det_a every in the predetermined detection period (such as detection cycle of 1ms)
(duty ratio of characterization Vouta is less than by (duty ratio of characterization Vouta is greater than the duty ratio of Voutb) or the second comparison signal Det_b
The duty ratio of Voutb), it records result and is resetted, monitor comparison result again in next cycle.If examined at 1000
It surveys in the period in period in the period for (in the time of 1S), having the quantity for being greater than protection threshold value (for example, 800) and has received
First comparison signal Det_a then illustrates that the duty ratio of the first output signal Vouta is constantly greater than the second output signal Voutb
Duty ratio, there are positive DC currents, are protected.Alternatively, if within the period of 1000 detection cycles (1S
Time in), have be greater than protection threshold value (for example, 800) period in have received the second comparison signal Det_b, then illustrate
The duty ratio of first output signal Vouta is constantly less than the duty ratio of the second output signal Voutb, and there are negative direct currents
Stream, is protected.
Optionally, logical detection circuit 42 can also come output protection signal FAULT, example according to different decision rules
Such as, logical detection circuit 42 can be used for controlling the reset circuit every predetermined detection phase output reset signal RST and be answered
Bit manipulation, and the output protection signal when continuous N (M is more than or equal to 2) a detection cycle detects the first comparison signal
FAULT, alternatively, the output protection signal FAULT when continuous N detection cycle detects the second comparison signal.That is,
Logical detection circuit 42 monitors whether to receive the first comparison signal every in the predetermined detection period (such as period of 1ms)
Det_a (duty ratio of characterization Vouta is greater than the duty ratio of Voutb) or the second comparison signal Det_b (duty of characterization Vouta
Than the duty ratio for being less than Voutb), it records result and is resetted, monitor comparison result again in next cycle.If continuous
Multiple periods receive the first comparison signal Det_a, then illustrate that the first output signal Vouta is constantly greater than the second output letter
Number Voutb, there are positive DC currents, are protected.If continuous multiple periods receive the second comparison signal
Det_b then illustrates that the second output signal Voutb is constantly greater than the first output signal Vouta, and there are negative DC currents, needs
It is protected.
In order to guarantee reseting precision, charge-discharge control circuit 41c (not shown) needs to be controlled according to reset signal RST
Charging paths and discharge paths work at the same time.In order to realize in detection cycle according to the first pulse-width signal Vpwma and
Two pulse-width signal Vpwmb control charge and discharge, and detection cycle is initial or detection cycle end is controlled according to reset signal
Charging circuit 41a and discharge circuit 41b stop working, and charge-discharge control circuit 41c can be using logic electricity as shown in FIG. 6
It realizes on road.44 circuit of charge and discharge control includes the first NOT gate Na, the second NOT gate Nb, the first NAND gate NANDa, the second NAND gate
NANDb, the first nor gate NORa and the second nor gate NORb.Wherein, the first NOT gate Na inputs the second pulse-width signal
Vpwmb.An input terminal of first NAND gate NANDa inputs the first pulse-width signal Vpwma, another input terminal and first
The output end of NOT gate Na connects.Second NOT gate Nb inputs the first pulse-width signal Vpwma.One of second NAND gate NANDb
Input terminal inputs the second pulse-width signal Vpwmb, another input terminal is connect with the output end of the second NOT gate Nb.First or non-
An input terminal of door NORa inputs reset signal RST, another input terminal is connect with the output end of the first NAND gate NANDa.
The control signal Q1 of first nor gate NORa output charging paths.An input terminal of second nor gate NORb inputs reset signal
RST, another input terminal are connect with the output end of the second NAND gate NANDb.The output discharge paths of second nor gate NORb
Control signal Q2.
The truth table of charge-discharge control circuit shown in fig. 6 is as shown in the table：
As a result, charge-discharge control circuit 41c can when reset signal RST is invalid (when being 0) according to the first pulsewidth modulation
Signal amplitude size represented by signal Vpwma and the second pulse-width signal Vpwmb is (that is, the duty of pulse-width signal
Than) to control charge or discharge or without charge and discharge, and when reset signal RST is effective (when being 1), no matter input signal
How to change control charging circuit 41a and discharge circuit 41b to stop working.In addition, since reset circuit 43 is in reset signal
The voltage of detection output det is made to be reset to initial value when RST is effective, and due in the first current source A1 and the second electric current
The voltage det of capacitor C is constant when charging paths 41a and discharge paths 42b are worked at the same time when the current value of source A2 is equal.Therefore,
Make charging electricity when reset signal RST is effective or when the first pulse width signal Vpwma and the second pulse-width signal Vpwmb is with phase
Said effect also may be implemented in road 41a and discharge circuit 41b charge and discharge simultaneously.
Certainly, it should be readily apparent to one skilled in the art that changing in input signal or in order to be adapted to reset signal, charging branch
The variation of the significant level of the control signal Q2 of the control signal Q1 and discharge paths on road, the charge-discharge control circuit can be adopted
It is realized with other logic digital circuits structures.
The detection for DC current is realized by reset circuit 43 and the cooperation of logical detection circuit 42 as a result,.Due to patrolling
It collects detection circuit 42 to detect the first comparison signal and the second comparison signal according to detection cycle, therefore, is suitable for using
Digital circuit.Meanwhile charge-discharge control circuit 41c is also suitable for preferably examining with the logic using digital circuit
Slowdown monitoring circuit 42 becomes one.And the other parts of circuit are suitable for realizing using analog circuit.Circuit shown in Fig. 5 is using digital mould
The design of quasi- hybrid circuit reduces the face that circuit occupies on an integrated circuit die thus, it is possible to be conducive to reduce circuit scale
Product, meanwhile, it is possible to prevente effectively from the detection of mistake, enhances anti-interference.
Preferably, the first threshold Vrefa and second threshold Vrefb for providing comparator CMP1 and CMP2 can be by threshold values
Generative circuit 44 provides.Threshold value generative circuit 44 includes that 3rd resistor R3, the 4th resistance R4 and the 5th resistance R5, three are connected on
Between power end vdd and ground terminal.Wherein, 3rd resistor R3 is connected between power end vdd and first threshold output end a.The
Four resistance R4 are connected between first threshold output end a and second threshold output end b.It is defeated that 5th resistance R5 is connected to second threshold
Between outlet b and ground terminal.Pass through the resistance value ratio of three resistance of setting, adjustable first threshold output end output as a result,
First threshold Vrefa and second threshold output end export second threshold Vrefb.Preferably, for the ease of the design of circuit, three
The resistance value of a resistance is set as identical.By threshold value generative circuit, charging paths, discharge paths and reset circuit using identical
Power end vdd makes corresponding voltage proportional to power end voltage, and all parameters of circuit can be made with the same electricity
Source voltage terminal variation, will not due to power end voltage variation and generate detection error, thus be conducive to improve power supply rejection ratio
Performance (PSRR).
The above description is only a preferred embodiment of the present invention, is not intended to restrict the invention, for those skilled in the art
For, the invention can have various changes and changes.All any modifications made within the spirit and principles of the present invention are equal
Replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (11)
1. a kind of direct current detection protects circuit, it is suitable for class-D amplifier, the class-D amplifier is for believing Differential Input
Amplify after number being converted to the first pulse-width signal and the second pulse-width signal, the direct current detection protects circuit packet
It includes：
Duty cycle difference detection circuit, for detecting the duty ratio of first pulse-width signal and the second pulse-width signal
Difference characterizes the detection voltage of the duty cycle difference in detection output output, and the detection output is the duty ratio
The output end of difference detection circuit；
First comparator, for exporting the first comparison signal when the detection voltage is greater than first threshold；
Second comparator, for exporting the second comparison signal when the detection voltage is less than second threshold；
Logical detection circuit, for according to first comparison signal and second ratio at least one predetermined detection period
Compared with signal output protection signal.
2. direct current detection according to claim 1 protects circuit, which is characterized in that the duty cycle difference detection electricity
Road includes：
Capacitor is connected between the detection output and ground terminal；
Charging paths are connect with the detection output, for by capacitor charging described in steering；
Discharge paths are connect with the detection output, are discharged for controlled from the capacitor；And
Charge-discharge control circuit is greater than the second arteries and veins in the level of first pulse-width signal for controlling the charging paths
Charge when the level of wide modulated signal, at the same control the discharge paths first pulse-width signal level less than
It discharges when the level of two pulse-width signals.
3. direct current detection according to claim 2 protects circuit, which is characterized in that the charging paths include mutual
Concatenated first current source and first switch；
The discharge paths include the second current source and second switch being serially connected；
Wherein, the controlled conducting of the first switch is to control the charging paths charging, and the controlled conducting of second switch is to control
Make the discharge paths electric discharge.
4. direct current detection according to claim 3 protects circuit, which is characterized in that believe in first pulsewidth modulation
When number equal with the level of second pulse-width signal, the charge-discharge control circuit controls the first switch and described
Second switch is both turned on；Alternatively,
When the level of first pulse-width signal and second pulse-width signal is equal, the charge and discharge control electricity
Road controls the first switch and the second switch is turned off.
5. direct current detection according to claim 2 protects circuit, which is characterized in that further include：
Reset circuit is connect with the detection output, for resetting the capacitor；
Wherein, the logical detection circuit is used to control the reset circuit every predetermined detection period output reset signal and carry out
Operation is resetted, and detects export the guarantor when amount of cycles of the first comparison signal is greater than protection threshold value within a predetermined period of time
Shield signal detects that the amount of cycles of the second comparison signal exports the protection greater than when protecting threshold value within a predetermined period of time
Signal.
6. direct current detection according to claim 2 protects circuit, which is characterized in that further include：
Reset circuit is connect with the detection output, for resetting the capacitor；
Wherein, the logical detection circuit is used to control the reset circuit every predetermined detection period output reset signal and carry out
Operation is resetted, the logical detection circuit exports the protection when continuous N detection cycle detects the first comparison signal
Signal, alternatively, the logical detection circuit exports the protection when continuous N detection cycle detects the second comparison signal
Signal, M are the integer greater than 2.
7. direct current detection according to claim 5 or 6 protects circuit, which is characterized in that the reset circuit includes：
First resistor and third switch, are connected in series between power end and the detection output；
Second resistance and the 4th switch, are connected in series between the detection output and ground terminal；
Wherein, the third switch and the 4th switch are controlled by reset signal and simultaneously turn on.
8. direct current detection according to claim 5 or 6 protects circuit, which is characterized in that the charge and discharge control electricity
Road controls the charging paths according to reset signal and the discharge paths work at the same time.
9. direct current detection according to claim 8 protects circuit, which is characterized in that charge-discharge control circuit includes：
First NOT gate inputs second pulse-width signal；
First NAND gate, an input terminal input first pulse-width signal, another input terminal and first NOT gate
Output end connection；
Second NOT gate inputs first pulse-width signal；
Second NAND gate, an input terminal input second pulse-width signal, another input terminal and second NOT gate
Output end connection；
First nor gate, an input terminal input the reset signal, the output of another input terminal and first NAND gate
End connection, exports the control signal of charging paths；
Second nor gate, an input terminal input the reset signal, the output of another input terminal and second NAND gate
End connection, exports the control signal of discharge paths.
10. direct current detection according to claim 1 protects circuit, which is characterized in that it further include threshold value generative circuit,
The threshold value generative circuit includes：
3rd resistor is connected between power end and first threshold output end；
4th resistance is connected between the first threshold output end and second threshold output end；
5th resistance is connected between the second threshold output and ground；
Wherein, the first threshold output end exports the first threshold, and second threshold output end exports the second threshold.
11. a kind of class-D amplifier, including：
Integrating circuit exports revised differential signal for input differential signal；
Pulse-width modulation circuit generates the first pulse-width signal and the second pulsewidth tune for distinguishing the differential signal after Introduced Malaria
Signal processed；
Driving power grade circuit, for amplifying first pulse-width signal and the second pulse-width signal respectively；And
If direct current detection of any of claims 1-10 protects circuit, connect with the driving power grade circuit
It connects；
Wherein, the driving power grade circuit is switched to without output state or high-impedance state after receiving the protection signal.
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| CN106059513B true CN106059513B (en) | 2018-11-23 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| EP3402070B1 (en) * | 2017-05-11 | 2020-02-12 | Infineon Technologies Austria AG | Class d audio amplifier with adjustable gate drive |
| CN109068242B (en) * | 2018-08-27 | 2023-11-17 | 上海艾为电子技术股份有限公司 | Digital audio power amplifier system |
| CN109104673B (en) * | 2018-08-27 | 2023-11-17 | 上海艾为电子技术股份有限公司 | Digital audio power amplifier system |
| CN109003642A (en) * | 2018-09-20 | 2018-12-14 | 深圳三地芯电子有限责任公司 | Storage class circuit, memory detecting tool and memory detection system |
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| CN2362133Y (en) * | 1998-10-30 | 2000-02-02 | 彭光讚 | Voltage regulating automatic indicator for power supply device |
| CN201312285Y (en) * | 2008-09-02 | 2009-09-16 | 比亚迪股份有限公司 | D-type audio power amplifier |
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