CN106059507B - Class-D amplifier and the method for inhibiting class-D amplifier noise - Google Patents
Class-D amplifier and the method for inhibiting class-D amplifier noise Download PDFInfo
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- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/305—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in case of switching on or off of a power supply
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- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
Abstract
Description
Technical field
The present invention relates to electronic circuit technologies, and in particular to a kind of side of class-D amplifier and inhibition class-D amplifier noise Method.
Background technique
Class-D amplifier circuit is a kind of power amplifier of switching mode, compared with Linear Power Amplifier circuit, have it is high-efficient, It generates heat few feature, is therefore widely used in the consumer electronics sectors such as smart television, mobile phone.
Fig. 1 is the circuit diagram of existing class-D amplifier.As shown in Figure 1, class-D amplifier in the prior art is usual Including integrating circuit 1, pulse-width modulation circuit 2, driving power grade circuit 3 and feed circuit (feedback resistance R3 and R4 in Fig. 1). By the way that 1 input difference audio signal of integrating circuit, integrating circuit folds the feedback signal of difference audio signal and feed circuit Adduction is filtered by integration operation, filters out the noise signal other than class-D amplifier working frequency range (such as audio).Pulsewidth tune Circuit 2 processed be used for by the differential signal that integrating circuit 1 exports be modulated to pulsewidth modulation (Pulse Width Modulation, PWM) signal.Pulse-width modulation circuit 2 usually by by a pair of of differential signal respectively compared with a triangular signal, by comparing Device exports corresponding pwm signal.The full-bridge circuit that driving power grade circuit 3 is constituted using two-way amplifying circuit as shown in Figure 2, By the alternation of transistor half-bridge by the power amplification of pwm signal.Feed circuit is used for output signal feedback to input End.When application is audio-frequency power amplifier, loudspeaking can be directly transferred to by the amplified signal that driving power grade circuit 3 exports Device is reduced to audio signal (loudspeaker itself has certain low-pass filtering ability) or is reduced to sound via low-pass filter circuit Frequency signal is transmitted to loudspeaker broadcasting.In general, class-D amplifier can also the input terminal of integrating circuit 1 connect filter capacitor with into The filtering of the row first order.
Existing class-D amplifier is powering on or shutdown moment, can generate " POP " noise in output end.It is being applied to audio When system, " POP " noise can make loudspeaker generate plosive when power amplifier powers on or turns off.Small " POP " noise User may be allowed to have discordant feeling, and big " POP " noise is more likely to damage loudspeaker.Therefore, inhibit class-D amplifier " POP " noise is extremely important.
Summary of the invention
In view of this, the present invention provides the method for a kind of class-D amplifier and inhibition class-D amplifier noise, to inhibit D class to put " POP " noise of big device.
In a first aspect, providing a kind of class-D amplifier, comprising:
Integrating circuit, including operational amplifier and integrating capacitor, the integrating circuit input differential signal output are corrected Differential signal afterwards；
Pulse-width modulation circuit generates the first pulse-width signal and the second pulsewidth tune for the differential signal after Introduced Malaria Signal processed；
Driving power grade circuit, for amplifying first pulse-width signal and the second pulse-width signal respectively；
Wherein, after the class-D amplifier powers on, the operational amplifier and pulse-width modulation circuit of the integrating circuit are opened It is dynamic, the driving power grade circuit start is delayed when by first, the integrating capacitor is delayed when using second and is powered on.
Preferably, the control circuit is also used to first control the integrating capacitor and product when the class-D amplifier is closed Divide circuit decoupling, is closing the driving power grade circuit by delaying when third, delayed described in closing when using the 4th The operational amplifier of integrating circuit and the pulse-width modulation circuit.
Preferably, the integrating circuit includes:
Operational amplifier；
First integral capacitor is connected between the first input end of the operational amplifier and the first output end；
Second integral capacitor is connected between the second input terminal of the operational amplifier and second output terminal；
State switching circuit makes the first integral capacitor and second integral capacitor be linked into integral in the first state In loop, make the first integral capacitor and second integral capacitor and integral loop decoupling in the second condition.
Preferably, the state switching circuit includes:
First control switch, it is in parallel with the first integral capacitor；And
Second control switch, it is in parallel with the second integral capacitor；
Wherein, first control switch and the second control switch equal controlled shutdown in the first state, in the second state Under controlled conducting.
Preferably, the state switching circuit includes:
First control switch and 3rd resistor are connected in series in first input end and the first output of the operational amplifier Between end；And
Second control switch and the 4th resistance are connected in series in the second input terminal and the second output of the operational amplifier Between end；
Wherein, first control switch and the second control switch equal controlled shutdown in the first state, in the second state Under controlled conducting.
Preferably, first control switch and second control switch are controlled by rising edge and/or failing edge is oblique The control signal conduction on slope or shutdown.
Preferably, the operational amplifier includes voltage trimming circuit, and the voltage trimming circuit is for generating finishing electricity It presses to compensate the resistive mismatch of the class-D amplifier, the voltage of modifying is according to the output difference of the class-D amplifier measured in advance The amplitude mismatch value of sub-signal is set.
Second aspect provides a kind of class-D amplifier, comprising:
Integrating circuit, input differential signal export the differential signal after being corrected；
Pulse-width modulation circuit, for after Introduced Malaria differential signal and triangular wave generate the first pulse-width signal and the Two pulse-width signals；And
Driving power grade circuit, for amplifying first pulse-width signal and the second pulse-width signal respectively；Its In, the integrating circuit includes operational amplifier, and the operational amplifier includes voltage trimming circuit, the voltage trimming circuit For generating finishing voltage to compensate the resistive mismatch of the class-D amplifier, the finishing voltage is according to the D class measured in advance The amplitude mismatch value of the output difference signal of amplifier is set.
The third aspect, a method of inhibiting class-D amplifier noise, the class-D amplifier includes integrating circuit, pulsewidth tune Circuit processed and driving power grade circuit, the integrating circuit include operational amplifier and integrating capacitor, which comprises
Operational amplifier and the pulse-width modulation circuit starting of the integrating circuit are controlled after the class-D amplifier powers on；
The control driving power grade circuit start is delayed when by first；
It is delayed when using second and controls the integrating capacitor of the integrating circuit and power on.
Preferably, the method also includes:
Integrating capacitor and the integral loop that the integrating circuit is first controlled when the class-D amplifier is closed are decoupling；
The driving power grade circuit is being closed by delaying when third；
The operational amplifier and the pulse-width modulation circuit for closing the integrating circuit are delayed when using the 4th.
Preferably, the control switch in the parallel branch by controlling the integrating capacitor control integrating circuit power on or with Integral loop is decoupling.
Preferably, the operational amplifier includes the voltage trimming circuit for exporting finishing voltage, by the finishing electricity Pressure is set as the amplitude mismatch value of the output difference signal of the class-D amplifier measured in advance.
The embodiment of the present invention finds " POP " noise of class-D amplifier mainly by the differential networks of class-D amplifier by analysis In capacitor element it is uneven caused by capacitive mismatch and resistance device it is uneven caused by resistive mismatch cause, pass through delay difference The starting time of capacitor in subnetwork, so that capacitor is after the starting of other components, electric current starts work when relatively stable smaller again Make, the differential signal mismatch as caused by capacity unmbalance can be effectively reduced, as caused by capacitive mismatch " POP " is inhibited to make an uproar Sound.Meanwhile the operational amplifier of voltage trimming circuit is had by using in the integration circuit, and according to the difference measured in advance SLM Signal Label Mismatch amplitude control voltage reconditioning circuit generate finishing voltage, to compensate differential signal mismatch, it is possible thereby to inhibit due to " POP " noise caused by resistive mismatch.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, the above and other purposes of the present invention, feature and Advantage will be apparent from, in the accompanying drawings:
Fig. 1 is the circuit diagram of existing class-D amplifier；
Fig. 2 is the circuit diagram of semibridge system driving power grade circuit wherein all the way；
Fig. 3 A is the schematic diagram of the pwm signal of resistive mismatch；
Fig. 3 B is the schematic diagram of the pwm signal of capacitive mismatch；
Fig. 4 A is the circuit diagram of the class-D amplifier of the embodiment of the present invention；
Fig. 4 B is the circuit diagram of the another embodiment of the class-D amplifier of the embodiment of the present invention；
Fig. 5 is the control sequential figure of the class-D amplifier of the embodiment of the present invention；
Fig. 6 is the circuit diagram for the operational amplifier that the class-D amplifier of the embodiment of the present invention uses；
Fig. 7 is the flow chart of the method for the inhibition class-D amplifier noise of the embodiment of the present invention.
Specific embodiment
Below based on embodiment, present invention is described, but the present invention is not restricted to these embodiments.Under Text is detailed to describe some specific detail sections in datail description of the invention.Do not have for a person skilled in the art The present invention can also be understood completely in the description of these detail sections.In order to avoid obscuring essence of the invention, well known method, mistake There is no narrations in detail for journey, process, element and circuit.
In addition, it should be understood by one skilled in the art that provided herein attached drawing be provided to explanation purpose, and What attached drawing was not necessarily drawn to scale.
It will also be appreciated that in the following description, " circuit " refers to be passed through electrically by least one element or sub-circuit The galvanic circle that connection or electromagnetism connect and compose.When title element or the " connection of another element of circuit " being connected to " or element/circuit " between two nodes when, it, which can be, is directly coupled or connected another element or there may be intermediary element, element it Between connection can be physically, in logic or its combination.On the contrary, when claiming element " being directly coupled to " or " directly connecting Be connected to " another element when, it is meant that the two be not present intermediary element.
Unless the context clearly requires otherwise, "include", "comprise" otherwise throughout the specification and claims etc. are similar Word should be construed as the meaning for including rather than exclusive or exhaustive meaning；That is, be " including but not limited to " contains Justice.
In the description of the present invention, it is to be understood that, term " first ", " second " etc. are used for description purposes only, without It can be interpreted as indication or suggestion relative importance.In addition, in the description of the present invention, unless otherwise indicated, the meaning of " multiple " It is two or more.
The existing research for inhibiting " POP " noise is generally focused on increase noise suppression circuit.And by the study found that D Class A amplifier A generate the reason of " POP " noise it is actually main there are two: capacitive mismatch and resistive mismatch.
For capacitive mismatch, the main reason is that the capacitive part of different accesses is uneven in circuit.
As shown in Figure 1, class-D amplifier has been symmetrically arranged filter capacitor and integrating capacitor for two paths of differential signals. Meanwhile there is also parasitic capacitances in circuit loop.
The asymmetric meeting of input filter capacitor and parasitic capacitance and the parasitic capacitance of feed circuit is so that two-pass DINSAR The circuit parameter of signal is asymmetric, to generate capacitive mismatch.
Simultaneously as process deviation, there may be certain differences by integrating capacitor C1 and C2, this also results in capacitive mistake Match.
There is only capacitive mismatch, if inputted without signal, the PWM letter of the amplification of class-D amplifier output Number as shown in Figure 3A, since capacity unmbalance makes the presence of delay between two paths of signals, which will cause the production of " POP " noise It is raw.The parameter (decay time) of capacitive mismatch can be obtained by testing output waveform in the case where no input signal.Meanwhile Capacitive mismatch usually can only occur in circuit start moment.
For resistive mismatch, the main reason is that the resistive component of different accesses is uneven in circuit.
As shown in Figure 1, in the ideal case, the resistance R1 and resistance R2 of integrating circuit input terminal should be essentially equal, instead Resistance R3 and R4 in current feed circuit also wants essentially equal, however, in actual conditions, it is almost impossible in technique to accomplish to make two Resistance is essentially equal, therefore, it may appear that the mismatch of resistance R1 and R2 and the mismatch of resistance R3 and R4.If class-D amplifier is defeated When entering end does not have input signal, ideally, output should also be zero, however due to the presence of these resistive mismatches, so that Even if the case where being inputted without signal, due to the presence of resistive mismatch, so that the differential input end of integrating amplification circuit is in the presence of poor Divide input, which exports after integrating amplification circuit and the amplification of the circuit of rear class, to cause " POP " noise.
In addition, in addition to resistive mismatch can form Differential Input in the input terminal of integrating amplification circuit, so that integral amplifier Circuit deviates outside bias point, and the operational amplifier OPA itself in integrating circuit intrinsic input imbalance (mismatch) can also cause " POP " noise, or even " POP " noise caused by resistive mismatch can be aggravated.
The input imbalance (offset) of resistive mismatch and operational amplifier does not change with the frequency of class-D amplifier, is one A intrinsic mismatch always exists during class-D amplifier work.
If resistive mismatch can cause the output wave of class-D amplifier in the case where there is only resistive mismatch and without input signal Shape is as shown in Figure 3B, and ideally, output signal Vouta should be identical with Voutb, i.e. Vouta-Voutb should be Zero, however, so that Voutb < Vouta, then Vouta-Voutb is greater than zero, so as to cause " POP " noise due to resistive mismatch. By testing the output waveform of class-D amplifier in no input signal, the parameter (output of resistive mismatch can be calculated Voltage difference).
Based on the above analysis, the circuit signal with the class-D amplifier for inhibiting " POP " noise immune of the embodiment of the present invention Figure is as shown in Figure 4 A.The class-D amplifier includes integrating circuit 1 ', pulse-width modulation circuit 2, driving power grade circuit 3, feedback electricity Road R3 and R4 and control circuit 4.
Wherein, integrating circuit 1 ' includes operational amplifier OPA, the integrating circuit 1 ' input a pair of differential signal Vina with Vinb exports differential signal Vopa and Vopb after a pair is corrected.The input terminal and differential signal input of integrating circuit 1 ' it Between filter capacitor can also be set differential signal is filtered.
Pulse-width modulation circuit 2 is used to distinguish differential signal Vopa and Vopb generation the first pulsewidth modulation letter after Introduced Malaria Number Vpwma and the second pulse-width signal Vpwmb.Wherein, the first pulse-width signal Vpwma is obtained by differential signal Vopa modulation , the second pulse-width signal has differential signal Vopb modulation to obtain.Specifically, pulse-width modulation circuit 2 may include two simultaneously The comparator of column, a comparator export the first pulse-width signal for comparing differential signal Vopa and triangular wave Vtri Vpwma.Another comparator is used to compare differential signal Vopb and triangular wave Vtri, exports the second pulse-width signal Vpwmb, Thus, it is possible to which two paths of differential signals is easily modulated to pwm signal.Certainly, pulse-width modulation circuit 2 can also use other electricity Line structure realizes PWM modulation.
Driving power grade circuit 3 in amplifying the first pulse-width signal Vpwma and the second pulse-width signal respectively Vpwmb, output signal output Vouta and Voutb.Driving power grade circuit 3 can be electric using two-way half-bridge as shown in Figure 2 Road.As shown in Fig. 2, half-bridge circuit includes two transistors being connected between power supply and ground.In the pulse-width signal of input When for high level, the transistor turns connected to power supply, the transistor shutdown being connected to ground, thus the voltage that out-put supply limits And electric current.When the pulse-width signal of input is low level, the transistor turns being connected to ground, the transistor connected to power supply Shutdown.Thus, it is possible to which pwm signal is amplified.
Feed circuit is connected between the difference output end and integrating circuit 1 of driving power grade circuit 3.Specifically, it feeds back Circuit is made of two-way feedback resistance R3 and R4, wherein feedback resistance R3 is connected to the first output end of driving power grade circuit 3 Between the first input end of the operational amplifier OPA of integrating circuit 1, feedback resistance R4 is connected to driving power grade circuit 3 Between the second input terminal of the operational amplifier OPA of second output terminal and integrating circuit 1.
Control circuit 4 is for controlling integrating circuit 1 ', pulse-width modulation circuit 2 and driving power grade circuit 3.Specifically, it controls Circuit 4 processed is used to control the operational amplifier of the integrating circuit after the class-D amplifier powers on and pulse-width modulation circuit opens It is dynamic, the control driving power grade circuit start is delayed when by first, and the control integral electricity is delayed when using second The integrating capacitor C1 and C2 on road 1 ' are powered on.
This subsection timing sequence control mode makes the front stage circuit successively timesharing starting of class-D amplifier circuit, is conducive to It ensures the stability of circuit, and allows the integrating capacitor of the integrating amplification circuit in prime last just access ring after circuit stability Road, so that caused by operational amplifier OPA amplification output " POP " makes an uproar after the capacitive mismatch avoided is integrated by integrating capacitor Sound.
As also will appear caused by capacitive mismatch " POP " noise when class-D amplifier is closed, control circuit 4 is also Timing control can equally be carried out when class-D amplifier is closed to inhibit caused by capacitive mismatch " POP " noise.Specifically, it controls Circuit 4 processed first resets the integrating capacitor C1 and C2 of integrating circuit 1 ' when the class-D amplifier is closed, and delays when by second Driving power grade circuit is closed, the operational amplifier OPA for closing integrating circuit 1 ' and pulsewidth modulation electricity are delayed when using first Road 2.
Specifically, in the present embodiment, the integrating capacitor of integrating circuit 1 ' power on and reset by setting with integral electricity The control switch for holding C1 and C2 parallel connection is realized.As shown in Figure 4 A, integrating circuit 1 ' include operational amplifier OPA, first resistor R1, Second resistance R2, first integral capacitor C1 and second integral capacitor C2 and state switching circuit.Operational amplifier OPA is two inputs The operational amplifier of two outputs.First resistor R1 be connected to integrating circuit 1 ' first input end and operational amplifier it is first defeated Enter between end.Second resistance R2 is connected between the second input terminal of integrating circuit 1 ' and the second input terminal of operational amplifier. First integral capacitor C1 is connected between the first input end of operational amplifier 1 ' and the first output end.Second integral capacitor C2 connects It connects between the second input terminal and second output terminal of operational amplifier 1 '.State switching circuit for making in the first state First integral capacitor C1 and second integral capacitor C2 are linked into integral loop (that is, powering on), make institute in the second condition It states first integral capacitor C1 and second integral capacitor C2 and integral loop is decoupling (that is, resetting).In Figure 4 A, state switches Circuit includes the first control switch S1 and the second control switch S2.First control switch S1 is in parallel with first integral capacitor C1.The Two control switch S2 are in parallel with second integral capacitor C2.
When the first control switch S1 and the second control switch S2 is connected, first integral capacitor C1 and second integral capacitor C2 It is short-circuited, so that electric current does not flow through from integrating capacitor, two integrating capacitors are reset, and integrating circuit not can be carried out integral behaviour Make.When the first control switch S1 and the second control switch S2 is turned off, first integral capacitor C1 and second integral capacitor C2 are connect Enter into loop, electric current can be flowed through from integrating capacitor, and integrating circuit can start to work.The control of control circuit 4 first as a result, Control switch S1 and the second control switch S2 is turned off to power on to first integral capacitor C1 and second integral capacitor C2, control The first control switch S1 and the second control switch S2 is made to be both turned on to reset first integral capacitor C1 and second integral capacitor C2, That is, first integral capacitor C1 and second integral capacitor is decoupling from integral loop.
Fig. 4 B is the circuit diagram of the another embodiment of the class-D amplifier of the embodiment of the present invention.In figure 4b, product Parallel circuit 1 ' includes operational amplifier OPA, first resistor R1, second resistance R2, first integral capacitor C1 and second integral capacitor C2 and state switching circuit.Operational amplifier OPA, first resistor R1, second resistance R2, first integral capacitor C1 and second integral Capacitor C2 connection relationship is identical as Fig. 4 A, and details are not described herein.State switching circuit makes first integral electric in the first state Hold C1 and second integral capacitor C2 to be linked into integral loop, makes first integral capacitor C1 and second integral in the second condition Capacitor C2 and integral loop are decoupling.In figure 4b, state switching circuit includes the first control switch S1 and the second control switch S2 and 3rd resistor R3 ' and the 4th resistance R4 '.In figure 4b, the first control switch S1 and 3rd resistor R3 ' are connected in series in Between the first input end of operational amplifier OPA and the first output end；Meanwhile second control switch S2 and the 4th resistance R4 ' string Connection is connected between the second input terminal of operational amplifier OPA and second output terminal.That is, the first control switch S1 and The series circuit of three resistance R3 ' is in parallel with first integral capacitor C1, the series circuit of the second control switch S2 and the 4th resistance R4 ' It is in parallel with second integral capacitor C2.Similarly, when the first control switch S1 and the second control switch S2 is connected, first integral electricity Hold C1 and second integral capacitor C2 to be short-circuited, so that electric current does not flow through from integrating capacitor, be reset.In the first control switch When S1 and the second control switch S2 is turned off, first integral capacitor C1 and second integral capacitor C2 are short-circuited and are linked into loop, Electric current can be flowed through from integrating capacitor, and integrating circuit can start to work.The introducing of 3rd resistor R3 ' and the 4th resistance R4 ' by Reduce the current break caused by switching the first control switch S1 and the second control switch S2, what thus inhibition newly introduced " POP " noise.
Meanwhile it can be further suppressed by reducing the switching rate of the first control switch S1 and the second control switch S2 " POP " noise due to caused by control switch.The control signal timing diagram of control circuit 4 is as shown in Figure 5.In Fig. 5, in t1 It carves, class-D amplifier powers on, at this point, control circuit 4 controls operational amplifier OPA by control signal PWD1 (low level is effective) It is powered on pulse-width modulation circuit 2.It is delayed when by scheduled first, in t2 moment operational amplifier OPA and pulsewidth modulation electricity Road 2 is stablized, and is powered at this point, control circuit 4 controls driving power grade circuit 3 by control signal PWD2 (low level is effective).? It is delayed when by scheduled two, it is also stable in t3 moment driving power grade circuit 3, at this point, control circuit 4 passes through control signal RST controls the first control switch S1 and the second control switch S2 shutdown, so that first integral capacitor C1 and second integral electricity Hold C2 to power on.Wherein, the failing edge for controlling signal RST is ramp signal, to slow down the control of the first control switch S1 and second The switch speed of switch S2 inhibits thus bring noise.
Similarly, at the t4 moment, class-D amplifier is closed, at this point, the control circuit 4 for receiving shutdown signal passes through control Signal RST first resets first integral capacitor C1 and second integral capacitor C2, thus eliminate integrating capacitor imbalance for The influence of circuit.Wherein, the rising edge for controlling signal RST is ramp signal, to slow down the control of the first control switch S1 and second The switch speed of switch S2 is made, thus bring noise is inhibited.By scheduled third time delay, first integral capacitor C1 and second The charge of integrating capacitor C2 storage is flowed away by access where control switch, circuit stability.At this point, at the t5 moment, control circuit 4 Driving power grade circuit 3 is controlled by control signal PWD2 (low level is effective) to close.By scheduled 4th time delay, in t6 It carves, control circuit 4 controls operational amplifier OPA by control signal PWD1 (low level is effective) and pulse-width modulation circuit 2 is closed, To complete the closing of entire class-D amplifier circuit.
For " POP " noise caused by resistive mismatch, as the above analysis, resistive mismatch be will lead in class-D amplifier Two paths of differential signals amplitude on it is uneven.Moreover, signal amplitude imbalance caused by resistive mismatch can always exist.Therefore, It needs to compensate for that.Due to integrating circuit it is generally necessary to using operational amplifier, and the element of all resistive mismatches with Operational amplifier connection, therefore, the differential signal amplitude difference caused by resistive mismatch, which compensates, at operational amplifier is More appropriate.Meanwhile existing partial arithmetic amplifier has the function of voltage trimming (Offset Trim), the function is usual It is compensated for the variation to operational amplifier itself.The operation that the class-D amplifier of Fig. 6 embodiment of the present invention uses is put The circuit diagram of big device.As shown in fig. 6, operational amplifier OPA may include transistor M1-M4, current source A1-A3 and electricity Press reconditioning circuit TRIM.Wherein, the grid of transistor M1 and M2 is connected with each other, and source electrode is connect with current source A1 and A2 respectively, is leaked Pole is connected respectively to the first output end out1 and second output terminal out2 of operational amplifier.The grid of transistor M3 and M4 are distinguished It is connect with first input end in1 and the second input terminal in2, source electrode is connect with current source A3.Voltage trimming circuit TRIM and crystal Pipe M1 is connected with the drain electrode of M2, a finishing voltage is generated according to control signal, with the finishing voltage compensation operational amplifier The imbalance of two output end voltage amplitudes.As described above, passing through the output for testing class-D amplifier in no input signal The parameter (output voltage difference) of resistive mismatch can be calculated in waveform.Thus, it is possible to pass through in advance the case where zero inputs Under, the amplitude mismatch value of the output difference signal of class-D amplifier is measured, and the finishing electricity is set according to the amplitude mismatch value Pressure, compensates hence for the resistive mismatch of circuit, and then inhibits " POP " noise due to caused by resistive mismatch.
The compensation way of resistive mismatch can be both used in conjunction with capacitive mismatch Restrain measurement above, it can also be independent Using in class-D amplifier.
The embodiment of the present invention finds " POP " noise of class-D amplifier mainly by the differential networks of class-D amplifier by analysis In capacitor element it is uneven caused by capacitive mismatch and resistance device it is uneven caused by resistive mismatch cause, pass through delay difference The starting time of capacitor in subnetwork, so that capacitor is after the starting of other components, electric current starts work when relatively stable smaller again Make, the differential signal mismatch as caused by capacity unmbalance can be effectively reduced, as caused by capacitive mismatch " POP " is inhibited to make an uproar Sound.Meanwhile the operational amplifier of voltage trimming circuit is had by using in the integration circuit, and according to the difference measured in advance SLM Signal Label Mismatch amplitude control voltage reconditioning circuit generate finishing voltage, to compensate differential signal mismatch, it is possible thereby to inhibit due to " POP " noise caused by resistive mismatch.
Fig. 7 is the flow chart of the method for the inhibition class-D amplifier noise of the embodiment of the present invention.As shown in fig. 7, the method Include:
Step 100, the operational amplifier that integrating circuit is controlled after class-D amplifier powers on and pulse-width modulation circuit starting.
Step 200, by first when delay the control driving power grade circuit start.
Step 300, using second when delay and control the integrating capacitor of the integrating circuit and power on.
Thus, it is possible to effectively inhibit " POP " noise when powering on caused by capacitive mismatch.
Meanwhile the method also includes:
Step 400, the integrating capacitor that the integrating circuit is first reset when the class-D amplifier is closed.
Step 500 closes the driving power grade circuit by delaying when third.
Step 600, using the 4th when delay the operational amplifier for closing the integrating circuit and the pulsewidth modulation electricity Road.
Thus, it is possible to inhibit " POP " noise when class-D amplifier is closed.
Preferably, the control switch in the parallel branch by controlling the integrating capacitor controls integrating circuit and powers on or again It sets.
Meanwhile for resistive mismatch, the method, which is used, sets the class-D amplifier measured in advance for the finishing voltage The amplitude mismatch value of output difference signal can inhibit as caused by resistive mismatch " POP " noise.
The above description is only a preferred embodiment of the present invention, is not intended to restrict the invention, for those skilled in the art For, the invention can have various changes and changes.All any modifications made within the spirit and principles of the present invention are equal Replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (11)
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI707589B (en) | 2019-04-15 | 2020-10-11 | 旺宏電子股份有限公司 | Headphone driver and driving method thereof |
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| Publication number | Publication date |
|---|---|
| CN106059507A (en) | 2016-10-26 |
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