CN106057875B - Voltage regulation pure spin current demultiplexer - Google Patents
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- H—ELECTRICITY
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66984—Devices using spin polarized carriers
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Abstract
The invention relates to a voltage-regulated pure spin current demultiplexer, which is characterized in that: comprises a gate voltage structure, a spin channel and a substrate; the gate voltage structure comprises a gate electrode and an insulating layer; the gate voltage structure is specifically a three-class voltage control structure: top gate voltage control, back gate voltage control, and dual gate voltage control. The invention realizes the distribution of voltage regulation pure spin current and has the following advantages: energy loss generated in the spin signal is changed by voltage regulation instead of the traditional magnetic field, so that the power consumption of the device is reduced; the size change of spin resistances of different channels is realized by regulating and controlling the voltage, the distribution of pure spin current is controlled, and the reconfigurability of the multi-path tap is realized; as a basic unit of the reconfigurable logic circuit, the design of the spin logic circuit is simplified, the circuit integration level is improved, and the process and the manufacturing and processing are convenient; besides pure spin current logic circuits, the invention can also be used in the application fields of novel spin logic such as spin current modulators and the like.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to a voltage-regulated pure spin current demultiplexer, which is used for realizing the reconfigurable distribution of pure spin current in a spin logic circuit and belongs to the technical field of spin logic devices.
[ background of the invention ]
The traditional spintronics device realizes the storage of information by controlling the magnetization direction of a magnetic material, derives integrated electronic devices such as a spin valve, a magnetic tunnel junction and the like on the basis of a giant magnetoresistance effect, is widely applied to the fields of magnetic nonvolatile memories, high-precision sensors, biological sensing detection and the like, and brings huge technological and industrial innovations. Although the traditional spintronic device can enable stored data to be power-down and non-volatile, so as to overcome the problem of static power consumption of the current computing system, the data needs to be frequently switched between an electric state and a magnetic state in transmission and logic computation, and the dynamic power consumption of large data transmission cannot be solved. The spin logic device based on the pure spin current utilizes the pure spin current to transmit information and perform logic operation, can effectively solve the problem of dynamic power consumption of the device, and promotes the development of a large-scale integrated circuit and a computing system based on the spin logic device with low power consumption.
One basic device structure for pure spin current is a lateral spin valve, whose structure includes a spin injection electrode/spin channel/spin detection electrode. The spin injection electrode is mainly composed of a cladding layer, a ferromagnetic layer and a tunneling layer: ferromagnetic layers are used to generate a specific spin polarization direction, and commonly used ferromagnetic layers include ferromagnetic metals such as iron (Fe), cobalt (Co), nickel (Ni), and alloys thereof; the clad layer is used to prevent oxidation of the ferromagnetic layer, and commonly used materials are gold (Au), platinum (Pt), and the like; the tunneling layer can reduce relaxation of spin-polarized electrons in the spin channel caused by direct contact of the ferromagnetic electrode, and improve spin injection efficiency, and commonly used tunneling layers include magnesium oxide (MgO), aluminum oxide (Al2O3), and the like. Spin channels are channels for spin transfer diffusion, and currently, commonly used materials are mainly classified into two types, one type is a metal material (such as copper, silver, aluminum, and the like), and the other type is a semiconductor material (such as silicon, carbon nanotubes, graphene, and the like). Spin channel materials need to have weak spin-orbit interactions and spin scattering mechanisms, thus having long spin relaxation times and spin diffusion lengths, enabling long-distance spin transport, enabling wider spin logic operation. Furthermore, by means of spin interaction mechanisms such as spin transfer torque and the like and superposition of pure spin currents in different polarization directions, the pure spin currents can be utilized to realize logic operation, and a spin logic device is manufactured. By means of the majority logic based on the superposition principle (after the pure spin currents in the orthogonal polarization directions are superposed, the spin currents disappear), the reconfigurable spin and/or logic gate can be realized by utilizing a basic structure unit of the spin logic circuit, namely a multiplexer, and the logic selection function from a plurality of input ends to a single output end is completed. The other basic structural unit of the spin logic circuit, namely a demultiplexer, namely a structure from a single input end to a plurality of output ends is used for realizing the distribution function of pure spin current. In the current spin logic circuit design, the pure spin current demultiplexer design has the following defects:
1. The distribution of pure spin current can be realized only by the symmetrical design of the length of the spin channel, and the function of the device is single;
2. The distribution of pure spin current cannot be effectively regulated, and a redundant and complex spin logic circuit design is needed to realize a complex spin logic function;
3. The method has no circuit reconfigurability, cannot meet the design of a spin logic circuit with low power consumption and high integration level, and has high process manufacturing difficulty and cost.
[ summary of the invention ]
The object of the invention is:
aiming at the problems of single function, non-reconfigurability, circuit design difficulty, power consumption, cost, manufacturing process and the like of the pure spin current based device mentioned in the background, the invention provides a voltage-regulated pure spin current demultiplexer which regulates and controls pure spin current by using voltage, overcomes the defects of the existing design and technology, is used for realizing the reconfigurable distribution of the pure spin current in a spin logic circuit, simplifies the design of the spin logic circuit, improves the circuit integration level and reduces the manufacturing cost of the process.
the technical scheme is as follows:
the technical scheme of the invention is that the voltage-regulated pure spin current demultiplexer realizes the regulation of pure spin current from a single input end to multiple output ends, and the grid voltage is designed to be added to a spin channel.
A voltage-controlled pure spin current demultiplexer comprises a gate voltage structure, a spin channel and a substrate; the gate voltage structure comprises a gate electrode and an insulating layer; the gate voltage structure is divided into three types of voltage control structures: top gate voltage control, back gate voltage control, and dual gate voltage control (including both top gate and back gate voltage control).
The gate electrode comprises one of gold (Au), platinum (Pt), copper (Cu) or other non-ferromagnetic metal materials;
the insulating layer material comprises one of silicon dioxide (SiO2), magnesium oxide (MgO), aluminum nitride (AlN), titanium oxide (TiO2), aluminum oxide (Al2O3), hafnium oxide (HfO2) or other materials;
the spin channel material comprises one of metal nanowires (copper, silver, aluminum, and the like), semiconductor silicon, carbon nanotubes, graphene, silylene, molybdenum disulfide, or other low-dimensional materials.
the substrate of the present invention includes, but is not limited to, silicon wafer, boron nitride, quartz wafer, and other insulating substrates.
A pure spin current demultiplexer based on voltage regulation can be of a single-input-double-output or multi-output structure, and the variable range of an included angle is 0-360 degrees.
The invention can change the electron and spin transmission properties of the spin channel through the control gate voltage, so as to cause the change of the spin resistance of the channel, thereby adjusting the magnitude of the channel pure spin current. Furthermore, in the structure of the demultiplexer, the magnitude of the pure spin current of each spin channel is changed by utilizing the regulation and control of the grid voltage, so that the reconfigurable distribution of the pure spin current can be realized.
(III) the advantages and the effects are as follows:
The invention provides a voltage-regulated pure spin current demultiplexer, which realizes the distribution of voltage-regulated pure spin current and has the following advantages compared with the traditional pure spin current logic device:
(1) energy loss generated in a spin signal is changed by voltage regulation instead of a traditional magnetic field, so that the power consumption of the device is reduced;
(2) By regulating and controlling the voltage, the change of the spin resistance of different channels can be realized, the distribution of pure spin current is controlled, and the reconfigurability of the demultiplexer is realized;
(3) The invention is used as a basic unit of a reconfigurable logic circuit, simplifies the design of a spin logic circuit, improves the integration level of the circuit and is convenient for the process and the manufacture.
(4) Besides pure spin current logic circuits, the model provided by the invention can also be applied to the application fields of novel spin logic such as spin current modulators and the like.
[ description of the drawings ]
FIG. 1-a is a three-dimensional schematic diagram of a dual-gate voltage regulated pure spin current demultiplexer.
1-b back gate voltage regulation pure spin current demultiplexer three-dimensional schematic diagram.
Fig. 1-c three-dimensional schematic diagram of a top gate voltage regulated pure spin current demultiplexer.
1-d other shapes Voltage regulated top view of a pure spin current demultiplexer.
FIG. 2-a is a schematic diagram of the change of spin resistance of a single spin channel by voltage regulation (taking negative correlation as an example).
FIG. 2-b is a schematic diagram of voltage regulation to change the pure spin current of a single spin channel.
Fig. 2-c is a schematic diagram of single input-dual output demultiplexer voltage regulation of pure spin current distribution.
Wherein, the parameters in the graph are defined as:
1 top gate electrode
2 and 5 insulating layers
3 spin channel
4 base
6 back gate electrode
7 pure spin current
8 included angle of device
rs spin resistance
VG gate voltage
is spin current
VG,1 first channel gate voltage
VG,2 second channel gate voltage
Is,1 first channel spin current
Is,2 second channel spin current
[ detailed description ] embodiments
The essential characteristics of the pure spin current demultiplexer based on voltage regulation are further explained with reference to the attached drawing.
Detailed exemplary embodiments are disclosed herein with specific structural and functional details representative of the purposes of describing the exemplary embodiments only, and thus the present invention may be embodied in many alternate forms and should not be construed as limited to only the exemplary embodiments set forth herein but rather as covering all changes, equivalents, and alternatives falling within the scope of the present invention.
Fig. 1-a, fig. 1-b, fig. 1-c, and fig. 1-d are schematic diagrams of various structures of a voltage-regulation-based pure spin current demultiplexer according to the present invention, which only take single input-double output as an example, and can design a multi-output structure in the same way, and the variable range of the included angle is 0-360 degrees. The invention comprises three voltage regulation structure diagrams 1-a to 1-c, namely a double-gate voltage, a back-gate voltage and a top-gate voltage structure. The present invention protects various branch shapes that implement multiple outputs, such as the fork-like structure shown in fig. 1-d.
FIG. 1-a is a three-dimensional schematic diagram of a voltage-regulated pure spin current shunt (taking dual-gate voltage control as an example);
The device disclosed by the invention comprises a top gate electrode (10-50nm), an insulating layer (1-100nm), a spin channel material, an insulating layer (1-100nm) and a back gate electrode (10-50nm) from bottom to top;
The gate electrode comprises one of gold (Au), platinum (Pt), copper (Cu) or other non-ferromagnetic metal materials.
the insulating layer material comprises one of silicon dioxide (SiO2), magnesium oxide (MgO), aluminum nitride (AlN), titanium oxide (TiO2), aluminum oxide (Al2O3), hafnium oxide (HfO2) or other materials;
the spin channel material comprises one of metal nanowires (copper, silver, aluminum, and the like), semiconductor silicon, carbon nanotubes, graphene, silylene, molybdenum disulfide, or other low-dimensional materials.
The substrate of the present invention includes, but is not limited to, silicon wafer, boron nitride, quartz wafer, and other insulating substrates.
plating each layer of substance of the device on a substrate according to the sequence from bottom to top by adopting the traditional methods of molecular beam epitaxy, electron beam evaporation, thermal evaporation, atomic layer deposition or magnetron sputtering, and then carrying out micro-nano processing technologies such as photoetching, etching and the like to prepare the device; the gate electrode may be formed in a square, rectangular (aspect ratio may be any value), circular or elliptical shape (aspect ratio may be any value).
Fig. 2-a to 2-c are schematic diagrams of the operating modes of the voltage-controlled pure spin current demultiplexer, taking the change of the channel spin resistance negative correlation as an example, specifically as follows:
2-a and 2-b are schematic diagrams of voltage regulation and variation of single spin channel spin resistance and pure spin current, respectively, for a single spin channel, as the regulation voltage VG increases, the spin resistance Rs decreases, and thus the pure spin current Is increases.
fig. 2-c a single input-dual output demultiplexer voltage regulated pure spin current distribution schematic, with the multiplexer tap controlled by the first channel and gate voltage of 2.
When VG, 1-VG and 2-0, the first channel and the second channel are both in the same large spin resistance state Rs, 1-Rs, 2 and Is, 1-Is and 2, and uniform small current can be realized;
When VG,1 ═ V, VG,2 ═ 0, that Is, VG,1> VG,2, then Rs,1< Rs,2, Is,1< Is,2, pure spin flow mostly exits to the first channel;
When VG,1 Is 0, VG,2 Is V, i.e. VG,1 Is VG,2, Rs,1> Rs,2, Is,1> Is,2, the pure spin flow mostly exits to the second channel;
when VG,1 ═ VG and 2 ═ V, the first channel and the second channel are both in the same low spin resistance state Rs,1 ═ Rs,2, Is,1 ═ Is,2, and a large current can be equally divided.
Claims (6)
1. A voltage regulated pure spin current demultiplexer is characterized in that: comprises a gate voltage structure, a spin channel and a substrate; the gate voltage structure comprises a gate electrode and an insulating layer; the gate voltage structure is specifically a three-class voltage control structure: top gate voltage control, back gate voltage control and dual gate voltage control;
The method comprises the steps of plating each layer of substance of the device on a substrate from bottom to top by adopting the traditional methods of molecular beam epitaxy, electron beam evaporation, thermal evaporation, atomic layer deposition or magnetron sputtering, and then carrying out the micro-nano processing technology of photoetching and etching to prepare the device.
2. A voltage regulated spin current demultiplexer as claimed in claim 1 wherein: the multi-path demultiplexer can be of a single-input-multi-output structure, and the variable range of the included angle is 0-360 degrees.
3. A voltage regulated spin current demultiplexer as claimed in claim 1 or 2 wherein: the gate electrode comprises one of gold, platinum and copper.
4. a voltage regulated spin current demultiplexer as claimed in claim 1 or 2 wherein: the insulating layer material comprises one of silicon dioxide, magnesium oxide, aluminum nitride, titanium oxide, aluminum oxide and hafnium oxide.
5. A voltage regulated spin current demultiplexer as claimed in claim 1 or 2 wherein: the spin channel material comprises one of a metal nanowire, semiconductor silicon, a carbon nanotube, graphene, silicon alkene and molybdenum disulfide.
6. A voltage regulated spin current demultiplexer as claimed in claim 1 or 2 wherein: the substrate comprises a silicon wafer, boron nitride or quartz wafer.
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