Detailed description of the invention
Understandable for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from, below in conjunction with accompanying drawing and enforcement
The present invention will be further described for example.
It should be noted that elaborate detail in the following description so that fully understanding the present invention.But this
Bright can be different from alternate manner described here implement with multiple, those skilled in the art can be in the present invention
Similar popularization is done in the case of culvert.Therefore the present invention is not limited by following public specific embodiment.
Refer to Fig. 3, Fig. 3 is a kind of image element circuit that the embodiment of the present invention provides.Image element circuit 200 includes that first is initial
Change module the 210, second initialization module 220, Data write. module 230, memory module 240, threshold value compensation module 250, drive
Module 260 and light emitting module 270, the first initializing signal line 211 and the second initializing signal line 221;Wherein, first initialize
Module 210 is connected with the first initializing signal line 211;Second initialization module 220 is connected with the second initializing signal line 221.
As it is shown on figure 3, image element circuit 200 also include light emitting control line EMIT, the first scan line S1, the second scan line S2 and
Data wire DL;Wherein, the first initialization module 210 is also connected with memory module 240, light emitting control line EMIT,
Second initialization module 220 also with drive module 260, light emitting module the 270, first scan line S1, the second scan line
S2 connects,
Data write. module 230 connects memory module the 240, second scan line S2 and data wire DL respectively, for according to the
Scanning signal in two scan lines S2 controls whether to input to memory module 240 data signal on data wire DL,
Memory module 240 connects first initialization module the 210, second initialization module 220 and Data write. module respectively
230, for stablizing first initialization module the 210, second initialization module 220 and the signal of Data write. module 230 generation,
Threshold value compensation module 250 connects driving module the 260, second scan line S2 respectively, for according to the second scan line S2
On scanning signal compensation drive module 260 threshold voltage,
Drive module 260 to connect compensating module 250, light emitting module the 270, first voltage end PVDD respectively, send out for driving
Optical module 270 is luminous,
Light emitting module 270 connects light emitting control line EMIT respectively, drives module the 260, second voltage end PVEE, for basis
Control signal on light emitting control line EMIT is luminous.
The embodiment of the present invention arranges first initializing signal line the 211, second initializing signal line 221 and connects respectively at the beginning of first
Beginningization module the 210, second initialization module 220.So design is advantageous in that, reduces the load of initializing signal line and posts
Raw electric capacity, it is to avoid the problem that picture produces crosstalk.
Fig. 4 is a kind of organic electroluminescence display panel structural representation that the present invention provides.As shown in Figure 4, organic light emission shows
Showing that panel includes a first initializing signal line 211 and a second initializing signal line 221, wherein, first initializes letter
Number line 211 is connected with each pixel cell on display floater, the second initializing signal line 221 and each picture on display floater
Element unit connects.In order to avoid the crossing elimination between the first initializing signal line 211 and the second initializing signal line 221 produces
Short circuit problem, the present invention the first initializing signal line 211 and the second initializing signal line 221 lay respectively at different film layer.
It should be noted that first initializing signal line the 211, second initializing signal line 221 can be connected to same
Initialization voltage source 201, as shown in Figure 3.Alternatively, first initializing signal line the 211, second initializing signal line 221 is respectively
It is connected to different initialization voltage source.
It should be noted that on voltage signal on the first initializing signal line 211 and the second initializing signal line 221
Voltage signal is identical, it is also possible to different.
It should be noted that on voltage signal on the first initializing signal line 211 and the second initializing signal line 221
Voltage signal is depending on driving module 260.When driving module 260 just conducting under the control of high level signal, first is initial
Change the voltage signal on holding wire 211 and the voltage signal on the second initializing signal line 221 is high level signal;When driving mould
When block 260 just turns under the control of low level signal, the voltage signal and second on the first initializing signal line 211 initializes
Voltage signal on holding wire 221 is low level signal.
Fig. 5 is a kind of image element circuit figure that the embodiment of the present invention provides.As it is shown in figure 5, the first initialization module 210 includes
The first transistor T1, the second initialization module 220 includes transistor seconds T2 and third transistor T3, Data write. module 230
Including the 4th transistor T4, memory module 240 includes the first electric capacity C1, and compensating module 250 includes the 5th transistor T5, drives mould
Block 260 includes that the 6th transistor T6, light emitting module 270 include the 7th transistor T7 and Organic Light Emitting Diode D;Wherein, first
The grid of transistor T1 is connected with light emitting control line EMIT, the first pole and the first initializing signal line Lref1Connect, the second pole with
First end of the first electric capacity C1 connects;The grid of transistor seconds T2 and the first scan line S1 connect, and the first pole is initial with second
Change holding wire Lref2Connecting, the second pole is connected with second end of the first electric capacity C1;The grid of third transistor T3 and the second scanning
Holding wire S2 connects, the first pole and the second initializing signal line Lref2Connecting, the second pole connects with the anode of Organic Light Emitting Diode D
Connect;The grid of the 4th transistor T4 and the second scan signal line S2 connect, and the first pole is connected with data wire DL, the second pole and first
First end of electric capacity C1 connects;The grid of the 5th transistor T5 and the second scan signal line S2 connect, the first pole and the 6th crystal
Second pole of pipe T6 connects, and the second pole is connected with second end of the first electric capacity C1;The grid of the 6th transistor T6 and the first electric capacity
Second end of C1 connects, and the first pole is connected with the first voltage end PVDD;The grid of the 7th transistor T7 and light emitting control line EMIT
Connecting, the first pole is connected with second pole of the 6th transistor T6, and the second pole is connected with the anode of Organic Light Emitting Diode D;Organic
The negative electrode of light emitting diode D and the second voltage end PVEE connect.
Fig. 6 is the driving method of a kind of driving image element circuit as shown in Figure 5 that the embodiment of the present invention provides.Driving method
Including first stage P1, provide the first level signal to the first scan line S1, to the second scan line S2 and described light emitting control line
Second electrical level signal is provided, the grid of the first transistor T1 is initialized;Second stage P2, to the first scan line S1,
Two scan lines S2 provide the first level signal, provide second electrical level signal to light emitting control line EMIT, write data into and store
In the first electric capacity C1;Phase III P3, provides second electrical level signal to the first scan line S1, light emitting control line EMIT, to
Two scan lines S2 provide the first level signal, capture the threshold voltage of the first transistor T1;Fourth stage P4, to first
Scan line S1, the second scan line S2 provide second electrical level signal, provide the first level signal, organic light emission to the first scan line S1
Diode D is luminous.
In image element circuit shown in Fig. 5, the first transistor T1 to the 7th transistor T7 is PMOS, in corresponding diagram 6
One level signal is low level signal, and second electrical level signal is high level signal.
As it has been described above, the first transistor T1 to the 7th transistor T7 is PMOS in the image element circuit shown in Fig. 5, because of
This, the first initializing signal line Lref1With the second initializing signal line Lref2On voltage signal be low level signal.
It should be noted that the type of the first transistor T1 to the 7th transistor T7 is not construed as limiting by the present invention, first is brilliant
Body pipe T1 to the 7th transistor T7 can also be NMOS tube, when the first transistor T1 to the 7th transistor T7 is NMOS tube
Time, the first level signal is high level signal, and second electrical level signal is low level signal;Or the first transistor T1 to the 7th is brilliant
Body pipe T7 existing PMOS can also have again NMOS tube.
The operation principle of embodiment of the present invention image element circuit is illustrated below in conjunction with Fig. 5 and Fig. 6.
First stage P1, under the control of the first scan signal line S1 of transmission low level signal, transistor seconds T2 leads
Logical, initialization voltage VrefThrough the second initializing signal line Lref2, conducting transistor seconds T2 transmission to the of the first electric capacity C1
Two end B.Owing to the grid of the 6th transistor T6 connects the second end B of the first electric capacity C1, therefore, at P1 moment, the first transistor
The grid voltage of T1 is Vref, i.e. complete grid at this moment the 6th transistor T6 and initialize.
Second stage P2, in transmission the first scan signal line S1 of low level signal, the control of the second scan signal line S2
Under, transistor seconds T2, third transistor T3, the 4th transistor T4, the 5th transistor T5 conducting, initialization voltage VrefThrough
Two initializing signal line Lref2, conducting transistor seconds T2 transmission to the second end B of the first electric capacity C1;Meanwhile, data signal
Through data wire DL, the first end A of the 4th transistor T4 transmission to the first electric capacity C1 of conducting.Therefore, in this moment, the first electric capacity
The voltage of the first end A of C1 is Vdata, the voltage of the second end B is Vref, write data into and be stored in the first electric capacity C1.
Phase III P3, under the control of the second scan line S2 of transmission low level signal, third transistor T3, the 4th crystalline substance
Body pipe T4 and the 5th transistor T5 conducting.Owing to the grid of the 6th transistor T6 connects the second end B of the first electric capacity C1, and upper
The voltage of the second end B of one stage P2 the first electric capacity C1 is Vref, therefore in the initial 6th transistor T6 conducting in this stage.The
The first voltage pvdd that one voltage end PVDD provides is brilliant to the 6th via the 6th transistor T6, the 5th transistor T5 transmission of conducting
The grid of body pipe T6, when grid voltage and the first voltage pvdd of the 6th transistor T6 differ a VthTime the 6th transistor T6 cut
Only, wherein, VthIt it is the threshold voltage of the 6th transistor T6.At phase III P3, complete the threshold voltage to the first transistor T1
Capture.
Fourth stage P4, under the control of the light emitting control line EMIT of transmission low level signal, the first transistor T1, the 7th
Transistor T7 turns on.Initialization voltage VrefThe first end A to the first electric capacity C1 is transmitted via the first transistor T1 of conducting.?
In this moment, the first end A of the first electric capacity C1 was become Vref from the Vdata in a upper moment, according to capacitance coupling effect, and the first electric capacity
The second end B of C1 is by (the pvdd+V in a upper momentth) become ((pvdd+Vth)+(Vdata-Vref)).Therefore, in this moment the 6th
The grid voltage of transistor T6 and the poorest V of source voltagegs=Vth+(Vdata-Vref), it is seen that Vgs-Vth=Vdata-Vref, due to just
Beginningization voltage VrefLess than data signal Vdata, therefore, turn at this moment the 6th transistor T6.First voltage end PVDD provides
The first voltage pvdd be applied to the anode of Organic Light Emitting Diode D via the 6th transistor T6, the 7th transistor T7 of conducting,
The cathode voltage pvee of Organic Light Emitting Diode D is provided by the second voltage source PVEE simultaneously.Wherein, the second voltage source PVEE provides
The second voltage signal pvee less than first voltage source PVDD provide the first voltage signal pvdd.According to shown in Fig. 1 organic
The structure of optical diode understands, when applying certain driving voltage at the anode of Organic Light Emitting Diode and negative electrode, and You Jifa
Optical diode is luminous.
Now, the driving electric current such as formula (2) of Organic Light Emitting Diode is flow through
I=k (Vdata-Vref)2 (2)
Understand according to formula (2), flow through Organic Light Emitting Diode drive the threshold voltage of electric current and the 6th transistor without
Close.
Thus, it is found that the image element circuit of present invention offer and driving method are permissible in explanation from the embodiments above
Drive transistor threshold voltage drift is overcome to produce the problem that picture is uneven.
On the other hand, the present invention by arrange two initializing signal lines respectively with the first initialization module, second initial
Changing module to connect, so design is advantageous in that, be not only connected with the first initialization module when one initializing signal line of use but also
When being connected with the second initialization module, due to the existence of parasitic capacitance, the problem that display picture is easily generated crosstalk;When setting
Put when two initializing signal lines are connected with the first initialization module, the second initialization module respectively and can reduce initializing signal
The load of line, reduces parasitic capacitance, it is to avoid the problem of crosstalk.Specifically, it is assumed that Lref1And Lref2For same holding wire,
When the B node of certain a line image element circuit is resetted, Lref1On have the change of electric current, the change of this electric current can be passed through
The first transistor M1, the first electric capacity C1 have influence on the B node current potential of other row image element circuits, are easily generated crosstalk phenomenon.This
L in inventionref1And Lref2For different two holding wires, wherein Lref1Only be responsible for A node reset, the reset of B node then by
Lref2Realize, Lref1And Lref2Between be independent of each other, therefore, when the B node of certain a line image element circuit is resetted,
Lref1On have the change of electric current, the change of this electric current does not interferes with the B node current potential of other row image element circuits, can keep away
Exempt from because cabling causes crosstalk and the problem of display inequality.
On the other hand, it can be seen that at whole working stage (P1~P4), first sweeps from the driving method shown in Fig. 6
Retouch the low level signal no overlap of low level signal and the LED control signal line EMIT of line S1, the second scan line S2, therefore, this
Plant design to export without SCAN and EMIT simultaneously.Due to SCAN and EMIT typically by the output of drive element of the grid, SCAN and
EMIT exports simultaneously and means that the workload of drive element of the grid increases, and the power consumption of circuit also can improve therewith.So, this
The image element circuit of bright embodiment offer and driving method thereof can reduce the workload of drive element of the grid, reduce image element circuit
Power consumption.
On the other hand, according to the work process in above-mentioned P1~P4 stage, before Organic Light Emitting Diode D luminescence,
Before the i.e. P4 stage, being all low level due to the signal in the second scan line S2, therefore, initialization voltage initializes letter through second
Number line Lref2, third transistor T3 of conducting be transferred to the anode of Organic Light Emitting Diode D, the sun to Organic Light Emitting Diode D
Pole resets, it is to avoid image element circuit produces in other of glow phase in stage and steals the brightest problem.Can from analysis above
To find out, the present invention arranges different initializing signal lines and connects from different initialization modules, reduces initializing signal line
Load, is prevented effectively from display picture and crosstalk and the problem of display inequality occurs.It should be noted that when shown in Fig. 3
When image element circuit includes three initialization modules, the organic electroluminescence display panel shown in Fig. 4 also includes the 3rd initializing signal line,
And the 3rd initializing signal line and the 3rd initialization module connect.The concrete structure of image element circuit is not limited by the present invention, only
If different initialization modules connects different initializing signal line structures broadly falls into protection scope of the present invention.
The present invention also provides for a kind of display floater, including image element circuit as above.
Above content is to combine concrete preferred implementation further description made for the present invention, it is impossible to assert
Being embodied as of the present invention is confined to these explanations.For general technical staff of the technical field of the invention,
On the premise of present inventive concept, it is also possible to make some simple deduction or replace, all should be considered as belonging to the present invention's
Protection domain.