CN103150991A - Pixel compensation circuit for AMOLED (Active Matrix/Organic Light Emitting Diode) displayer - Google Patents

Abstract

The invention provides a pixel compensation circuit. The pixel compensation circuit comprises a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a first capacitor, a second capacitor and an organic light-emitting diode, wherein a first end of the first switch receives data voltage; a second end of the first switch receives a first switch signal; a second end of the second switch receives the first switch signal; a second end and a third end of the third switch are both connected to first voltage; a first end of the fifth switch receives reference voltage; a second end of the fifth switch receives a third switch signal; a second end of the sixth switch receives the third switch signal; a first end of the second capacitor is connected to a second end of the first capacitor; a second end of the second capacitor receives a second switch signal; a first end of the organic light-emitting diode is connected to a first end of the sixth switch; and a second end of the organic light-emitting diode is connected to second voltage. Compared with the prior art, the pixel compensation circuit has the advantages that the threshold value voltage of the switches is compensated before a lightening period, so that the influence of the threshold vale voltage on OLED (Organic Light Emitting Diode) current is eliminated, and stable current output of an OLED in a pixel can be kept.

Description

Pixel compensation circuit for AMOLED display

Technical Field

The present invention relates to an active matrix organic light emitting diode display, and more particularly, to a pixel compensation circuit of the AMOLED display.

Background

The Organic Light Emitting Diode (OLED) can be classified into a Passive Matrix OLED (PMOLED) and an Active Matrix OLED (AMOLED) according to a driving method. The PMOLED does not emit light when data is not written, and emits light only during data writing. The driving mode has simple structure, low cost and easy design, and is mainly suitable for small and medium size displays.

The biggest difference between AMOLED and PMOLED is that each pixel has a capacitor to store data, so that each pixel is kept in a light-emitting state. The power consumption of the AMOLED is significantly less than that of the PMOLED, and the driving method thereof is suitable for developing a large-sized and high-resolution display, so that the AMOLED is a main development direction in the future. However, in the driving scheme of the AMOLED display, the OLED controls the luminance of light emission based on the magnitude of current flowing through the OLED, and the electrical parameters of the thin film transistor used for driving directly affect the display effect of the picture. For example, due to the manufacturing process, the threshold voltage (threshold voltage) of the tft in each pixel may shift, and even though the same data voltage is applied to the pixels, the current flowing through the OLED of each pixel may still vary, resulting in non-uniform brightness of the AMOLED display.

In view of the above, a task to be solved by the related art in the art is how to design a pixel compensation circuit for an AMOLED display to effectively improve or eliminate the defects of non-uniform brightness, poor display image quality, and the like.

Disclosure of Invention

In view of the above-mentioned drawbacks of the pixel compensation circuit for AMOLED display in the prior art, the present invention provides a novel pixel compensation circuit capable of improving the brightness non-uniformity.

In accordance with one aspect of the present invention, there is provided a pixel compensation circuit for an AMOLED display, comprising:

a first switch having a first end, a second end and a third end, wherein the first end is used for receiving a data voltage, and the second end is used for receiving a first switch signal;

a second switch having a first end, a second end and a third end, the second end for receiving the first switch signal;

a third switch having a first end, a second end and a third end, wherein the second end and the third end are both electrically connected to a first voltage;

a fourth switch having a first end, a second end and a third end, wherein the first end is electrically connected to the second end of the third switch, the second end is electrically connected to the first end of the third switch, and the third end is electrically connected to the third end of the second switch;

a fifth switch having a first end, a second end and a third end, wherein the first end is used for receiving a reference voltage, the second end is used for receiving a third switch signal, and the third end is electrically connected to the third end of the first switch;

a sixth switch having a first end, a second end and a third end, the second end for receiving the third switch signal, the third end electrically connected to the third end of the second switch;

a first capacitor having a first end and a second end, wherein the first end is electrically connected to the third end of the first switch, and the second end is electrically connected to the first end of the third switch;

a second capacitor having a first end and a second end, wherein the first end is electrically connected to the second end of the first capacitor and the first end of the second switch, and the second end is used for receiving a second switch signal; and

an organic light emitting diode having a first end and a second end, wherein the first end is electrically connected to the first end of the sixth switch, and the second end is electrically connected to a second voltage, wherein the second voltage is less than the first voltage.

Preferably, the first switch to the sixth switch are all a thin film transistor.

Preferably, a combination of the first switching signal, the second switching signal, and the third switching signal corresponds to a data holding period, a reset period, a voltage compensation period, and a lighting period in sequence.

In one embodiment, during the data holding period, the first switch signal and the second switch signal are both at a low level, and the third switch signal is at a high level.

In one embodiment, during the reset period, the first switch signal is at a low level, the second switch signal jumps from the low level to a high level, and the third switch signal is at a high level.

In one embodiment, during the voltage compensation period, the first switching signal is at a low level, the second switching signal jumps from a high level to a low level, and the third switching signal is at a high level.

In one embodiment, during the lighting period, the first switch signal is at a high level, the second switch signal is at a low level, and the third switch signal is at a low level.

Preferably, during the reset, a voltage Vg of the second terminal of the fourth switch satisfies a relation: vg = OVDD + | V_th︱

Preferably, during the voltage compensation, the voltage Vg of the second terminal of the fourth switch satisfies the relation: vg = OVDD-V_th︱

Preferably, during the lighting, the voltage Vg of the second terminal of the fourth switch satisfies a relation: vg = OVDD-V_th︱+V_ref-V_data

Wherein OVDD represents the first voltage, V_thRepresenting the threshold voltage, V, of the thin film transistor_refRepresents the reference voltage, V_dataRepresenting the data voltage.

By adopting the pixel compensation circuit, the OLED is driven by a 6T2C framework formed by six switches and two capacitors, the first end of the first switch receives a data voltage, the second ends of the first switch and the second switch simultaneously receive a first switch signal, the second end and the second end of the third switch are connected to a first voltage, the second ends of the fifth switch and the sixth switch simultaneously receive a third switch signal, the first end of the first capacitor is connected to the third end of the first switch and the second end of the first capacitor is connected to the first end of the third switch, the first end of the second capacitor is connected to the second end of the first capacitor and the first end of the second switch and the second end of the second capacitor receives a second switch signal. Compared with the prior art, the invention carries out compensation operation on the threshold voltage of the thin film transistor before the lighting period, eliminates the dependence of OLED current on the threshold voltage, and ensures that the OLED in the pixel can maintain stable current output.

Drawings

The various aspects of the present invention will become more apparent to the reader after reading the detailed description of the invention with reference to the attached drawings. Wherein,

FIG. 1 shows a schematic diagram of a pixel compensation circuit for an AMOLED display in the prior art using a 6T1C architecture;

FIG. 2 illustrates a schematic diagram of a pixel compensation circuit for an AMOLED display using a 6T2C architecture, according to an embodiment of the present invention;

FIG. 3a is a schematic diagram showing the operation of the switches of the pixel compensation circuit of FIG. 2 during data retention;

FIG. 3b shows a timing diagram of key signals of the pixel compensation circuit of FIG. 3 a;

FIG. 4a is a schematic diagram showing the operation of the switches of the pixel compensation circuit of FIG. 2 during reset;

FIG. 4b shows a timing diagram of key signals of the pixel compensation circuit of FIG. 4 a;

FIG. 5a is a schematic diagram showing the operation of the switches of the pixel compensation circuit of FIG. 2 during voltage compensation;

FIG. 5b shows a timing diagram of key signals of the pixel compensation circuit of FIG. 5 a;

FIG. 6a is a schematic diagram showing the operation of the switches of the pixel compensation circuit of FIG. 2 during the turn-on period; and

FIG. 6b shows a timing diagram of key signals of the pixel compensation circuit of FIG. 6 a.

Detailed Description

In order to make the present disclosure more complete and complete, reference is made to the accompanying drawings, in which like references indicate similar or analogous elements, and to the various embodiments of the invention described below. However, it will be understood by those of ordinary skill in the art that the examples provided below are not intended to limit the scope of the present invention. In addition, the drawings are only for illustrative purposes and are not drawn to scale.

Specific embodiments of various aspects of the present invention are described in further detail below with reference to the accompanying drawings.

Fig. 1 shows a schematic diagram of a pixel compensation circuit for an AMOLED display in the prior art adopting a 6T1C architecture, and fig. 2 shows a timing diagram of key signals of the pixel compensation circuit of fig. 1.

Referring to fig. 1, the pixel compensation circuit is a "6T 1C" structure, where 6T is the thin film transistors M1-M6, and 1C is the storage capacitor Cs disposed at the connection point between the gate of the thin film transistor M4 and the thin film transistors M1 and M3. That is, the term "mTnC" indicates that the number of thin film transistors is m, the number of storage capacitors is n, and m and n are natural numbers.

The circuit architecture of 6T1C is described in detail as follows: the first terminal of the storage capacitor Cs is electrically connected to a first switching signal S1. The first terminal of the thin film transistor M1 is electrically coupled to the second terminal of the storage capacitor Cs, the second terminal of the thin film transistor M1 is electrically coupled to a first voltage VDD, and the third terminal and the second terminal of the thin film transistor M1 are electrically coupled together. The second terminal of the thin film transistor M5 is for receiving a third switching signal EM, and the third terminal of the thin film transistor M5 is electrically coupled to the first voltage VDD. The first terminal of the thin film transistor M2 is electrically coupled to the first terminal of the thin film transistor M5, the second terminal of the thin film transistor M2 is configured to receive a second switching signal S2, and the third terminal of the thin film transistor M2 is electrically connected to a data voltage Vdata.

The first terminal of the thin film transistor M4 is electrically coupled to the first terminal of the thin film transistor M2 and the first terminal of the thin film transistor M5, and the second terminal of the thin film transistor M4 is electrically coupled to the first terminal of the thin film transistor M1 and the second terminal of the storage capacitor Cs. The first terminal of the thin film transistor M3 is electrically coupled to the second terminal of the thin film transistor M4, the second terminal of the thin film transistor M3 is configured to receive the second switching signal S2, and the third terminal of the thin film transistor M3 is electrically coupled to the third terminal of the thin film transistor M4. The first terminal of the tft M6 is electrically coupled to the third terminal of the tft M3, and the second terminal of the tft M6 is configured to receive the third switching signal EM. The anode of the organic light emitting diode OLED is electrically coupled to the third terminal of the thin film transistor M6, and the cathode thereof is connected to the second voltage VSS.

However, the electrical parameters of the thin film transistor used for driving will directly affect the display effect of the picture. Due to the influence of the manufacturing process, the threshold voltage of the thin film transistor in each pixel tends to drift, and at this time, even though the same data voltage is provided to the pixels, the current flowing through the OLED of each pixel still has a difference, resulting in uneven brightness of the AMOLED display.

In order to effectively solve the above-mentioned drawbacks, the present invention provides a novel pixel compensation circuit architecture. Fig. 2 shows a schematic diagram of a pixel compensation circuit for an AMOLED display using a 6T2C architecture, according to an embodiment of the invention.

Referring to fig. 2, the pixel compensation circuit of the present invention adopts a 6T2C architecture, and includes a first switch T1, a second switch T2, a third switch T3, a fourth switch T4, a fifth switch T5, a sixth switch T6, a first capacitor C1, and a second capacitor C2.

The first switch T1 has a first terminal (e.g., source, the same applies hereinafter), a second terminal (e.g., gate, the same applies hereinafter), and a third terminal (e.g., drain, the same applies hereinafter). The source of the first switch T1 is for receiving a data voltage Vdata, and the gate is for receiving a first switch signal S1. The gate of the second switch T2 is for receiving the first switching signal S1, and the source is electrically coupled to the first terminal of the second capacitor C2 and the second terminal of the first capacitor C1. The gate and the source of the third switch T3 are both electrically connected to a first voltage OVDD.

The source of the fourth switch T4 is electrically connected to the gate of the third switch T3, the gate of the fourth switch T4 is electrically connected to the drain of the third switch T3, and the drain of the fourth switch T4 is electrically connected to the drain of the second switch T2. The source of the fifth switch T5 is for receiving a reference voltage Vref, the gate of the fifth switch T5 is for receiving a third switching signal EM, and the drain of the fifth switch T5 is electrically connected to the drain of the first switch T1. The gate of the sixth switch T6 is used for receiving the third switching signal EM, and the source of the sixth switch T6 is electrically connected to the drain of the second switch T2 and the drain of the fourth switch T4.

The first capacitor C1 has a first end and a second end, the first end of the first capacitor C1 is electrically connected to the drain of the first switch T1, and the second end of the first capacitor C1 is electrically connected to the drain of the third switch T3. The second capacitor C2 has a first end and a second end, the first end of the second capacitor C2 is electrically connected to the second end of the first capacitor C1 and the source of the second switch T2, and the second end of the second capacitor C2 is configured to receive the second switch signal S2. The anode of the organic light emitting diode OLED is electrically connected to the drain of the sixth switch T6, and the cathode thereof is electrically connected to a second voltage OVSS, which is smaller than the first voltage OVDD.

In one embodiment, the first switch T1 through the sixth switch T6 are all thin film transistors.

In one embodiment, the combination of the first switching signal S1, the second switching signal S2 and the third switching signal EM sequentially corresponds to a data retention period P1, a reset period P2, a voltage compensation period P3 and a lighting period P4. That is, the operation of the pixel compensation circuit of the present invention can be divided into a plurality of cycle periods, each cycle period first performs a data retention operation, then performs a reset operation, then compensates for the threshold voltage of the thin film transistor, and finally lights the organic light emitting diode.

Fig. 3a shows a schematic diagram of the operation state of each switch of the pixel compensation circuit of fig. 2 during data retention, and fig. 3b shows a timing diagram of key signals of the pixel compensation circuit of fig. 3 a.

Referring to fig. 3a and 3b, in the data holding period P1, both the first switching signal S1 and the second switching signal S2 are at a low level, and the third switching signal EM is at a high level. At this time, the fifth switch T5 and the sixth switch T6 are in an off state. The first switch T1 is turned on by the first switching signal S1, the drain potential of the first switch T1 is the data voltage Vdata, and the gate potential of the fourth switch T4 is floating.

Fig. 4a is a schematic diagram showing the operation states of the switches of the pixel compensation circuit of fig. 2 during the reset period, and fig. 4b is a timing diagram showing key signals of the pixel compensation circuit of fig. 4 a.

Referring to fig. 4a and 4b, in the reset period P2, the first switching signal S1 is at a low level, the second switching signal S2 jumps from a low level to a high level, and the third switching signal EM is at a high level. At this time, the fifth switch T5 and the sixth switch T6 are in an off state, and the fourth switch T3 is also in an off state. The first switch T1 is turned on by the first switching signal S1, the drain potential of the first switch T1 is the data voltage Vdata, and the gate potential Vg of the fourth switch T4 satisfies the following relation:

Vg=OVDD+︱V_th︱

wherein OVDD represents a first voltage, V_thRepresenting the threshold voltage threshold of the thin film transistor.

Fig. 5a shows a schematic diagram of the operation state of each switch of the pixel compensation circuit of fig. 2 during voltage compensation, and fig. 5b shows a timing diagram of key signals of the pixel compensation circuit of fig. 5 a.

Referring to fig. 5a and 5b, during the voltage compensation period P3, the first switching signal S1 is at a low level, the second switching signal S2 jumps from a high level to a low level, and the third switching signal EM is at a high level. At this time, the fifth switch T5 and the sixth switch T6 are still in the off state, and the third switch T3 is also in the off state. The first switch T1 is turned on by the first switching signal S1, and the drain potential of the first switch T1 is the data voltage Vdata. And the gate potential Vg of the fourth switch T4 may satisfy the relation:

Vg=OVDD-︱V_th︱

wherein OVDD represents a first voltage, V_thRepresenting the threshold voltage threshold of the thin film transistor.

Fig. 6a is a schematic diagram showing the operation state of each switch of the pixel compensation circuit of fig. 2 during the lighting period, and fig. 6b is a timing diagram showing key signals of the pixel compensation circuit of fig. 6 a.

Referring to fig. 6a and 6b, during the lighting period P4, the first switching signal S1 is at a high level, the second switching signal S2 is at a low level, and the third switching signal EM is also at a low level. At this time, the fifth switch T5 and the sixth switch T6 are in an open state by the third switching signal EM, while the first switch T1 and the second switch T2 are in an off state by the first switching signal S1, and the third switch T3 is also in an off state. At this time, the drain potential of the first switch T1 is the reference voltage Vref. And the gate potential Vg of the fourth switch T4 satisfies the relation:

Vg=OVDD-︱V_th︱+V_ref-V_data

wherein OVDD represents a first voltage,V_thindicating the threshold voltage, V, of the thin film transistor_refDenotes a reference voltage, V_dataRepresenting the data voltage.

The magnitude of the current flowing through the organic light emitting diode OLED is calculated again according to the aforementioned mathematical relationship:

$I_d=\frac{1}{2}\·\mathrm{\κ}\·{(V_{\mathrm{sg}}-|V_{\mathrm{th}}\left|\right)}^2$

since the gate potential Vg of the fourth switch T4 is equal to (OVDD- | V)_th|+V_refVdata) and the source potential Vs of the fourth switch T4 is equal to OVDD, then

V_sg＝OVDD-(OVDD-|V_th|+V_ref-Vdata)

That is to say, the first and second electrodes,

$I_d=\frac{1}{2}\·\mathrm{\κ}\·{(V_{\mathrm{sg}}-|V_{\mathrm{th}}\left|\right)}^2$

$=\frac{1}{2}\·\mathrm{\κ}\·{[\mathrm{OVDD}-(\mathrm{OVDD}-|V_{\mathrm{th}}|+V_{\mathrm{ref}}-\mathrm{Vdata})-|V_{\mathrm{th}}\left|\right]}^2$

$=\frac{1}{2}\·\mathrm{\κ}\·{(\mathrm{Vdata}-V_{\mathrm{ref}})}^2$

it can be seen that the current flowing through the organic light emitting diode OLED is related to only the data voltage Vdata and the reference voltage Vref, and is not related to the threshold voltage of the thin film transistor.

By adopting the pixel compensation circuit, the OLED is driven by a 6T2C framework formed by six switches and two capacitors, the first end of the first switch receives a data voltage, the second ends of the first switch and the second switch simultaneously receive a first switch signal, the second end and the second end of the third switch are connected to a first voltage, the second ends of the fifth switch and the sixth switch simultaneously receive a third switch signal, the first end of the first capacitor is connected to the third end of the first switch and the second end of the first capacitor is connected to the first end of the third switch, the first end of the second capacitor is connected to the second end of the first capacitor and the first end of the second switch and the second end of the second capacitor receives a second switch signal. Compared with the prior art, the invention carries out compensation operation on the threshold voltage of the thin film transistor before the lighting period, eliminates the dependence of OLED current on the threshold voltage, and ensures that the OLED in the pixel can maintain stable current output.

Hereinbefore, specific embodiments of the present invention are described with reference to the drawings. However, those skilled in the art will appreciate that various modifications and substitutions can be made to the specific embodiments of the present invention without departing from the spirit and scope of the invention. Such modifications and substitutions are intended to be included within the scope of the present invention as defined by the appended claims.

Claims (10)

1. A pixel compensation circuit for an Active Matrix Organic Light Emitting Diode (AMOLED) display, the pixel compensation circuit comprising:

a first switch having a first end, a second end and a third end, wherein the first end is used for receiving a data voltage, and the second end is used for receiving a first switch signal;

a second switch having a first end, a second end and a third end, the second end for receiving the first switch signal;

a third switch having a first end, a second end and a third end, wherein the second end and the third end are both electrically connected to a first voltage;

a fourth switch having a first end, a second end and a third end, wherein the first end is electrically connected to the second end of the third switch, the second end is electrically connected to the first end of the third switch, and the third end is electrically connected to the third end of the second switch;

a fifth switch having a first end, a second end and a third end, wherein the first end is used for receiving a reference voltage, the second end is used for receiving a third switch signal, and the third end is electrically connected to the third end of the first switch;

a sixth switch having a first end, a second end and a third end, the second end for receiving the third switch signal, the third end electrically connected to the third end of the second switch;

a first capacitor having a first end and a second end, wherein the first end is electrically connected to the third end of the first switch, and the second end is electrically connected to the first end of the third switch;

a second capacitor having a first end and a second end, wherein the first end is electrically connected to the second end of the first capacitor and the first end of the second switch, and the second end is used for receiving a second switch signal; and

an Organic Light Emitting Diode (OLED) having a first end and a second end, wherein the first end is electrically connected to the first end of the sixth switch, and the second end is electrically connected to a second voltage, wherein the second voltage is less than the first voltage.

2. The pixel compensation circuit of claim 1, wherein the first switch to the sixth switch are all a thin film transistor.

3. The pixel driving circuit according to claim 1, wherein a combination of the first switching signal, the second switching signal, and the third switching signal sequentially corresponds to a data holding period, a reset period, a voltage compensation period, and a lighting period.

4. The pixel compensation circuit according to claim 3, wherein the first switching signal and the second switching signal are both at a low level and the third switching signal is at a high level during the data holding period.

5. The pixel compensation circuit according to claim 4, wherein the first switching signal is at a low level, the second switching signal jumps from a low level to a high level, and the third switching signal is at a high level during the reset period.

6. The pixel compensation circuit according to claim 5, wherein during the voltage compensation, the first switching signal is at a low level, the second switching signal jumps from a high level to a low level, and the third switching signal is at a high level.

7. The pixel compensation circuit according to claim 6, wherein the first switching signal is at a high level, the second switching signal is at a low level, and the third switching signal is at a low level during the lighting period.

8. The pixel compensation circuit of claim 3, wherein during the reset period, the voltage Vg of the second terminal of the fourth switch satisfies the relation:

Vg=OVDD+︱V_th︱

wherein OVDD represents the first voltage, V_thRepresenting the threshold voltage threshold of the thin film transistor.

9. The pixel compensation circuit of claim 3, wherein during the voltage compensation, the voltage Vg of the second terminal of the fourth switch satisfies the relation:

Vg=OVDD-︱V_th︱

wherein OVDD represents the first voltage, V_thRepresenting the threshold voltage threshold of the thin film transistor.

10. The pixel compensation circuit of claim 3, wherein during the lighting period, the voltage Vg of the second terminal of the fourth switch satisfies the relation:

Vg=OVDD-︱V_th︱+V_ref-V_data

wherein OVDD represents the first voltage, V_thRepresenting the threshold voltage, V, of the thin film transistor_refRepresents the reference voltage, V_dataRepresenting the data voltage.

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