CN106055426A - Real-time fault tolerant system design method based on evolvable hardware - Google Patents

Abstract

The present invention discloses a real-time fault tolerant system design method based on evolvable hardware, and belongs to the evolvable hardware field. According to the method, circuit encoding and system fault tolerant mechanism are analyzed, and a real-time fault tolerant system is implemented on an FPGA platform. A dynamic self-adaptive CGP encoding method is adopted, potential of an encoding matrix is mined, evolution consumed time is reduced, and evolution success rate is increased; and real-time performance and fault tolerance of the fault tolerant system are ensured by a plurality of mechanisms. The real-time performance of the system is ensured by using the system fault tolerant time as a constraint condition; a fault repair process is accelerated by using a static fault configuration database; when the static configuration database is overflowed, the system is reconstructed by using a compensation repair mode, and the long-term operation capability of the system is improved; and a real-time fault tolerant system prototype is constructed on the FPGA platform by using a virtual reconfigurable technology, and feasibility and validity of the design method are verified. Fault tolerance and real-time performance of the system are both considered by the method, and the advantages of the evolvable hardware in the fault tolerant design field are fully taken.

Description

Real-time fault tolerance design method based on Evolvable Hardware

Technical field

The invention belongs to Evolvable Hardware field, relate to a kind of real-time fault tolerance design method based on Evolvable Hardware.

Background technology

Along with the arriving of information age, each electronic product emerges in an endless stream, and the Working and life styles of people occurs Huge change.The electronic product become increasingly abundant is bringing easily simultaneously to people's life, the also design level to electronic system Have higher requirement.The function of electronic system constantly strengthens, and scale constantly expands, and the complexity of electronic system design is finger Number increases, and the experience of relying solely on will be unable to design the electronic system meeting demand.For a few thing in special environment Electronic equipment, such as space ship, bathyscaphe etc., extremely strict to the reliability requirement of system, once system malfunctions, These equipment will be caused fatal infringement, bring huge economic loss.Owing to traditional method for designing is static, it is System structure is once designed to be difficult to be modified again, relies solely on the experience of designer, it is impossible to what prognoses system can meet with Planting fault, also cannot be carried out preventing in advance, this just brings great hidden danger to the safety and reliability of system.In order to Break through the limitation of engineer's circuit, strengthen the adaptation ability of system counter external environment condition change, improve system reliability, compel It is essential and wants a kind of method for designing that can improve Fault Tolerance.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of real-time fault tolerance design method based on Evolvable Hardware, knot Close the self-organizing of Evolvable Hardware, self adaptation and the characteristic of selfreparing, it is proposed that a kind of dynamic self-adapting Descartes's genetic coding (Cartesian Genetic Programming, CGP) method and real-time fault tolerance mechanism, and in FPGA platform, achieve one Set real-time fault tolerance system prototype, its general frame is as shown in Figure 1.Wherein, evolution algorithmic uses C code to write, and operates in FPGA In the Microblaze processor soft core of platform built-in；Other modules then use Verilog code to write, and operate in FPGA platform On.

A kind of real-time fault tolerance design method based on Evolvable Hardware, step is as follows:

(1) dynamic self-adapting CGP coded method

Traditional CGP coding randomly chooses a stationary nodes as final output node, dynamic self-adapting CGP coding staff Method output node is not fixed, and uses a kind of dynamic random sampling model to select different node as output from CGP encoder matrix Node, calculates the fitness value of CGP encoder matrix respectively, and selects the matrix of fitness value maximum as optimal solution；Node Sampled probability dynamically adjusts along with population entirety fitness situation of change, and the fitness distribution situation of current population uses following public Formula calculates:

$f_d\left(t\right)=\frac{\stackrel{\‾}{f\left(t\right)}}{f_{max}\left(t\right)-f_{\min }\left(t\right)}---\left(1\right)$

Wherein, f_dT () represents the distribution of ideal adaptation degree or multiformity in population；Represent individual averagely fitting in population Answer angle value；f_maxT () represents maximum adaptation angle value individual in population；f_minT () represents minimum fitness value individual in population； Along with the increase of iterations, the fitness difference between individuality is more and more less, and average fitness value increases, f_dT the value of () is also Become larger；

Sampled probability is divided into two parts, and at the initial stage of evolution, Population adaptation angle value is relatively low, uses fixing higher sampled probability Add block convergence rate；When population average fitness value or iterations reach predetermined threshold value, according to population average fitness Value dynamically adjusts sampled probability；In evolutionary process, the computing formula of sampled probability is:

$P_s=\left\{\begin{array}{c}{P}_{s0},t<t_0\\ P_{s0}{e}^{\frac{-\&part;(t-t_0)}{t_{\max }}}/f_d\left(t\right),t\&GreaterEqual;t_0\end{array}\right.---\left(2\right)$

Wherein, P_s0Being the initial samples probability set, the set comprehensive of initial samples probability considers population scale and dyeing Body length；If initial samples probability is set to 1, the most now travels through all of node, and calculate fitness value；If initial samples Probability arranges too small, then randomly choose, and initial samples probability is not less than 0.5；t₀It is the critical iterations of sampled probability adjustment, t₀Value be 0.3t_max；It is self-defining parameter regulatory factor, is set as 2, t_maxIt it is the maximum iteration time of evolution algorithmic；

(2) real-time fault tolerance based on Evolvable Hardware mechanism

Tolerant system is substantially a kind of real-time system, and real-time is an important restrictions condition of tolerant system；Based on The real-time fault tolerance mechanism of Evolvable Hardware, with the System Fault Tolerance time as constraints, utilizes static configuration storehouse to accelerate repair process, holds concurrently Turn round and look at real-time and the fault-tolerance of tolerant system；Whole real-time fault tolerance mechanism mainly includes the following aspects:

1. evolution algorithmic maximum iteration time is calculated

It is defined as tolerable for system fault time repairing time limit T_max；T_maxObtained by fault analysis tree technology；For Guarantee system is repair system fault in repairing the time limit, will repair the time limit constraint bar as evolution algorithmic in evolutionary process Part；The first-selected formula (3) that passes through calculates the time T that evolution algorithmic iteration once needs_g；

T_g=λ (T_cfg+T_fit)+T_ea (3)

Wherein, T_cfgIt is the setup time of evolution platform, T_fitIt is the Fitness analysis time, T_eaWhen being the execution of evolution algorithmic Between, λ is the quantity of the offspring individual produced in each iterative process；The iterations of maximum is then obtained according to formula (4)；

$G_{max}=\frac{T_{max}}{T_g}---\left(4\right)$

2. run time fault detection

In the system operation phase, when system malfunctions, need mistake to be detected within the shortest time；Fault is final Cause system output error, the actual output of comparison system and desired output, it is judged that the most faulty generation of system；Fault detect Result with formula (5) represent

$R=O_{real}\&CirclePlus;O_{\exp }---\left(5\right)$

Wherein R represents the XOR of actual output and desired output, if it is desired to export consistent with actual output, then R is 0, Otherwise R is not zero, and by detecting the value of R, obtains whether detecting system makes mistakes；

3. static configuration storehouse is utilized to repair fault

Static configuration storehouse is mainly used to the repair time of acceleration disturbance；At system design stage, by FTA technology mining system Unite potential fault, and the compensation circuit of these faults is stored in static configuration storehouse；When system is run, if it occur that therefore Barrier, then with vector (I_n,O_real) for indexing the compensation circuit searching correspondence in static configuration storehouse；

If searching corresponding compensation circuit, then explanation there occurs known fault, directly searches correspondence from repository Compensate circuit, complete the reparation to the system failure；

Without finding the reparation circuit of correspondence, then explanation there occurs unknown failure, starts evolution algorithmic and develops benefit Repay circuit；

When the compensation circuit of evolution unknown failure, a kind of evolution algorithmic based on similarity is used to accelerate to develop Journey；First, Hamming distances is used to calculate the similarity compensating output of existing circuit, table in expected compensation output and repository Being shown as Dis (R, R '), wherein R is the output of expected compensation circuit, and R ' is the compensation output of existing circuit in repository；IfThen produce the initial population of evolution algorithmic with the circuit that compensates that R ' is corresponding, and develop and R； Otherwise, then develop according to the compensation circuit that R ' is correspondingThen compensating in output plus phase inverter；

The size in static configuration storehouse depends on system scale and hardware resource, and what the space in static configuration storehouse took the most greatly deposits Storage resource is the most, and the time of checking storehouse is incremented by；Repository repairs the relation that circuit and malfunction index are one-to-manies, repaiies for i.e. one The corresponding multiple malfunction indexs of compound circuit；

4. the mode reconfiguration system developing with compensating is utilized

Often repair a fault, corresponding compensation circuit is stored in repository, but the memory space of repository has Limit, it is impossible to store all of compensation circuit；When repository internal memory overflows, repository will be unable to store new compensation circuit, and And along with system is run for a long time, more unknown failure occurring, the effect of repository is gradually lowered, and finally affects system Fault-tolerant ability；In order to improve the reliability of system longtime running, when repository internal memory overflows, will use and repair skill based on compensating Art reconfiguration system；

When reconstructing goal systems, use based on the evolution mode compensating recovery technique；In evolutionary process if be detected that Retention effects then stops developing, it is assumed that current iteration number of times is G_sIf, G_s,≥G_max, then showing can not be in the iteration of regulation time Develop in number and goal systems；If G_s<G_max, then the correct system of part that startup reparation process having developed is repaiied Just, repairing process must be at G_max-G_sComplete in secondary iterations.

Beneficial effects of the present invention: (1) is time-consuming by using dynamic self-adapting CGP coded system can reduce evolution, carries Height is evolved into power；(2) with the System Fault Tolerance time as constraints, in conjunction with repository and compensation fault-tolerant mode, it is possible to increase be The fault-tolerance of system and real-time；(3) in FPGA platform, build virtual restructural framework, and realize on the frame a set of in real time Tolerant system, the design for tolerant system provides a kind of feasible reference model.

Accompanying drawing explanation

Fig. 1 is the overall structure block diagram of system.

Fig. 2 is CGP encoder matrix exemplary plot.

Fig. 3 is static configuration storehouse fundamental diagram.

Detailed description of the invention

Below in conjunction with accompanying drawing and technical scheme, further illustrate the detailed description of the invention of the present invention.

A kind of real-time fault tolerance design method based on Evolvable Hardware, step is as follows:

The cardinal principle of dynamic self-adapting CGP coded method and real-time fault tolerance mechanism is as follows:

(1) dynamic self-adapting CGP coded method

CGP be Evolvable Hardware field be the most commonly used coded system, its principle is as shown in Figure 2.Traditional CGP coding with Machine selects a stationary nodes not fix as final output node, dynamic self-adapting CGP coded method output node, uses one Planting dynamic random sampling model selects different node as output node from CGP encoder matrix, calculates CGP encoder matrix respectively Fitness value, and select the maximum matrix of fitness value as optimal solution.The sampled probability of node adapts to along with population entirety Degree situation of change dynamically adjusts, and the fitness distribution situation of current population can use below equation to calculate:

$f_d\left(t\right)=\frac{\stackrel{\&OverBar;}{f\left(t\right)}}{f_{max}\left(t\right)-f_{\min }\left(t\right)}---\left(1\right)$

Wherein, f_dT () represents the distribution of ideal adaptation degree or multiformity in population；Represent individual averagely fitting in population Answer angle value；f_maxT () represents maximum adaptation angle value individual in population；f_minT () is minimum fitness value.Along with iterations Increasing, the fitness difference between individuality is more and more less, and average fitness increases, f_dT the value of () also becomes larger.Sampled probability Being broadly divided into two parts, at the initial stage of evolution, population's fitness is relatively low, uses fixing higher sampled probability to add block convergence rate； When population average fitness or iterations reach predetermined threshold value, dynamically adjust sampling according to population average fitness value general Rate.In evolutionary process, the computing formula of sampled probability is:

$P_s=\left\{\begin{array}{c}{P}_{s0},t<t_0\\ P_{s0}{e}^{\frac{-\&part;(t-t_0)}{t_{\max }}}/f_d\left(t\right),t\&GreaterEqual;t_0\end{array}\right.---\left(2\right)$

Wherein, P_s0Being the initial samples probability set, the setting of initial samples probit needs to consider population scale And chromosome length.If initial samples probability is set to 1, the most now needs to travel through all of node and calculate fitness value；If Initial samples probability arranges too small, then become and randomly choose, and may affect iterations.Therefore, initial samples probability one As be not less than 0.5.t₀It is the critical iterations of sampled probability adjustment, t₀Value can not be too big, value crosses conference affects algorithm Acceleration effect, typically take 0.3t_max。It is self-defining parameter regulatory factor, is usually set to 2, t_maxBe evolution algorithmic Big iterations.In evolution early stage, population entirety fitness is relatively low, and sampled probability is relatively big, is conducive to accelerating evolution algorithmic convergence Speed；In the later stage of developing, population entirety is more excellent, and sampled probability diminishes, and reduces the adjustment to circuit structure and is conducive to excellent genes Accumulation, improve evolution algorithmic success rate.

(2) real-time fault tolerance based on Evolvable Hardware mechanism

Traditional fault tolerant system design method mainly considers system survivability, have ignored the real-time of tolerant system, And tolerant system is substantially a kind of real-time system, real-time is an important restrictions condition of tolerant system.Hard based on developing The real-time fault tolerance mechanism of part, with the System Fault Tolerance time as constraints, utilizes static configuration storehouse to accelerate repair process, it is possible to take into account The real-time of tolerant system and fault-tolerance.Whole real-time fault tolerance mechanism mainly includes the following aspects:

1. evolution algorithmic maximum iteration time is calculated

It is defined as tolerable for system fault time repairing the time limit, is defined as T_max。T_maxFault analysis tree can be passed through (Fault Tree Analysis, FTA) technical Analysis obtains.In order to ensure that system can repair system event in repairing the time limit Barrier, will repair the time limit constraints as evolution algorithmic in evolutionary process.The first-selected formula (3) that passes through can calculate evolution The time T that algorithm iteration once needs_g。

T_g=λ (T_cfg+T_fit)+T_ea (3)

Wherein, T_cfgIt is the setup time of evolution platform, T_fitIt is the Fitness analysis time, T_eaWhen being the execution of evolution algorithmic Between, λ is the quantity of the offspring individual produced in each iterative process.The iterations of maximum then can be obtained according to formula (4).

$G_{max}=\frac{T_{max}}{T_g}---\left(4\right)$

2. run time fault detection

In the system operation phase, when system malfunctions, it is desirable to be able to mistake detected within the shortest time.Fault Eventually result in system output error, it is only necessary to the actual output of comparison system and desired output just can detect whether faulty Occur.The result of fault detect can use formula (5) to represent.

$R=O_{real}\&CirclePlus;O_{\exp }---\left(5\right)$

Wherein R represents the XOR of actual output and desired output, if it is desired to export consistent with actual output, then R is 0, Whether otherwise R is not zero, just can be made mistakes with detecting system by the value of detection R.

3. static configuration storehouse is utilized to repair fault

Static configuration storehouse is mainly used to the repair time of acceleration disturbance.At system design stage, can be dug by FTA technology The fault that pick system is potential, and the compensation circuit of these faults is stored in static configuration storehouse.When system is run, if sent out Raw fault, then with vector (I_n,O_real) for indexing the compensation circuit searching correspondence in static configuration storehouse.

If searching corresponding compensation circuit, then explanation there occurs known fault, directly searches correspondence from repository Compensate circuit, complete the reparation to the system failure.

Without finding corresponding reparation circuit, then explanation there occurs unknown failure, needs to start evolution algorithmic and drills Change and compensate circuit.When the compensation circuit of evolution unknown failure, a kind of evolution algorithmic based on similarity is used to accelerate to develop Process.First, use Hamming distances to calculate the similarity compensating output of existing circuit in expected compensation output and repository, Being expressed as Dis (R, R '), wherein R is the output of expected compensation circuit, and R ' is the compensation output of existing circuit in repository.IfThen produce the initial population of evolution algorithmic with the circuit that compensates that R ' is corresponding, and develop and R； Otherwise, then develop according to the compensation circuit that R ' is correspondingThen compensating in output plus phase inverter.Based on similarity Evolution repair mechanism can make full use of the construction features having compensated circuit, accelerates the convergence rate of evolution algorithmic, and minimizing is drilled Change time-consuming, it is adaptable to real-time tolerant system.

The size in static configuration storehouse depends on system scale and hardware resource, and what the space in static configuration storehouse took the most greatly deposits Storage resource is the most, and the time of checking storehouse also can be incremented by simultaneously.Fig. 3 gives and repairs three bit parity check device electricity with static configuration storehouse The example of fault in road.Computing unit matrix (Function Element Array, FEA) in figure comprises four and calculates single Unit, each computing unit is made up of two MUX and a function module, and each power function module comprises eight letters Number function.The input data of computing unit are by cfg1 and cfg2 signal deciding, and the function of computing unit is by cfg3 signal deciding.False It is located at circuit f₀The fault of short circuit occurs, as input I_nDuring=(010), the actual output of system is O_real=0, it is desirable to output O_exp =1, R=1 can be obtained according to formula (5), then may determine that system malfunctions.At this moment vector (I is selected_n,O_real)= (010,0), as the index of checking storehouse, if can find the reparation circuit of coupling in storehouse, then illustrates that this fault is known event Barrier, directly with the configuration information reconstruct VRC in storehouse.In this example, VRC is re-equipped and is set to an XOR circuit, faulty circuit Just studied for a second time courses one has flunked, finally given correct output.Repository repairs the relation that circuit and malfunction index are one-to-manies, repaiies for i.e. one Compound circuit may corresponding multiple malfunction indexs.Such as fault vectors (011,1), (100,0) and (101,1) all correspond to same Repair circuit.

4. the mode reconfiguration system developing with compensating is utilized

Often repair a fault, all corresponding compensation circuit can be stored in repository, but the storage of repository is empty Between limited, it is impossible to store all of compensation circuit.When repository internal memory overflows, repository will be unable to store new compensation electricity Road, and along with system is run for a long time, it is possible that more unknown failure, the effect of repository is gradually lowered, System survivability can be affected eventually.In order to improve the reliability of system longtime running, when repository internal memory overflows, will use Based on compensating recovery technique reconfiguration system.

When reconfiguration system, it is considered to the retention effects impact on evolution algorithmic.Retention effects refers to that the fitness of population exists The evolution initial stage increases quickly, but when the fitness of population is close to desired value, fitness value is stagnated, and substantial amounts of iterations is all Spent in the lag phase, but the fitness value of population do not increased, it is clear that the correct system of the part of developing than The complete goal systems that develops is the most.When reconstructing goal systems, use based on the evolution mode compensating recovery technique. If be detected that retention effects then stops developing in evolutionary process, it is assumed that current iteration number of times is G_sIf, G_s,≥G_max, then table Bright can not evolution in the iterations of regulation goal systems, owing to retention effects is generally present in the evolution initial stage, this Situation typically will not occur.If G_s<G_max, then the correct system of part that startup reparation process having developed is modified, Reparation process must be at G_max-G_sComplete in secondary iterations.Smaller owing to repairing the scale of circuit, it is easier Arrive.

Claims (1)

1. a real-time fault tolerance design method based on Evolvable Hardware, it is characterised in that step is as follows:

(1) dynamic self-adapting CGP coded method

Traditional CGP coding randomly chooses a stationary nodes as final output node, and dynamic self-adapting CGP coded method is defeated Egress is not fixed, use a kind of dynamic random sampling model selects from CGP encoder matrix difference node as output node, Calculate the fitness value of CGP encoder matrix respectively, and select the matrix of fitness value maximum as optimal solution；The sampling of node is general Rate dynamically adjusts along with population entirety fitness situation of change, and the fitness distribution situation of current population uses below equation meter Calculate:

$f_d\left(t\right)=\frac{\stackrel{\&OverBar;}{f\left(t\right)}}{f_{max}\left(t\right)-f_{\min }\left(t\right)}---\left(1\right)$

Wherein, f_dT () represents the distribution of ideal adaptation degree or multiformity in population；Represent average fitness individual in population Value；f_maxT () represents maximum adaptation angle value individual in population；f_minT () represents minimum fitness value individual in population；Along with The increase of iterations, the fitness difference between individuality is more and more less, and average fitness value increases, f_dT the value of () is the most gradually Become big；

Sampled probability is divided into two parts, and at the initial stage of evolution, Population adaptation angle value is relatively low, uses fixing higher sampled probability to add block Convergence rate；When population average fitness value or iterations reach predetermined threshold value, move according to population average fitness value State adjusts sampled probability；In evolutionary process, the computing formula of sampled probability is:

$P_s=\left\{\begin{array}{cc}{P}_{s0},& t<t_0\\ P_{s0}{e}^{\frac{-\&part;\left(t-t_0\right)}{t_{\max }}}/f_d\left(t\right),& t\&GreaterEqual;t_0\end{array}\right.---\left(2\right)$

Wherein, P_s0Being the initial samples probability set, the set comprehensive of initial samples probability considers that population scale and chromosome are long Degree；If initial samples probability is set to 1, the most now travels through all of node, and calculate fitness value；If initial samples probability Arranging too small, then randomly choose, initial samples probability is not less than 0.5；t₀It is the critical iterations of sampled probability adjustment, t₀'s Value is 0.3t_max；It is self-defining parameter regulatory factor, is set as 2, t_maxIt it is the maximum iteration time of evolution algorithmic；

(2) real-time fault tolerance based on Evolvable Hardware mechanism

Tolerant system is substantially a kind of real-time system, and real-time is an important restrictions condition of tolerant system；Based on evolution The real-time fault tolerance mechanism of hardware, with the System Fault Tolerance time as constraints, utilizes static configuration storehouse to accelerate repair process, takes into account appearance The real-time of wrong system and fault-tolerance；Whole real-time fault tolerance mechanism mainly includes the following aspects:

1. evolution algorithmic maximum iteration time is calculated

It is defined as tolerable for system fault time repairing time limit T_max；T_maxObtained by fault analysis tree technology；In order to protect Card system is repair system fault in repairing the time limit, will repair the time limit constraints as evolution algorithmic in evolutionary process； The first-selected formula (3) that passes through calculates the time T that evolution algorithmic iteration once needs_g；

T_g=λ (T_cfg+T_fit)+T_ea (3)

Wherein, T_cfgIt is the setup time of evolution platform, T_fitIt is the Fitness analysis time, T_eaIt is the execution time of evolution algorithmic, λ It is the quantity of the offspring individual produced in each iterative process；The iterations of maximum is then obtained according to formula (4)；

$G_{max}=\frac{T_{max}}{T_g}---\left(4\right)$

2. run time fault detection

In the system operation phase, when system malfunctions, need mistake to be detected within the shortest time；Fault ultimately results in System output error, the actual output of comparison system and desired output, it is judged that the most faulty generation of system；The knot of fault detect Fruit formula (5) represents

$R=O_{real}\&CirclePlus;O_{\exp }---\left(5\right)$

Wherein R represents the XOR of actual output and desired output, if it is desired to export consistent with actual output, then R is 0, otherwise R It is not zero, by detecting the value of R, obtains whether detecting system makes mistakes；

3. static configuration storehouse is utilized to repair fault

Static configuration storehouse is mainly used to the repair time of acceleration disturbance；At system design stage, dived by FTA technology mining system Fault, and the compensation circuit of these faults is stored in static configuration storehouse；When system is run, if it occur that fault, Then with vector (I_n,O_real) for indexing the compensation circuit searching correspondence in static configuration storehouse；

If searching corresponding compensation circuit, then explanation there occurs known fault, directly searches the compensation of correspondence from repository Circuit, completes the reparation to the system failure；

Without finding corresponding reparation circuit, then explanation there occurs that unknown failure, startup evolution algorithmic develop and compensate electricity Road；

When the compensation circuit of evolution unknown failure, a kind of evolution algorithmic based on similarity is used to accelerate evolutionary process；First First, use Hamming distances to calculate the similarity compensating output of existing circuit in expected compensation output and repository, be expressed as Dis (R, R '), wherein R is the output of expected compensation circuit, and R ' is the compensation output of existing circuit in repository；IfThen produce the initial population of evolution algorithmic with the circuit that compensates that R ' is corresponding, and develop and R； Otherwise, then develop according to the compensation circuit that R ' is corresponding and R, then compensating in output plus phase inverter；

The size in static configuration storehouse depends on system scale and hardware resource, the storage money that the space in static configuration storehouse takies the most greatly Source is the most, and the time of checking storehouse is incremented by；Repository repairs the relation that circuit and malfunction index are one-to-manies, repairs electricity for i.e. one The corresponding multiple malfunction indexs in road；

4. the mode reconfiguration system developing with compensating is utilized

Often repair a fault, corresponding compensation circuit is stored in repository, but the limited storage space of repository, no All of compensation circuit can be stored；When repository internal memory overflows, repository will be unable to store new compensation circuit, and along with System is run for a long time, more unknown failure occurs, and the effect of repository is gradually lowered, and finally affects the fault-tolerant energy of system Power；In order to improve the reliability of system longtime running, when repository internal memory overflows, will use based on compensating recovery technique reconstruct System；

When reconstructing goal systems, use based on the evolution mode compensating recovery technique；If be detected that stagnate in evolutionary process Effect then stops developing, it is assumed that current iteration number of times is G_sIf, G_s,≥G_max, then showing can not be in the iterations of regulation Develop and goal systems；If G_s<G_max, then the correct system of part that startup reparation process having developed is modified, and repaiies Multiple process must be at G_max-G_sComplete in secondary iterations.