CN106026712A - Secondary-side control method and secondary-side control circuit of switching power supply - Google Patents

Secondary-side control method and secondary-side control circuit of switching power supply Download PDF

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Publication number
CN106026712A
CN106026712A CN201610564798.1A CN201610564798A CN106026712A CN 106026712 A CN106026712 A CN 106026712A CN 201610564798 A CN201610564798 A CN 201610564798A CN 106026712 A CN106026712 A CN 106026712A
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signal
voltage
circuit
control
output
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CN201610564798.1A
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CN106026712B (en
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於昌虎
唐盛斌
肖华
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Shenzhen Nanyun Microelectronic Co Ltd
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Shenzhen Nanyun Microelectronic Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/2176—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only comprising a passive stage to generate a rectified sinusoidal voltage and a controlled switching element in series between such stage and the output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33561—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having more than one ouput with independent control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0032—Control circuits allowing low power mode operation, e.g. in standby mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention provides a switching power supply, especially a secondary-side control method and a secondary-side control circuit of an isolated switching power supply. According to the method and the circuit, an error amplifier is installed at a secondary side, the output voltage of the power supply is sampled and an error signal is generated, and the error signal is modulated into an opening signal of different frequencies to realize PFM (Pulse Frequency Modulation). The opening signal is transmitted to a primary side to open a main power tube, different current limiting voltage is generated at the primary side according to the frequency of the opening signal, and the main power tube is closed at the current limiting voltage to realize PWM. Through the method and the circuit of the invention, the precision of output voltage and the load regulation rate are improved, good dynamic performance is achieved, synchronous rectification is easy to realize, and the no-load power consumption is reduced.

Description

The secondary side control methods of Switching Power Supply and circuit
Technical field
The present invention relates to loop control method and the circuit of Switching Power Supply, isolating switch power can be improved particularly to a kind of Output accuracy and load regulation, reduce underloading and no-load power consumption, accelerates dynamic response, it is simple to realize the switch of synchronous rectification The secondary side control methods of power supply and circuit.
Background technology
Primary side feedback formula Switching Power Supply is little with its volume, it is simple to control, low cost and other advantages is widely used in charger, power supply The fields such as adapter.But primary side feedback control mode is disadvantageous in that, the load regulation of electric power output voltage is bad, Dynamic response is poor.As it is shown in figure 1, be the typical architecture of primary side feedback control circuit.Control chip is by detection auxiliary winding The sequential of upper voltage waveform, it is achieved current constant control, carrys out fed power supplies by the auxiliary winding voltage of sampling demagnetization finish time defeated Go out voltage, it is achieved Isobarically Control.Along with the change of load, on auxiliary winding, the voltage change ratio of demagnetization finish time is different, The sampling precision of identical sample circuit will be different, thus affect load regulation.Control mode each cycle of primary side feedback Sampling an output voltage, make the adjustment of a power tube, its amplifying element is after sampling element, so dynamic response The best.
In prior art, for the shortcoming overcoming primary side feedback to control, the modes using secondary side feedback more.Pass through isolation coupling The information of secondary output voltage is fed back to former limit and makes control by device.It is continuous that traditional secondary side feedback utilizes TL431 to add optocoupler Feedback output information, but the continual work of optocoupler, power consumption is relatively big, and the life-span is shorter, be not suitable for the special environments such as high temperature Lower use.Also having feedback output information intermittently to feed back power consumption to reduce, such as, patent CN103051197 utilizes secondary The information of control chip sampling and outputting voltage, selects to send high-frequency signal still to former limit according to voltage and benchmark result of the comparison Low frequency signal, thus precision when improve underloading and zero load, accelerate dynamic response.But this patent substantially still falls within Primary-side-control, the secondary circuit of increase provides two kinds of feedback informations, only optimizes performance when underloading and zero load.Patent All realized constant current constant voltage control by secondary in CN104578826 then full-load range, however the secondary chip of this patent directly by Electric power output voltage is powered, and needs output voltage to set up chip startup point and could realize feedback, normally work, and general fills The application such as electrical equipment needs the stage set up at output voltage to possess the function of constant current, so the program is the most practical.Separately there is patent CN103460583 uses secondary PWM to control, and has preferable performance, however it is necessary that and be charged such that to accumulator in advance Power supply output is normal sets up, and sequential is complex.Patent US20100254443 then gives common digital power and controls Method, circuit is complicated, needs high-precision modulus and D/A converting circuit.
Summary of the invention
In order to overcome the deficiency of above-mentioned secondary side feedback control mode, the present invention provides a kind of directly secondary side control methods and circuit, Loop for Switching Power Supply controls.The method and circuit can improve precision and the load regulation of output voltage, reduce light Carry and no-load power consumption, there is good dynamic property, and be easy to the realization of synchronous rectification.
The present invention is attained in that by below scheme
A kind of secondary side control methods and circuit are realized by former limit supplementary control unit, isolation coupling device and secondary main control unit.Described Former limit supplementary control unit couples isolation coupling device, and described isolation coupling device couples secondary main control unit.Power supply rise the machine stage by Former limit supplementary control unit provides constant current mode to control, and the constant voltage mode after output voltage stabilization controls by secondary main control unit PFM controls to combine the PWM of main limit supplementary control unit and controls to provide.Wherein, former limit unit produces PWM according to opening signal frequency The current-limiting points controlled, opens signal frequency the highest, and current-limiting points is the highest, otherwise, frequency is the lowest, and current-limiting points is the lowest.Secondary master The PFM of control unit controls to determine that main power tube is open-minded with different frequencies, and the PWM of former limit supplementary control unit controls to determine main merit When rate pipe is turning off.Above, it is achieved while former secondary works in coordination with Isobarically Control, secondary is convenient according to the sequential opening signal Realize synchronous rectification, and realize sleep pattern according to the size of error signal；Whether former limit then receives according in the setting time Judge whether to enter sleep pattern to opening signal.
Preferably, described former limit supplementary control unit includes, high-voltage starting circuit, constant-current control circuit, pwm control circuit, patrols Collect and process circuit and drive circuit.Described high-voltage starting circuit inputs the voltage on the supplementary control unit externally fed electric capacity of former limit, produces Internal power source voltage, reference voltage and bias current needed for the supplementary control unit work of raw former limit；Described constant-current control circuit connects auxiliary Helping the partial pressure value of voltage on winding, detection auxiliary winding voltage waveform obtains the information of erasing time, during by controlling demagnetization Between and the proportions constant of switch periods realize current constant control, constant-current control circuit outputs a control signal to logic processing circuit； What described pwm control circuit reception secondary sent opens signal, and is adjusted to the burst pulse letter of a fixed width Number, pwm control circuit produces limit voltage, the electric current crossed in order to power limitation pipe flow always according to the frequency size opening signal Peak value, pwm control circuit output pipe control signal is to logic processing circuit；Described logic processing circuit receives from perseverance Flow control circuit and the signal of pwm control circuit, be responsible for playing machine stage selection constant-current control signal, open receiving secondary Select secondary control signal to realize Isobarically Control after messenger, and process the protection signals such as overvoltage, excess temperature, short circuit, output Power tube low voltage drive signal is to drive circuit；Described drive circuit receives the low voltage drive signal of logic processing circuit, passes through Level conversion produces the high-voltage driven signal with certain driving force, and this driving signal drives the break-make of external power pipe.Institute State logic processing circuit and open signal always according to whether receive within the stipulated time that secondary sends, it may be judged whether enter Sleep pattern；Do not receive and open signal and then enter sleep pattern, close the bias current outside master control loop；Otherwise, move back Go out sleep pattern, recover bias current.
Preferably, described secondary main control unit includes, Zero-cross comparator circuit, sync logic, synchronous drive circuit, opens Galvanic electricity road, isolated drive circuit, PFM control circuit, compensation circuit and EA (error amplifier).Described start-up circuit is by electricity Source output directly power supply, the internal electric source needed for LDO generation secondary main control unit, and needed for producing each modular circuit Biasing；The positive input of described error amplifier EA connects reference voltage V ref, and negative sense terminates the partial pressure value of electric power output voltage, The difference of power supply output with benchmark is amplified by EA, and output is to the input compensating circuit；Described compensation circuit is for possessing zero pole point Resistance-capacitance network, in order to compensate the stability of whole control loop, export PFM control through the error signal of overcompensation Circuit；Described PFM control circuit goes out the signal of opening of different frequency according to the size modulations of error voltage value, and error is believed Number the biggest, the frequency opening signal is the highest, and PFM control circuit output opens signal to isolated drive circuit, and will open letter Number export in sync logic as suitable time-delay；Described sync logic is latched after receiving time delayed signal, Receive the signal of Zero-cross comparator circuit output, described Zero-cross comparator electric circuit inspection synchronous rectifier drain terminal voltage simultaneously；Work as zero passage Comparison circuit detects that synchronous rectifier drain terminal voltage provides one less than 0V, the then time delayed signal that sync logic combination is latched Individual synchronous rectifier open signal, and the latch reset of time delayed signal will be latched；When Zero-cross comparator electric circuit inspection is to synchronizing Rectifier tube drain terminal voltage reaches to turn off threshold value, then sync logic provides the cut-off signals of a lock-in tube；Described synchronization is patrolled Collect the synchronous rectifier control signal of circuit, amplify driving force through synchronous drive circuit, control external sync rectifier tube Break-make；The signal of opening that PFM control circuit is exported by described isolated drive circuit is modulated to spike, is sent to isolate coupling Clutch part；The error signal that described PFM control circuit exports always according to error amplifier EA arranges sleep-awake pattern, when When error signal is less than sleep threshold, when i.e. loading the lightest, break the transmission of messenger, inclined when close outside master control loop Put electric current；When error signal is higher than threshold wake-up value, recovers to open the transmission of signal, recover bias current；Described sleep threshold Value is less than threshold wake-up value.
Preferably, described isolation coupling device can be electric capacity, the isolating device such as optocoupler or coupling transformer.Isolating coupler The spike of secondary is opened signal and is coupled to former limit by part, it is achieved the isolation feedback of loop.
Preferably, described secondary PFM control circuit includes, the first PMOS, the second PMOS, the 3rd PMOS Pipe, the first NMOS tube, the second NMOS tube, the first current source, the first electric capacity, the first switch, comparator, first anti- Phase device, the second phase inverter, the 3rd phase inverter, the 4th phase inverter, the 5th phase inverter, d type flip flop and chronotron.Described One, the source of second, third PMOS connects internal power source voltage, and the grid of a PMOS terminate the first bias voltage, leakage Terminate the drain terminal of described first NMOS tube；The grid end of grid termination the 3rd PMOS of described second PMOS, and receive The drain terminal of self, forms diode and connects；The drain terminal of described 3rd PMOS connects the top crown of the first electric capacity；Described first The grid of NMOS tube terminate the first reference voltage, and source connects the upper end of the first current source；The drain terminal of described second NMOS tube connects The drain terminal of the second PMOS, the error voltage of grid termination EA output, source connects the upper end of the first current source；Described first The lower end ground connection of current source；The bottom crown ground connection of described first electric capacity, top crown be also coupled to comparator negative input and The upper end of the first switch；The positive input of described comparator connects the second reference voltage, the input of output termination the first phase inverter End；The input of output termination second phase inverter of described first phase inverter；The output termination D of described second phase inverter triggers The triggering end of device；The input termination internal power source voltage of described d type flip flop, the input of output termination the 3rd phase inverter；Institute State input and the input of chronotron of output termination the 4th phase inverter of the 3rd phase inverter；Described 4th phase inverter output is opened Strobe signal；The reset terminal of the output termination d type flip flop of described chronotron and the input of the 5th phase inverter；Described The control end of output termination first switch of five phase inverters；The lower end ground connection of described first switch.
Preferably, in the pwm control circuit of described former limit limit voltage produce circuit include, hex inverter, the second current source, Second switch, the second electric capacity, the 3rd switch, narrow-pulse generator, the 7th phase inverter, first with door, the 4th switch, the One buffer, the 4th PMOS, the 5th PMOS, the 6th PMOS, the 3rd NMOS tube, the 4th NMOS Pipe, the 3rd current source, resistance.What the input termination isolating coupler part of described hex inverter sent opens signal, The control end of output termination second switch；The lower end of upper termination second current source of described second switch, lower termination the second electric capacity Top crown；The bottom crown ground connection of described second electric capacity；The top crown and the 4th of upper termination second electric capacity of described 3rd switch The left end of switch, the lower end ground connection of the 3rd switch；The outfan of the input termination hex inverter of described narrow-pulse generator, The input of output termination the 7th phase inverter and the control end of the 4th switch；Described 7th phase inverter output termination first with One input of door；Described first opens signal with another input termination of door, the control end of output termination the 3rd switch； The right-hand member of described 3rd switch connects the positive input of the first buffer；The negative input of described first buffer connects self Outfan, and receive the grid end of the 3rd NMOS tube；The drain terminal of described 3rd NMOS tube connects the drain terminal of the 4th PMOS, Source connects the upper end of the 3rd current source；The source of described 4th PMOS connects internal power source voltage, and grid terminate the second biased electrical Pressure；The lower end ground connection of described 3rd current source, upper end is also coupled to the source of the 4th NMOS tube；Described 4th NMOS tube Grid termination the 3rd reference voltage, drain terminal connects the drain terminal of the 5th PMOS；The source of described 5th PMOS connects internal electric source Voltage, the drain terminal of grid termination self and the grid end of the 6th PMOS；The source of described 6th PMOS connects internal electric source electricity Pressure, the upper end of drain terminal connecting resistance；The lower end ground connection of described resistance, upper terminal voltage is limit voltage.
Preferably, in the pwm control circuit of described former limit, the another kind of structure of limit voltage generation circuit includes, the 8th phase inverter, Second with door, high frequency generator, M position subtraction count device, M figure place weighted-voltage D/A converter, the second buffer.Described 8th anti-phase The input termination burst pulse of device opens signal, output termination second and an input of door；Described second with another of door The outfan of input termination high frequency generator, the input of output termination M position subtraction count device；Described M position subtraction count device Output termination M figure place weighted-voltage D/A converter input；The forward of output termination second buffer of described M figure place weighted-voltage D/A converter Input；The outfan of the negative sense output termination of described second buffer self, the voltage of outfan is limit voltage.
The invention provides secondary side control methods and the circuit of a kind of Switching Power Supply, especially isolating switch power.The method and Error amplifier is put into secondary by circuit, and sampling electric power output voltage produces error signal, and is different by error signals modulate Frequency open signal, it is achieved PFM；This opens signal, and to be sent to former limit open-minded by main power tube, and on former limit according to opening The frequency of messenger produces different limit voltage, is turned off by main power tube with this limit voltage, it is achieved PWM.The present invention's Method and circuit can improve precision and the load regulation of output voltage, have good dynamic property, and are easy to synchronize The realization of rectification and reduction no-load power consumption.
Beneficial effects of the present invention is specific as follows:
1, using secondary PFM master control, former limit PWM auxiliary control realizes constant voltage closed loop control, main power tube open frequency with negative Carry consecutive variations, thus improve precision and the load regulation of output voltage, accelerate dynamic response；
2, the signal of opening in Isobarically Control stage produces at secondary, after this opens signal suitable time-delay, synchronization once detected Rectifier tube drain terminal voltage be less than 0V, will lock-in tube open-minded, it is not necessary to high-precision synchronous rectifier opens comparator；
3, secondary error signal is with load consecutive variations, then can arrange sleep-awake pattern, error according to the size of error signal Break messenger transmission when signal is less than sleep threshold, higher than recovering to open signal transmission during threshold wake-up value, thus reduce light Power consumption when carrying and be unloaded.
Accompanying drawing explanation
Fig. 1 is the anti exciting converter circuit theory diagrams that typical primary side feedback controls；
Fig. 2 is the circuit theory diagrams that secondary main control unit of the present invention and former limit supplementary control unit are applied to anti exciting converter；
Fig. 3 be the embodiment of the present invention one secondary main control unit in the schematic diagram of PFM control circuit；
Fig. 4 be the embodiment of the present invention one former limit pwm control circuit in limit voltage produce circuit schematic diagram；
Fig. 5 be the embodiment of the present invention two former limit pwm control circuit in limit voltage produce circuit schematic diagram；
Fig. 6 is that the present invention former secondary unit carries out the oscillogram of key signal during Isobarically Control；
Fig. 7 is the workflow diagram of the present invention former secondary unit.
Detailed description of the invention
As in figure 2 it is shown, Switching Power Supply of the present invention secondary control circuit, by former limit supplementary control unit 231, isolation coupling device 232 and secondary main control unit 233 realize, be coupled against each other between three.Described former limit supplementary control unit 231, including current constant control Circuit 211, high-voltage starting circuit 212, pwm control circuit 213, by drive circuit 214 and logic processing circuit 215 The driving output circuit of composition.Described constant-current control circuit passes through pin FB, and detection auxiliary winding 210 is through resistance 208 He The partial pressure value of resistance 209, it is judged that the erasing time of power-supply system, and judged by the size of FB foot detection reflected voltage Whether output overvoltage and short circuit occur, and constant-current control circuit is by maintaining the proportions constant of erasing time and switch periods, it is achieved Current constant control, constant-current control signal exports in logic processing circuit 215；In a machine stage of power-supply system, described logic Processing circuit and select constant-current control signal, export in drive circuit 214, open main power tube 216, transformator starts excitation Storage energy；Arranging main power tube and flow through the maximum of electric current, reach to be turned off by main power tube during maximum, transformation enters and disappears In the magnetic stage, energy sends load capacitance and load resistance to.
Along with the carrying out of supplementary control unit current constant control, electric power output voltage constantly rises, when supply voltage reaches secondary master control list The startup point of unit, main control unit is started working.Described secondary main control unit, including Zero-cross comparator circuit 221, by synchronous logic Circuit 222 and the synchronization control circuit of synchronous drive circuit 223 composition, start-up circuit 224, isolated drive circuit 225, PFM Control circuit 226, compensation circuit 227 and EA (error amplifier) 228.Described start-up circuit receives electricity by pin VCC Source output voltage, when voltage exceedes low-tension supply, bias voltage and the bias current when starting point needed for generation inside of setting； The positive input of described EA connects reference voltage V ref, and negative input is by the dividing potential drop of pin VB sampling electric power output voltage Value, the error signal between output sampled voltage and benchmark is to compensating circuit；Described compensation circuit is formed zero pole by resistance capacitance Spot net, carries out phase compensation to error signal, improves the stability of whole loop；Described PFM control circuit receives and compensates Error signal afterwards, is modulated to the signal of opening of respective frequencies, and the magnitude of voltage of error signal is the highest, and frequency is the biggest； Open signal and be modulated to spike by described isolated drive circuit, be sent to isolation coupling device 232 by pin GS Input；Meanwhile, opening signal and be sent to sync logic through suitable time delay, the purpose of time delay is to ensure that synchronization is whole Flow tube is the most open-minded after main limit power tube turns on, and the signal of opening after time delay latches in sync logic；Institute State the Zero-cross comparator circuit voltage waveform by VD pin detection synchronous rectifier drain terminal, when this voltage is less than 0V, in conjunction with Latch get up open time delayed signal, what sync logic provided synchronous rectifier opens signal, simultaneously by above-mentioned latch The latch reset of function；At the end of demagnetization is fast, Zero-cross comparator electric circuit inspection to VD voltage exceedes threshold value (such as-5mV), with Step logic circuit provides the cut-off signals of synchronous rectifier；The driving signal of synchronous rectifier is put through synchronous drive circuit 223 After big driving force, pin SYN export, in order to drive the break-make of synchronous rectifier 218.In order to reduce underloading and zero load Time system power dissipation, it is also possible in PFM control circuit 226, sleep threshold V is setLWith wake up V upH, when error signal Magnitude of voltage is less than VLTime break the transmission of messenger, enter sleep pattern, and by the electricity outside master control loop in control unit The bias current on road is closed；When the magnitude of voltage of error signal is higher than VHShi Huifu opens transmission and the bias current of signal, leaves Sleep pattern.
Described isolation coupling device 232 can be electric capacity, optocoupler or coupling transformer, is responsible for secondary main control unit 233 The spike sent opens the pulse-couple pin GP to former limit supplementary control unit 231.
By pin GP, pwm control circuit 213 in described supplementary control unit detects that spike opens pulse, be modulated to The burst pulse of fixed width opens signal, and this opens signal and exports in logic processing circuit；Described logic processing circuit receives Open signal to this, former limit current constant control is switched to secondary Isobarically Control, opens main power tube；Described pwm control circuit Simultaneously by the limit voltage that the frequency demodulation opening signal is correspondence, frequency is the highest, and corresponding limit voltage is the highest.Concrete Demodulation method, can use fixed current to charge to fixed capacity within the cycle opening signal, and by the point of electric capacity The reverse voltage of peak voltage samples out, and so, the frequency opening signal is the highest, and the peak voltage on electric capacity is the least, corresponding Reverse voltage the highest.Pwm control circuit is also by pin CS, and the electric current that main limit winding 205 of sampling flows through is in sampling The voltage produced on resistance 217, when this sampled voltage reaches above-mentioned limit voltage, output pipe cut-off signals is to logic Process circuit, then by drive circuit, main power tube is turned off.Said process is the constant voltage closed loop control of whole loop.This Outward, fixed clock is set in the logic processing circuit 215 of former limit supplementary control unit, if pwm control circuit within certain time Be not detected by secondary opens signal, then it is assumed that enter sleep pattern, is closed by the bias current of the circuit outside master control loop, Once detect and open signal, then leave sleep pattern, the bias current of restoring circuit.
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with accompanying drawing 3, accompanying drawing 4, accompanying drawing 5, accompanying drawing 6, the important step in the present invention is further described by accompanying drawing 7.Should be appreciated that described herein specifically Embodiment only in order to explain the present invention, is not intended to limit the present invention.
Embodiment one
PFM control circuit in secondary main control unit is responsible for opening the frequency modulation(PFM) of signal, as it is shown on figure 3, a kind of PFM control Circuit processed includes, PMOS 301, PMOS 302, PMOS 306, NMOS tube 303, NMOS tube 304, Current source 305, electric capacity 307, switch 308, comparator 309, phase inverter 310, phase inverter 311, d type flip flop 312, Phase inverter 313, phase inverter 314, phase inverter 315, chronotron 316.The source of described PMOS 301,302,306 Receiving internal power source voltage, the grid termination bias voltage Vbias1 of 301, drain terminal connects the drain terminal of NMOS tube 303；302 Drain terminal connects the drain terminal of self and the grid end of 306；The top crown of the leakage termination capacitor 307 of 306；Described NMOS tube 303 Grid termination reference voltage V ref1, source connects upper end and the source of NMOS tube 304 of current source 305；Described current source 305 Lower end ground connection；The drain terminal of described NMOS tube 304 connects the drain terminal of 302, the error signal of grid termination error amplifier output Vea；The top crown of described electric capacity 307 also connects negative input and the upper end of switch 308 of comparator 309, and its bottom crown connects Ground；The positive input of described comparator 309 connects reference voltage V ref2, the input of output termination phase inverter 310；Described Phase inverter 310 output termination phase inverter 311 input；The output termination d type flip flop 312 of described phase inverter 311 Triggering end；The input termination internal power source voltage of described d type flip flop 312, the input of output termination phase inverter 313； The input of the 314 of the output termination phase inverter of described phase inverter 313 and the input of chronotron 316；Described phase inverter 314 What output modulated opens signal Ton；The input of the output termination phase inverter 315 of described chronotron 316 and d type flip flop The reset terminal of 312；The control end of the output termination switch 308 of described anti-phase 315；The lower end ground connection of switch 308.
Assume that the electric current that current source 305 flows through is I305, the mutual conductance of 304 is gm304, PMOS 302 and PMOS 306 The current mirror ratio of composition is 1:m, and the drain terminal electric current of 306 is I306, then have:
I 306 = m * I 304 = m * ( I 305 2 + V e a - V r e f 1 2 * g m 304 )
The capacitance assuming electric capacity 307 is C307, work as I306When charging voltage on 307 exceedes benchmark Vref2, comparator D type flip flop 312 is triggered by 309 output low levels, and Q end output high level, the low level of phase inverter 313 output is through time delay D type flip flop is resetted by the time delay of device 316, will switch 308 open-minded through phase inverter 315, the electricity in power down of releasing appearance 307 Lotus, then phase inverter 314 exports the width burst pulse equal to chronotron 316 delay time as opening signal.This is open-minded The frequency of signal is by electric current I306With capacitance C307Determine:
f = I 306 C 307 * V r e f 2 = I 305 + ( V e a - V r e f 1 ) * g m 304 2 * C 307 * V r e f 2 * m
The visible frequency opening signal is directly proportional to error signal Vea, and error signal is the biggest, and frequency is the highest, otherwise, frequency The least.This opens signal Ton and is modulated to spike by isolated drive circuit, feeds back to former limit auxiliary control list by isolating device Unit.
Former limit pwm control circuit detection spike opens signal, and as shown in Figure 4, spike is opened signal by pwm control circuit The burst pulse being modulated to one fixed width opens signal Tonp.Limit voltage in described pwm control circuit produces circuit and includes, Phase inverter 401, current source 402, switch 403, electric capacity 404, switch 405, narrow-pulse generator 406, phase inverter 407, With door 408, switch 409, buffer 410, NMOS tube 411, PMOS 412, PMOS 413, NMOS tube 414, current source 415, PMOS 416, resistance 417.Described phase inverter 401 inputs burst pulse and opens signal Tonp, The control end of output termination switch 403 and the input of narrow-pulse generator 406；The lower termination capacitor 404 of described switch 403 Top crown, the lower end of upper termination current source 402；The upper termination internal power source voltage of described current source 402；Described electric capacity The bottom crown ground connection of 404, top crown also connects upper end and the left end of switch 409 of switch 405；Described narrow-pulse generator 406 Output termination switch 409 control end and the input of phase inverter 407；The output termination of described anti-phase 407 and door 408 An input；Described another input termination burst pulse with door opens signal Tonp, the control of output termination switch 405 End；The lower end ground connection of described switch 405；The right-hand member of described switch 409 connects the positive input of buffer 410；Described slow The negative input rushing device 410 connects the outfan of self and the grid end of NMOS tube 411；The drain terminal of described NMOS tube 411 Connecing the drain terminal of PMOS 412, source connects the upper end of current source 415；The upper end of described current source 415 also connects NMOS tube The source of 414, lower end ground connection；The grid termination bias voltage Vbias2 of described PMOS 412, source connects internal electric source electricity Pressure；Grid termination reference voltage V ref3 of described NMOS tube 414, drain terminal connects the drain terminal of PMOS 413；Described PMOS The drain terminal of pipe 413 connects the grid end of self and the grid end of PMOS 416, and source connects internal power source voltage；Described PMOS The source of 416 connects internal power source voltage, the upper end of drain terminal connecting resistance 417, produces limit voltage Vcs, the lower end of resistance 417 Ground connection.
Being burst pulse owing to opening signal Tonp, the high level lasting time of its inversion signal approximates the cycle of Tonp, its Inversion signal is continuously stage general's switch 403 conducting of high level, current source 402 charge to electric capacity 404, it is assumed that Tonp Frequency be f, the electric current of 402 is I402, the capacitance of 404 is C404, then the crest voltage on electric capacity 404 is:
V 404 = I 402 f * C 404
Described narrow-pulse generator 406 the trailing edge of the inversion signal of Tonp signal produce one little narrower than Tonp width Pulse, this burst pulse is in order to input the forward that the crest voltage on electric capacity 404 samples buffer 410 by switch 409 End, and keeps a cycle, and the voltage of positive input is exported the grid end of NMOS tube 411 by 410.Described phase inverter 407 output switchs 409 control the inversion signal of end and Tonp signal phase with, control switch 405 conducting, by this working cycle Within electric capacity 404 on charge discharging resisting fall, prepare the charging in next cycle.The voltage of buffer 410 output is with Tonp's Frequency inversely, does not meets design original intention, by trsanscondutance amplifier by 410 output voltage anti-phase.
Assume to the mutual conductance of pipe NMOS tube 411 and NMOS tube 414 to be gm411, the electric current of current source 415 is I415, electricity The resistance of resistance 417 is R417, PMOS 416 is 1:n with the current mirror ratio of PMOS 413 composition, on resistance 417 The pressure drop produced is limit voltage:
V c s = I 415 - ( I 402 f * C 404 - V r e f 3 ) * g m 411 2 * n * R 417
So, just become positive correlation with the frequency of Tonp through anti-phase sampled voltage, and the frequency of Tonp is secondary modulation The frequency opening signal Ton.By above-mentioned operation principle, it is seen that in secondary main control unit, error signals modulate is corresponding opening Messenger frequency is real-time, and one cycle of evening is then wanted in the demodulation of former limit supplementary control unit limit voltage.It is to say, it is whole The PFM regulation of loop regulates a fast cycle than PWM, is so beneficial to stablizing of loop.
Embodiment two
In embodiment one, the limit voltage generation circuit of pwm control circuit can also realize by another mode, such as Fig. 5 Shown in, another kind of limit voltage produces circuit and includes, phase inverter 501 and door 503, high frequency generator 502, M position subtraction Enumerator 504, M figure place weighted-voltage D/A converter 505, buffer 506.Described phase inverter 501 input receives burst pulse and opens letter Number Tonp, an input of output termination and door 503；Described another input termination high frequency generator 502 with door 503 Outfan, the input of output termination M position subtraction count device；The output termination M of described M position subtraction count device 504 The input of figure place weighted-voltage D/A converter 505；The positive input of the output termination buffer 506 of described M figure place mould converter； The negative input of described buffer 506 connects the outfan of self, provides the limit voltage V of generationcs。
The frequency assuming Tonp is f, and the frequency of the high frequency clock signal that high frequency generator produces is f1, then a Tonp cycle Within, it is k=f1/f with the high frequency clock number of door 503 output.The quantization step assuming M figure place weighted-voltage D/A converter is Δ V, k < M, The limit voltage then produced is:
V c s = &Delta; V * ( M - k ) = &Delta; V * ( M - f l f )
And according to the explanation in embodiment one, frequency f of Tonp is proportional with error signal Vea, so the limit produced Stream voltage VcsThe most proportional with Vea.
To sum up, Fig. 6 give Switching Power Supply of the present invention secondary control circuit allusion quotation of key signal under Isobarically Control pattern Type oscillogram.Opening spike Ton with what error signal Vea of load change modulated respective frequencies, former limit unit receives To Ton, main power tube is open-minded, and produce limit voltage V according to the frequency of Toncs, this limit voltage limits main power tube stream The peak current crossed, turns off main power tube when peak current triggers current-limiting points.In figure, DRV represents main power tube grid end control Signal processed.In visible secondary main control unit, error signal Vea is modulated to the signal Ton that opens of correspondence is real-time, and former limit Supplementary control unit limit voltage VcsDemodulation then want evening one cycle.It is to say, PWM is compared in the PFM regulation of whole loop Regulate a fast cycle, be so beneficial to stablizing of loop.
Fig. 7 gives the flow process of whole power-supply system loop work: former limit supplementary control unit carries out current constant control, until power supply is defeated Going out Voltage Establishment, secondary main control unit is started working；The error signal that error amplifier is exported by secondary main control unit carries out PFM Modulation, produce different frequency opens signal；Opening signal isolation coupling to former limit, former frontier inspection measures opens signal, will be main What the control signal of power tube switched to secondary opens signal, and main power tube is open-minded；It is right to produce according to the frequency opening signal The limit voltage answered, turns off main power tube when triggering limit voltage, it is achieved PWM controls.Additionally, secondary main control unit root On/off according to the sequencing contro synchronous rectifier of the sequential and synchronous rectifier drain terminal voltage opening signal；PFM controls electricity Road judges whether to enter sleep pattern according to error voltage size；Whether former limit supplementary control unit received according to the setting time Open signal to judge whether to enter sleep pattern.
Embodiments of the present invention are not limited to this, according to foregoing, according to ordinary technical knowledge and the customary means of this area, Without departing under the present invention above-mentioned basic fundamental thought premise, the secondary side control methods of the present invention and circuit also have other enforcement Mode；Therefore the present invention can also make the amendment of other various ways, replace or change, and all falls within rights protection of the present invention Within the scope of.

Claims (19)

1. a secondary side control methods for Switching Power Supply, real by former limit supplementary control unit, isolation coupling device and secondary main control unit Existing, the method comprises the steps,
Power supply plays the machine stage, former limit supplementary control unit provide constant current mode to control, determine the on/off of main power tube；Output After voltage stabilization, Switching Power Supply carries out constant voltage mode control, determines the on/off of main power tube；Constant voltage mode, be by The PFM of secondary main control unit controls to combine the PWM of main limit supplementary control unit and controls to be provided.
Secondary side control methods the most according to claim 1, it is characterised in that: secondary main control unit is according to PFM control The sequential of what module was modulated open time delayed signal combines the sequential of synchronous rectifier drain terminal voltage, controls opening of synchronous rectifier Logical/to turn off.
Secondary side control methods the most according to claim 1, it is characterised in that: secondary main control unit is according to error amplifier The error signal of output arranges sleep pattern；Whether receive secondary within the former limit supplementary control unit time according to the rules opens letter Number sleep pattern is set.
4. a secondary side control methods for Switching Power Supply, specifically includes following steps,
Secondary detecting step, the output voltage of sampling switch power supply, produce secondary error signal, and export；
Secondary PFM rate-determining steps, receives secondary error signal, is modulated to the signal of opening of respective frequencies, and exports；
Isolation coupling step, receives and opens signal, transmit it to former limit；
Former limit PWM rate-determining steps, what reception isolation coupling came opens signal, is demodulated into the limit voltage of correspondence, and Output；
Drive output step, according to whether receiving the judged result opening signal, carry out current constant control and Isobarically Control Switching, and export, control the on/off of main power tube；
Separately have, secondary Synchronization Control step, receive and open signal, and according to opening the sequential of signal to control synchronous rectifier On/off.
Secondary side control methods the most according to claim 4, it is characterised in that: described PFM rate-determining steps open letter Number for spike, the voltage swing of the frequency and secondary error signal of opening signal is directly proportional.
Secondary side control methods the most according to claim 4, it is characterised in that: the described constant voltage control driving output step System, the signal of opening come according to secondary isolation coupling controls the open-minded of main power tube；And according to opening signal in PWM control Limit voltage produced by step controls the shutoff of main power tube.
7. the secondary control circuit of a Switching Power Supply, it is adaptable to the main power tube on former limit and the control of the synchronous rectifier of secondary System, it is characterised in that: include former limit supplementary control unit, isolation coupling device and secondary main control unit,
Secondary main control unit, including
Secondary testing circuit, the output voltage of sampling switch power supply, produce secondary error signal, and export；
PFM control circuit, receives secondary error signal, is modulated to the signal of opening of respective frequencies, and exports；
Synchronization control circuit, receives and opens signal, and according to opening the sequential of signal to carry out opening/closing of synchronous rectifier Disconnected control；
Isolation coupling device, receives and opens signal, transmit it to former limit supplementary control unit；
Former limit supplementary control unit, including
Constant-current control circuit, produces constant-current control signal；
Pwm control circuit, what reception isolation coupling device came opens signal, is modulated to the limit voltage of correspondence, And export；
Drive output circuit, according to whether receiving the judged result opening signal, carry out current constant control and Isobarically Control Switching, and export, control the on/off of main power tube.
Secondary control circuit the most according to claim 7, it is characterised in that: described PFM control circuit open letter Number for spike.
Secondary control circuit the most according to claim 7, it is characterised in that: described PFM control circuit open letter Number frequency be directly proportional to the voltage swing of secondary error signal.
Secondary control circuit the most according to claim 7, it is characterised in that: the constant voltage mould of described driving output circuit Formula controls, and the signal of opening of the secondary being transmitted back to according to isolation coupling device opens control to carry out main power tube；And according to Open signal to control to the shutoff carrying out main power tube at limit voltage produced by pwm control circuit.
11. secondary control circuits according to claim 7, it is characterised in that: described PFM circuit open signal The generation of modulation and secondary error signal be real-time synchronization；Former limit supplementary control unit receives and opens signal to carry out main power tube Turn off and control than opening modulation late cycle of signal.
12. secondary control circuits according to claim 7, it is characterised in that: described PFM control circuit, according to The voltage swing of secondary error signal carries out the into/out control of sleep pattern, and sleep pattern refers to outside master control loop Circuit bias current close.
13. secondary control circuits according to claim 7, it is characterised in that: described driving output circuit, according to setting Whether detect in fixing time the judged result opening signal to carry out the into/out control of sleep pattern, sleep pattern refers to The bias current of the circuit outside master control loop is closed.
14. secondary control circuits according to claim 7, it is characterised in that: described former limit supplementary control unit includes, high Pressure start-up circuit, constant-current control circuit, pwm control circuit, logic processing circuit and drive circuit, described high voltage startup electricity Road inputs the voltage on former limit supplementary control unit externally fed electric capacity, produce the internal power source voltage needed for the supplementary control unit work of former limit, Reference voltage and bias current；Described constant-current control circuit connects the partial pressure value of voltage on auxiliary winding, detects auxiliary winding voltage Waveform obtains the information of erasing time, realizes current constant control by the proportions constant controlling erasing time and switch periods, Constant-current control circuit outputs a control signal to logic processing circuit；It is open-minded that described pwm control circuit reception secondary sends Signal, and it is adjusted to the narrow pulse signal of a fixed width, pwm control circuit is big always according to the frequency opening signal Little generation limit voltage, the current peak crossed in order to power limitation pipe flow, pwm control circuit output pipe control signal arrives Logic processing circuit；Described logic processing circuit receives from constant-current control circuit and the signal of pwm control circuit, is responsible for Play machine stage selection constant-current control signal, select secondary control signal to realize Isobarically Control after secondary opens signal receiving, And processing the protection signals such as overvoltage, excess temperature, short circuit, output pipe low voltage drive signal is to drive circuit；Described driving electricity Road receives the low voltage drive signal of logic processing circuit, produces the high drive letter with certain driving force through level conversion Number, this driving signal drives the break-make of external power pipe；Whether described logic processing circuit receives always according within the setting time Signal is opened, it may be judged whether enter sleep pattern to what secondary sent；Do not receive and open signal and then enter sleep pattern, Close the bias current outside master control loop；Otherwise, exit sleep pattern, recover bias current.
15. secondary control circuits according to claim 7, it is characterised in that: described secondary main control unit includes, mistake Zero balancing circuit, sync logic, synchronous drive circuit, start-up circuit, isolated drive circuit, PFM control circuit, Compensating circuit and error amplifier, described start-up circuit, by power supply output directly power supply, produces secondary main control unit through LDO Required internal electric source, and produce the biasing needed for each modular circuit；The positive input of described error amplifier EA connects benchmark Voltage Vref, the partial pressure value of negative sense termination electric power output voltage, the difference of power supply output with benchmark is amplified by EA, and output is to mending Repay the input of circuit；Described compensation circuit is the resistance-capacitance network possessing zero pole point, in order to compensate whole control loop Stability, exports PFM control circuit through the error signal of overcompensation；Described PFM control circuit is according to error signal electricity The size modulations of pressure value goes out the signal of opening of different frequency, and error signal is the biggest, and the frequency opening signal is the highest, and PFM controls Circuit output opens signal to isolated drive circuit, and will open signal and export in sync logic as suitable time-delay；Institute State after sync logic receives time delayed signal and latched, receive the signal of Zero-cross comparator circuit output simultaneously, described Zero-cross comparator electric circuit inspection synchronous rectifier drain terminal voltage；When Zero-cross comparator electric circuit inspection to synchronous rectifier drain terminal voltage is less than 0 V, then sync logic combines the time delayed signal latched and provides the signal of opening of a synchronous rectifier, and will latch time delay letter Number latch reset；When Zero-cross comparator electric circuit inspection to synchronous rectifier drain terminal voltage reaches to turn off threshold value, then synchronous logic Circuit provides the cut-off signals of a lock-in tube；The synchronous rectifier control signal of described sync logic, drives through synchronization Driving force is amplified on galvanic electricity road, controls the break-make of external sync rectifier tube；Described isolated drive circuit is defeated by PFM control circuit The signal of opening gone out is modulated to spike, is sent to isolation coupling device；Described PFM control circuit is amplified always according to error The error signal of device EA output arranges sleep-awake pattern, when error signal is less than sleep threshold, when i.e. loading the lightest, Break the transmission of messenger, close the bias current outside master control loop；When error signal is higher than threshold wake-up value, recover Open the transmission of signal, recover all bias currents；Described sleep threshold is less than threshold wake-up value.
16. secondary control circuits according to claim 7, it is characterised in that: described isolation coupling device be electric capacity, Optocoupler or coupling transformer, the signal of opening of the spike form of secondary is coupled to former limit by isolation coupling device, it is achieved ring The isolation feedback on road.
17. secondary control circuits according to claim 15, it is characterised in that: the PFM control of described secondary main control unit Circuit processed, including the first PMOS, the second PMOS, the 3rd PMOS, the first NMOS tube, the 2nd NMOS Pipe, the first current source, the first electric capacity, the first switch, comparator, the first phase inverter, the second phase inverter, the 3rd phase inverter, 4th phase inverter, the 5th phase inverter, d type flip flop and chronotron, the source of described first, second, third PMOS connects Internal power source voltage, the grid of a PMOS terminate the first bias voltage, and drain terminal connects the drain terminal of described first NMOS tube；Institute State the grid end of grid termination the 3rd PMOS of the second PMOS, and receive self drain terminal, form diode and connect；Institute The drain terminal stating the 3rd PMOS connects the top crown of the first electric capacity；The grid of described first NMOS tube terminate the first reference voltage, Source connects the upper end of the first current source；The drain terminal of described second NMOS tube meets the drain terminal of the second PMOS, grid termination EA The error voltage of output, source connects the upper end of the first current source；The lower end ground connection of described first current source；Described first electric capacity Bottom crown ground connection, top crown is also coupled to the negative input of comparator and the upper end of the first switch；Described comparator is just To input termination the second reference voltage, the input of output termination the first phase inverter；The output termination the of described first phase inverter The input of two phase inverters；The triggering end of the output termination d type flip flop of described second phase inverter；The input of described d type flip flop Termination internal power source voltage, the input of output termination the 3rd phase inverter；The output termination the 4th of described 3rd phase inverter is anti-phase The input of device and the input of chronotron；Pulse signal is opened in described 4th phase inverter output；The outfan of described chronotron Connect reset terminal and the input of the 5th phase inverter of d type flip flop；The control of output termination first switch of described 5th phase inverter End processed；The lower end ground connection of described first switch.
18. secondary control circuits according to claim 14, it is characterised in that: the PWM of described former limit supplementary control unit In control circuit, limit voltage produces circuit, including hex inverter, the second current source, second switch, the second electric capacity, the Three switches, narrow-pulse generator, the 7th phase inverter, first with door, the 4th switch, the first buffer, the 4th PMOS, 5th PMOS, the 6th PMOS, the 3rd NMOS tube, the 4th NMOS tube, the 3rd current source, resistance, institute That states that the input termination isolating coupler part of hex inverter sends opens signal, the control end of output termination second switch； The lower end of upper termination second current source of described second switch, the top crown of lower termination the second electric capacity；Under described second electric capacity Pole plate ground connection；The top crown of upper termination second electric capacity of described 3rd switch and the left end of the 4th switch, the lower end of the 3rd switch Ground connection；The outfan of the input termination hex inverter of described narrow-pulse generator, the input of output termination the 7th phase inverter And the 4th switch control end；The output termination first of described 7th phase inverter and an input of door；Described first with Another input termination of door opens signal, the control end of output termination the 3rd switch；The right-hand member of described 3rd switch connects first and delays Rush the positive input of device；The negative input of described first buffer connects the outfan of self, and receives the 3rd NMOS tube Grid end；The drain terminal of described 3rd NMOS tube connects the drain terminal of the 4th PMOS, and source connects the upper end of the 3rd current source；Described The source of the 4th PMOS connects internal power source voltage, and grid terminate the second bias voltage；The lower end ground connection of described 3rd current source, Upper end is also coupled to the source of the 4th NMOS tube；Grid termination the 3rd reference voltage of described 4th NMOS tube, drain terminal connects the 5th The drain terminal of PMOS；The source of described 5th PMOS connects internal power source voltage, the drain terminal and the 6th of grid termination self The grid end of PMOS；The source of described 6th PMOS connects internal power source voltage, the upper end of drain terminal connecting resistance；Described electricity The lower end ground connection of resistance, upper terminal voltage is limit voltage.
19. secondary control circuits according to claim 14, it is characterised in that: the PWM of described former limit supplementary control unit In control circuit, limit voltage produces circuit, including the 8th phase inverter, second and door, high frequency generator, M position subtraction count Device, M figure place weighted-voltage D/A converter, the second buffer, the input of described 8th phase inverter terminates burst pulse and opens signal, outfan Connect an input of second and door；Described second with door another input termination high frequency generator outfan, outfan Connect the input of M position subtraction count device；The input of the output termination M figure place weighted-voltage D/A converter of described M position subtraction count device； The positive input of output termination second buffer of described M figure place weighted-voltage D/A converter；The negative sense outfan of described second buffer Connecing the outfan of self, the voltage of outfan is limit voltage.
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