CN106018909A - Digital oscilloscope probe automatic adapting circuit and method - Google Patents
Digital oscilloscope probe automatic adapting circuit and method Download PDFInfo
- Publication number
- CN106018909A CN106018909A CN201610322183.8A CN201610322183A CN106018909A CN 106018909 A CN106018909 A CN 106018909A CN 201610322183 A CN201610322183 A CN 201610322183A CN 106018909 A CN106018909 A CN 106018909A
- Authority
- CN
- China
- Prior art keywords
- probe
- circuit
- pin
- active
- digital oscilloscope
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R13/00—Arrangements for displaying electric variables or waveforms
- G01R13/02—Arrangements for displaying electric variables or waveforms for displaying measured electric variables in digital form
- G01R13/0218—Circuits therefor
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a digital oscilloscope probe automatic adapting circuit and method and specifically relates to the technical field of testing. The circuit and method solve a defect that a conventional oscilloscope cannot automatically adapt to an active probe or passive probe, a user is required to manually set the input impedance and the probe coefficient of the oscilloscope for different probes, and mismatched impedance or erroneous setting tends to cause testing waveform distortion or incapability of testing correct waveforms. The digital oscilloscope probe automatic adapting circuit comprises a FPGA, an oscilloscope probe interface circuit, and a connector. The oscilloscope probe interface circuit comprises first to ninth pins, wherein the fifth pin is connected with a passive probe adapting circuit and the seventh pin is connected with an active probe adapting circuit.
Description
Technical field
The invention belongs to technical field of measurement and test, be specifically related to circuit and the method for a kind of digital oscilloscope probe automatic adaptation.
Background technology
The input impedance of digital oscilloscope has 50 Ω and 1M Ω two kinds.When selecting active probe input, oscillographic input hinders
Anti-needs is arranged to 50 Ω, is generally used for medium-to-high grade wideband digital oscillograph.When selecting the input of high resistant passive probe, oscillography
The input impedance of device needs to be arranged to 1M Ω, is generally used for low and middle-grade digital oscilloscopes.If impedance mismatch or mistake is set,
Test waveform is understood distortion or cannot test correct waveform.
Domestic oscillograph is positioned low and middle-grade oscillograph market, and bandwidth is typically at below 1GHz, and majority uses passive probes
Input mode, does not the most support active probe, therefore, automatically identifying and adaptation electricity of the typically no probe of oscillographic input
Road.When user uses passive probe, need manual to arrange oscillographic input impedance and probe system
Existing technical scheme does not support active probe, only supports the input of passive probe.User needs manual to arrange oscillograph
Input impedance and probe coefficient.If impedance mismatch or arrange mistake, test waveform can distortion or cannot test correctly
Waveform.Do not support the regulation of bias voltage and the calibration of zero point.
Summary of the invention
It is an object of the invention to for existing oscillograph can not automatic adaptation active probe or passive probe, for different spies
Head, user needs manually to arrange oscillographic input impedance and probe coefficient, once impedance mismatch or arrange mistake, easily
Cause test waveform distortion maybe cannot test the deficiency of correct waveform, it is proposed that one can identify active probe or nothing automatically
Pop one's head in source, simultaneously according to the digital oscillography of one of the attenuation quotient of the oscillographic input impedance of type Auto-matching popped one's head in and probe
The circuit of device probe automatic adaptation and method.
The present invention specifically adopts the following technical scheme that
A kind of circuit of digital oscilloscope probe automatic adaptation, including FPGA, oscilloprobe interface circuit and adapter, described
Oscilloprobe interface circuit include the first pin, the second pin, three-prong, the 4th pin, the 5th pin, the 6th pin,
7th pin, the 8th pin and the 9th pin, described first pin, the second pin, the 8th pin and the 9th pin connect respectively
Voltage regulator circuit, three-prong linker reference voltage source circuit, the 5th pin connected with passive probe adapter circuit, the 7th pin is even
Connect active probe adapter circuit, passive probe adapter circuit, active probe adapter circuit, reference voltage source circuit, the 4th pin,
6th pin is all connected with each other with FPGA.
Preferably, described reference voltage source circuit includes reference voltage source, analog-digital converter analog chip and the computing being sequentially connected with
Amplifier, the voltage range of reference voltage source circuit output is-4V～+4V.
Preferably, described 4th pin is the data pins of I2C bus.
Preferably, described 6th pin is the clock pins of I2C bus.
Preferably, described FPGA includes central control unit and the passive probe identification module being connected with central control unit, active
Probe identification module, bias voltage acquisition module and digital to analog converter control module.
The method of a kind of digital oscilloscope probe automatic adaptation, uses a kind of digital oscilloscope as above probe automatic adaptation
Circuit, comprises the following steps:
Step one: the probe of digital oscilloscope is accessed the circuit of digital oscilloscope probe automatic adaptation；
Step 2: when detecting that the low level signal of 0V is delivered to FPGA by passive probe adapter circuit, the nothing within FPGA
The input of a passive probe adapter circuit is inquired about in source probe identification module timing in every 2 seconds, if the low level of detecting, then table
Showing that passive probe accesses, the input impedance of digital oscilloscope is set to 1M Ω by central control unit automatically, and probe coefficient is set to
10:1；
Step 3: when detecting that the low level signal of 0V is delivered to FPGA by active probe adapter circuit, having within FPGA
The input of an active probe adapter circuit is inquired about in source probe identification module timing in every 2 seconds, if the low level of detecting, then table
Showing that active probe accesses, central control unit reads the information of storage, central control unit root in active probe by I2C bus
According to the active probe information read, the impedance of digital oscilloscope is set to 50 Ω, the attenuation quotient of active probe is set to
10:1,1:1 or 100:1, central control unit controls reference voltage source circuit to active by digital to analog converter control module simultaneously
Probe carries out the automatic calibration of zero point.
The invention have the advantages that: the circuit of this digital oscilloscope probe automatic adaptation can identification probe be to have automatically
Source probe or passive probe, simultaneously according to the oscillographic input impedance of type Auto-matching and the attenuation quotient of probe of probe,
This process need not user and intervenes, and is directly automatically performed by oscillograph itself；If probe is identified is active probe, then
Can automatically notify whether user is biased the automatic calibration of point of zero voltage, if user accepts school zero, then oscillograph is automatically performed electricity
The zero point correction of pressure.The automatic design identified with adapter circuit of probe, makes oscillographic operation simpler, and is difficult to setting occur
Mistake, prevents the waveform measurement distortion or test result mistake caused because of the arranging mistake of probe, improves the standard of test
Really property and effectiveness.
Accompanying drawing explanation
Fig. 1 is the circuit block diagram of this digital oscilloscope probe automatic adaptation；
Fig. 2 is passive probe theory diagram；
Fig. 3 is active probe theory diagram；
Fig. 4 is active probe adaptation flow chart.
Detailed description of the invention
With specific embodiment, the detailed description of the invention of the present invention is described further below in conjunction with the accompanying drawings:
As it is shown in figure 1, a kind of digital oscilloscope probe automatic adaptation circuit, including FPGA, oscilloprobe interface circuit and
Adapter, oscilloprobe interface circuit include the first pin, the second pin, three-prong, the 4th pin, the 5th pin,
6th pin, the 7th pin, the 8th pin and the 9th pin, the first pin, the second pin, the 8th pin and the 9th pin divide
Do not connect voltage regulator circuit, three-prong linker reference voltage source circuit, the 5th pin connected with passive probe adapter circuit, the 7th
Pin connects active probe adapter circuit, passive probe adapter circuit, active probe adapter circuit, reference voltage source circuit, the
Four pins, the 6th pin are all connected with each other with FPGA.Wherein, FPGA is field programmable gate array.
Reference voltage source circuit includes reference voltage source, analog-digital converter analog chip and operational amplifier, the benchmark being sequentially connected with
The voltage range of voltage source circuit output is-4V～+4V.
4th pin is the data pins of I2C bus, and the 6th pin is the clock pins of I2C bus.
FPGA include central control unit and the passive probe identification module being connected with central control unit, active probe identification module,
Bias voltage acquisition module and digital to analog converter control module.
The method of a kind of digital oscilloscope probe automatic adaptation, uses a kind of digital oscilloscope as above probe automatic adaptation
Circuit, comprises the following steps:
Step one: the probe of digital oscilloscope is accessed the circuit of digital oscilloscope probe automatic adaptation；
Step 2: when detecting that the low level signal of 0V is delivered to FPGA by passive probe adapter circuit, the nothing within FPGA
The input of a passive probe adapter circuit is inquired about in source probe identification module timing in every 2 seconds, if the low level of detecting, then table
Showing that passive probe accesses, the input impedance of digital oscilloscope is set to 1M Ω by central control unit automatically, and probe coefficient is set to
10:1；
Step 3: when detecting that the low level signal of 0V is delivered to FPGA by active probe adapter circuit, having within FPGA
The input of an active probe adapter circuit is inquired about in source probe identification module timing in every 2 seconds, if the low level of detecting, then table
Showing that active probe accesses, central control unit reads the information of storage, central control unit root in active probe by I2C bus
According to the active probe information read, the impedance of digital oscilloscope is set to 50 Ω, the attenuation quotient of active probe is set to
10:1,1:1 or 100:1, central control unit controls reference voltage source circuit to active by digital to analog converter control module simultaneously
Probe carries out the automatic calibration of zero point.
As in figure 2 it is shown, the output of passive probe includes that signal output and incoming end export 2 signals.In signal output and Fig. 1
BNC (U13) be connected, represent measured signal be input to oscillographic passage by probe.Incoming end output is managed with the 5th of U12
Foot (5) is connected, and represents that passive probe accesses.In Fig. 1, R1 is the circuit of 100k Ω, and R2 is the resistance of 500k Ω.When showing
When ripple device passive probe does not accesses, the 5th pin (5) of U12 is vacant state, and now in figure, the voltage of P1 point is
3.3V*500/ (100+500)=2.75V, meets the requirement of 74LVC1G32 (U7) input high level, the high level of output 3.3V
Deliver to XC6SLX45T-2FGG484C (U8).When oscillograph passive probe accesses, the R6 (10k Ω) in Fig. 2 and R1 (100k Ω),
R2 (500k Ω) dividing potential drop again calculates.Parallel resistance Rz calculating R6 Yu R2 according to resistor coupled in parallel formula is 9.8k Ω.
The magnitude of voltage of so P1 point is the requirement that 3.3V*9.8/ (100+9.8)=0.3V meets 74LVC1G32 (U7) input low level,
The low level signal of output 0V delivers to XC6SLX45T-2FGG484C (U8).Have inside XC6SLX45T-2FGG484C one passive
Probe identification module, the outfan of a U7 is inquired about in the timing in every 2 seconds of this module, if the low level of detecting, then it represents that passive spy
Head accesses, if high level being detected, then it represents that passive probe does not accesses.When detecting that passive probe accesses, central authorities' control of U8
Oscillographic input impedance is set to 1M Ω by unit processed automatically, and probe coefficient is set to 10:1.
As shown in Figure 3,4, active probe includes that RC network circuit, amplifier circuit, EEROM storage circuit, probe access
Terminal circuits etc. form.RC network circuit is mainly used in adaptation and the compensation of input impedance, to meet the input requirements of amplifier U15.
Amplifier circuit mainly realizes the conversion of input impedance, high input impedance becomes 50 Ω transmission, simultaneously by biasing voltage signal
OFFSET joins outfan, and to compensate the zero migration that amplifier is brought into, the input voltage of amplifier is ± 5V or ± 12V,
The active probe of different model, input voltage is different.If the memorizer of EEROM storage main circuit I2C EBI, use
In information such as the storage model of active probe, attenuation quotients.Probe incoming end circuit is mainly used in the identification of active probe.
The Micro Energy Lose of the ADI company that the U3 in Fig. 1 uses, low-noise accurate voltage reference source ADR392, this reference source exports
The reference signal of+4V, delivers to the REF reference edge of U4.U4 uses 16 D/A converter MAX5441 of MAXIM company, uses
In the voltage signal of output 0-4V, resolution is 4V/65536, and this voltage signal becomes the voltage of-4V～4V through amplifier U5
Signal OFFSET, amplifier U5 select the precision operational-amplifier AD8513 of ADI company.OFFSET is supplied to the active of Fig. 3
Probe bias voltage pin.Wherein, MAX5441 uses three line Serial Control, the DAC control module of U8 be controlled.U12
4th pin of probe interface circuit, the 6th pin are data and the clock pins of I2C bus, are mainly used in connecting the U8 of Fig. 1
Communicate with the U16 of Fig. 3, read the information in the EEROM of active probe.7th pin of U12 probe interface circuit has
Source probe identifies foot, for the automatic identification of active probe.The identification of active probe and adaptive flow process are described in detail below.
1) the setting of active probe
In active probe adapter circuit, R3 is the circuit of 100k Ω, and R4 is the resistance of 500k Ω.When oscillograph active probe not
During access, the 7th pin of U12 is vacant state, and now in figure, the voltage of P2 point is 3.3V*500/ (100+500)=2.75V,
Meeting the requirement of 74LVC1G32 (U9) input high level, the high level of output 3.3V delivers to XC6SLX45T-2FGG484C (U8).
When oscillograph active probe accesses, the R12 (10k Ω) in Fig. 3 and R3 (100k Ω), R4 (500k Ω) dividing potential drop again
Calculate.Parallel resistance Rz calculating R12 Yu R4 according to resistor coupled in parallel formula is 9.8k Ω.The magnitude of voltage of so P2 point is
3.3V*9.8/ (100+9.8)=0.3V meets the requirement of 74LVC1G32 (U9) input low level, the low level signal of output 0V
Deliver to XC6SLX45T-2FGG484C (U8).An active probe identification module, this mould is had inside XC6SLX45T-2FGG484C
The outfan of a U9 is inquired about in block timing in every 2 seconds, if the low level of detecting, then it represents that active probe accesses, if height being detected
Level, then it represents that active probe does not accesses.
2) information of active probe reads
After active probe is detected, the central control unit in FPGA reads the 24C04 of active probe by I2C bus
(U16) storage information in, the information such as including the model popped one's head in, attenuation quotient.Central control unit according to the probe information read back,
Oscillographic impedance is set to 50 Ω, the attenuation quotient of probe is set to 10:1,1:1 or 100:1.
3) zero point auto-calibration of active probe biasing
The Micro Energy Lose of the ADI company that the U3 in Fig. 1 uses, low-noise accurate voltage reference source ADR392, this reference source exports
The reference signal of+4V, delivers to the REF reference edge of U4.U4 uses 16 D/A converter MAX5441 of MAXIM company, uses
In the voltage signal of output 0-4V, resolution is 4V/65536, and this voltage signal becomes the electricity of-4V～4V through amplifier U5
Pressure signal OFFSET, amplifier U5 select the precision operational-amplifier AD8513 of ADI company.OFFSET is supplied to having of Fig. 3
Source probe bias voltage pin.Wherein, MAX5441 uses three line Serial Control, the DAC control module of U8 be controlled.
Central control unit in XC6SLX45T-2FGG484C (U8) reads bias voltage OFFSET's by bias voltage acquisition module
Magnitude of voltage, if not 0, then adjust the value of the DAC of MAX5441, until the magnitude of voltage of OFFSET is 0.
Certainly, described above is not limitation of the present invention, and the present invention is also not limited to the example above, the art
Change that technical staff is made in the essential scope of the present invention, retrofit, add or replace, also should belong to the protection of the present invention
Scope.
Claims (6)
1. the circuit of a digital oscilloscope probe automatic adaptation, it is characterised in that include FPGA, oscilloprobe interface electricity
Road and adapter, described oscilloprobe interface circuit include the first pin, the second pin, three-prong, the 4th pin,
Five pins, the 6th pin, the 7th pin, the 8th pin and the 9th pin, described first pin, the second pin, the 8th pin
Connecting voltage regulator circuit respectively with the 9th pin, three-prong linker reference voltage source circuit, the 5th pin connected with passive probe is suitable
Distribution road, the 7th pin connects active probe adapter circuit, passive probe adapter circuit, active probe adapter circuit, benchmark electricity
Source circuit, the 4th pin, the 6th pin are all connected with each other with FPGA.
The circuit of a kind of digital oscilloscope the most as claimed in claim 1 probe automatic adaptation, it is characterised in that described benchmark electricity
Source circuit includes reference voltage source, analog-digital converter analog chip and operational amplifier, the reference voltage source circuit being sequentially connected with
The voltage range of output is-4V～+4V.
The circuit of a kind of digital oscilloscope the most as claimed in claim 1 probe automatic adaptation, it is characterised in that described 4th pipe
Foot is the data pins of I2C bus.
The circuit of a kind of digital oscilloscope the most as claimed in claim 1 probe automatic adaptation, it is characterised in that described 6th pipe
Foot is the clock pins of I2C bus.
The circuit of a kind of digital oscilloscope the most as claimed in claim 1 probe automatic adaptation, it is characterised in that described FPGA
The passive probe identification module that including central control unit and is connected with central control unit, active probe identification module, biased electrical
Pressure acquisition module and digital to analog converter control module.
6. a method for digital oscilloscope probe automatic adaptation, uses a kind of numeral described in claim 1-5 any one to show
The circuit of ripple device probe automatic adaptation, it is characterised in that comprise the following steps:
Step one: the probe of digital oscilloscope is accessed the circuit of digital oscilloscope probe automatic adaptation；
Step 2: when detecting that the low level signal of 0V is delivered to FPGA by passive probe adapter circuit, the nothing within FPGA
The input of a passive probe adapter circuit is inquired about in source probe identification module timing in every 2 seconds, if the low level of detecting, then table
Showing that passive probe accesses, the input impedance of digital oscilloscope is set to 1M Ω by central control unit automatically, and probe coefficient is set to
10:1；
Step 3: when detecting that the low level signal of 0V is delivered to FPGA by active probe adapter circuit, having within FPGA
The input of an active probe adapter circuit is inquired about in source probe identification module timing in every 2 seconds, if the low level of detecting, then table
Showing that active probe accesses, central control unit reads the information of storage, central control unit root in active probe by I2C bus
According to the active probe information read, the impedance of digital oscilloscope is set to 50 Ω, the attenuation quotient of active probe is set to
10:1,1:1 or 100:1, central control unit controls reference voltage source circuit to active by digital to analog converter control module simultaneously
Probe carries out the automatic calibration of zero point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610322183.8A CN106018909B (en) | 2016-05-16 | 2016-05-16 | A kind of circuit and method of digital oscilloscope probe automatic adaptation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610322183.8A CN106018909B (en) | 2016-05-16 | 2016-05-16 | A kind of circuit and method of digital oscilloscope probe automatic adaptation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106018909A true CN106018909A (en) | 2016-10-12 |
| CN106018909B CN106018909B (en) | 2018-10-09 |
Family
ID=57097350
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610322183.8A Active CN106018909B (en) | 2016-05-16 | 2016-05-16 | A kind of circuit and method of digital oscilloscope probe automatic adaptation |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106018909B (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108008160A (en) * | 2017-12-04 | 2018-05-08 | 中国电子科技集团公司第四十研究所 | A kind of single-ended oscilloprobe of active low pressure |
| CN108957081A (en) * | 2017-05-18 | 2018-12-07 | 罗德施瓦兹两合股份有限公司 | Oscillograph tests and measures system and method |
| CN111289786A (en) * | 2020-05-13 | 2020-06-16 | 深圳市鼎阳科技股份有限公司 | Probe interface circuit and probe adapter circuit for probe of oscilloscope |
| CN111413527A (en) * | 2020-05-13 | 2020-07-14 | 深圳市鼎阳科技股份有限公司 | Single-ended active probe for oscilloscope and signal detection system |
| CN112684234A (en) * | 2021-03-19 | 2021-04-20 | 深圳市鼎阳科技股份有限公司 | Probe identification method of oscilloscope and oscilloscope |
| CN113625032A (en) * | 2021-07-01 | 2021-11-09 | 普源精电科技股份有限公司 | Probe measurement system and method |
| CN116298450A (en) * | 2023-05-23 | 2023-06-23 | 深圳市鼎阳科技股份有限公司 | Probe setting method for digital oscilloscope and digital oscilloscope |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4983910A (en) * | 1988-05-20 | 1991-01-08 | Stanford University | Millimeter-wave active probe |
| US20040246001A1 (en) * | 2003-06-09 | 2004-12-09 | Sontag David N. | Method and apparatus for guided establishment of a signal probe configuration |
| CN1673768A (en) * | 2004-02-25 | 2005-09-28 | 特克特朗尼克公司 | Calibration method and apparatus |
| US7982480B2 (en) * | 2008-08-01 | 2011-07-19 | Aes Technologies, Inc. | Calibrated wideband high frequency passive impedance probe |
| CN102735887A (en) * | 2012-07-16 | 2012-10-17 | 电子科技大学 | Single-ended active probe circuit of digital oscilloscope |
| CN104316759A (en) * | 2014-10-10 | 2015-01-28 | 中国电子科技集团公司第四十一研究所 | Continuous wave power probe |
| CN204613261U (en) * | 2015-04-30 | 2015-09-02 | 深圳市知用电子有限公司 | The intelligent active probe of a kind of oscillograph |
-
2016
- 2016-05-16 CN CN201610322183.8A patent/CN106018909B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4983910A (en) * | 1988-05-20 | 1991-01-08 | Stanford University | Millimeter-wave active probe |
| US20040246001A1 (en) * | 2003-06-09 | 2004-12-09 | Sontag David N. | Method and apparatus for guided establishment of a signal probe configuration |
| CN1673768A (en) * | 2004-02-25 | 2005-09-28 | 特克特朗尼克公司 | Calibration method and apparatus |
| US7982480B2 (en) * | 2008-08-01 | 2011-07-19 | Aes Technologies, Inc. | Calibrated wideband high frequency passive impedance probe |
| CN102735887A (en) * | 2012-07-16 | 2012-10-17 | 电子科技大学 | Single-ended active probe circuit of digital oscilloscope |
| CN104316759A (en) * | 2014-10-10 | 2015-01-28 | 中国电子科技集团公司第四十一研究所 | Continuous wave power probe |
| CN204613261U (en) * | 2015-04-30 | 2015-09-02 | 深圳市知用电子有限公司 | The intelligent active probe of a kind of oscillograph |
Non-Patent Citations (2)
| Title |
|---|
| 唐金元 等: "示波器探头的选用", 《计量与测试技术》 * |
| 孙新顺 等: "示波器探头的选择", 《内蒙古科技与经济》 * |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108957081A (en) * | 2017-05-18 | 2018-12-07 | 罗德施瓦兹两合股份有限公司 | Oscillograph tests and measures system and method |
| CN108008160A (en) * | 2017-12-04 | 2018-05-08 | 中国电子科技集团公司第四十研究所 | A kind of single-ended oscilloprobe of active low pressure |
| CN111289786A (en) * | 2020-05-13 | 2020-06-16 | 深圳市鼎阳科技股份有限公司 | Probe interface circuit and probe adapter circuit for probe of oscilloscope |
| CN111413527A (en) * | 2020-05-13 | 2020-07-14 | 深圳市鼎阳科技股份有限公司 | Single-ended active probe for oscilloscope and signal detection system |
| CN111413527B (en) * | 2020-05-13 | 2022-08-16 | 深圳市鼎阳科技股份有限公司 | Single-ended active probe for oscilloscope and signal detection system |
| CN112684234A (en) * | 2021-03-19 | 2021-04-20 | 深圳市鼎阳科技股份有限公司 | Probe identification method of oscilloscope and oscilloscope |
| CN112684234B (en) * | 2021-03-19 | 2021-06-22 | 深圳市鼎阳科技股份有限公司 | Probe identification method of oscilloscope and oscilloscope |
| CN113625032A (en) * | 2021-07-01 | 2021-11-09 | 普源精电科技股份有限公司 | Probe measurement system and method |
| CN116298450A (en) * | 2023-05-23 | 2023-06-23 | 深圳市鼎阳科技股份有限公司 | Probe setting method for digital oscilloscope and digital oscilloscope |
| CN116298450B (en) * | 2023-05-23 | 2023-08-15 | 深圳市鼎阳科技股份有限公司 | Probe setting method for digital oscilloscope and digital oscilloscope |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106018909B (en) | 2018-10-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106018909A (en) | Digital oscilloscope probe automatic adapting circuit and method | |
| CN102109589B (en) | Embedded check meter for electronic mutual inductor | |
| CN201654130U (en) | Automatic measuring and calibrating device of high-impedance measuring apparatus | |
| CN105258718A (en) | Comprehensive tester metering detection system, adapter, and metering test platform | |
| CN112147484A (en) | Test system based on charging chip and charging test system | |
| CN205067714U (en) | Single -phase electric energy meter calibrating installation and single -phase electric energy meter credible test platform that resets | |
| van den Brom et al. | EMC testing of electricity meters using real-world and artificial current waveforms | |
| CN103969531B (en) | Automatic testing device for linearity of linear optical coupler | |
| CN205079787U (en) | Comprehensive tester metrological verification system and adapter and measurement test platform | |
| CN104625276B (en) | A kind of spark machine on-line operation parameter real-time monitoring system and its monitoring method | |
| CN206584033U (en) | Bulk current injection test system check device | |
| CN103558571A (en) | Calibration system of electronic transformer and merging unit | |
| CN207586367U (en) | Dress electrocardio equipment plate card Auto-Test System | |
| CN201796119U (en) | Programmable digital integrated circuit alternating-current parameter testing system | |
| CN207924121U (en) | A kind of detection calibration plate for signal acquiring board | |
| CN109900970A (en) | A kind of multi channel detector capacitor automatic measurement system | |
| CN106291065B (en) | Voltage sampling circuit | |
| CN111123073B (en) | Quick self-checking device of hardware board card | |
| CN107015556A (en) | A kind of bus solid-state power controller test device | |
| Kovalcík et al. | Cost-effective smart metering system for the power consumption analysis of household | |
| CN203616454U (en) | High-precision battery management system (BMS) unit voltage acquisition circuit | |
| CN102346243B (en) | Intelligent resistance box for verification | |
| CN106291163B (en) | A kind of bandwidth determining method and system of divertor | |
| CN203933408U (en) | Reaction type control circuit for EMC test power supply | |
| CN204882845U (en) | But control circuit of set voltage reference source penalty coefficient voltmeter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |