CN105976779A - Timing controller and method for updating data, liquid crystal display panel - Google Patents
Timing controller and method for updating data, liquid crystal display panel Download PDFInfo
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- CN105976779A CN105976779A CN201610519564.5A CN201610519564A CN105976779A CN 105976779 A CN105976779 A CN 105976779A CN 201610519564 A CN201610519564 A CN 201610519564A CN 105976779 A CN105976779 A CN 105976779A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a timing controller which includes a timing control chip, a data memory and a SPI bus. The SPI bus includes a first connecting end, a second connecting end and a third connecting end. The first connecting end and the timing control chip are connected. The second connecting end and the data memory are connected. The third connecting end is intended for connecting a data burning fixture. The timing controller is characterized in that the timing control chip is provided with a master mode unit, a slave mode unit and a connecting control unit. The connecting control unit is intended for controlling the first connecting end to be connected to the master mode unit or the slave mode unit. When the first connecting end is connected to the master mode unit, the timing control chip serves as a host side of the data memory and acquires data from the data memory. The invention also discloses a method for updating data of the timing controller, and further discloses a liquid crystal display panel which includes the timing controller.
Description
Technical field
The present invention relates to Display Technique field, particularly to a kind of time schedule controller and data-updating method thereof,
Further relate to comprise the display panels of described time schedule controller.
Background technology
Liquid crystal display (Liquid Crystal Display, TFT-LCD) have volume little, low in energy consumption, system
Make advantage of lower cost and the feature such as radiationless, occupy leading position in current flat panel display market,
Liquid crystal display is widely used in each class of electronic devices, such as mobile phone, panel computer etc..
In the production process of display panels, various defects easily occur, inevitably will be to some
Display panels carries out heavy industry (rework), needs the characteristic amendment phase according to display panels after heavy industry
The parameter closed, such as the driving data in time schedule controller.As it is shown in figure 1, time schedule controller 1 is arranged
There are timing controller (TCON) 2 and flash storage 3, described timing controller 2 and described Flash
Connected by SPI (Serial Peripheral Interface, Serial Peripheral Interface (SPI)) bus 4 between memorizer 3.
Described flash storage 3 storage have driving data, described timing controller 2 as host side (Master),
By described spi bus 4 from as obtaining driving data from the flash storage 3 of machine end (Slave).
When driving data is modified by needs, as it is shown in figure 1, need data recording tool 5 is connected to SPI
Bus 4, by data recording tool 5 as host side, is burned onto flash storage 3 by new driving data.
But, now spi bus 4 connects two host side, i.e. timing controller 2 and data burning jig 5,
When data recording tool 5 carries out the read-write operation of data to flash storage 3, can be by simultaneously as master
The impact of the timing controller 2 of machine end and produce conflict, cause effectively flash storage 3 being entered
Row reading and writing data.
In prior art, in order to solve above problem, as it is shown in figure 1, generally connect at spi bus 4
One end to timing controller 2 is provided with switch chip (Switch IC) 6, and described switch chip 6 is arranged
There is enable pin En, enable pin En and be associated with data recording tool 5.When spi bus 4 is not connected with number
During according to burning jig 5, switch chip 6 is in the conduction state, timing controller 2 and flash storage 3
Between be connected with each other；When data recording tool 5 is connected to spi bus 4, it triggers and enables pin En
Control switch chip 6 to disconnect, cut off the connection between timing controller 2 and flash storage 3, really
Protect data recording tool 5 and flash storage 3 can be carried out reading and writing data effectively.
As above settling mode is primarily present problems with: adds switch chip in (1), drive circuit, makes
Obtain peripheral circuit to complicate, add cost；(2), when carrying out data modification, by pin En will be enabled
It is associated with data recording tool, is turned on or off controlling switch chip, adds the complexity of operation.
Summary of the invention
In view of this, the invention provides a kind of time schedule controller, carry out data renewal in solution and occur multiple
While the problem that host side clashes, it is to avoid periphery circuit design complicates, and reduces cost；And
When carrying out data and updating, its operation is the simplest.
To achieve these goals, present invention employs following technical scheme:
A kind of time schedule controller, including timing controller and data storage, described timing controller
Be connected by spi bus with between described data storage, described spi bus include the first connection end, second
Connecting end and the 3rd and connect end, described first connects end is connected with described timing controller, and described second
Connecting end to be connected with described data storage, the described 3rd connects end is used for connecting data recording tool；Wherein,
Described timing controller is provided with holotype unit, from mode unit and connect control unit, described
Connection control unit is used for controlling described first connection end and is connected to described holotype unit or from mode unit；
When described first connection end is connected to described holotype unit, and described timing controller is deposited as described data
The host side of reservoir obtains data from described data storage.
Wherein, the described 3rd connects end connection data recording tool, is used for described data storage burning
Data；When described data recording tool is to described data storage burning data, described connection control unit
Control described first connection end and be connected to described from mode unit.
Wherein, described data storage is flash storage.
Wherein, described timing controller is also associated with synchronous DRAM, when being used for storing described
The data that sequence control chip obtains from described data storage.
The data-updating method of time schedule controller as above, comprising: control described first to connect end even
It is connected to described from mode unit, data recording tool is connected to the described 3rd and connects end, described data burn
Record tool is by the second data recording to be updated to described data storage；Control described first and connect end connection
To described holotype unit, data recording tool is connected end from the described 3rd and removes, by described sequencing contro
Chip obtains described second data from described data storage.
Wherein, described time schedule controller is used for driving display floater to show, wherein, and described second data
Acquisition mode as follows: described time schedule controller shows the first image according to the first data-driven display floater；
Detect the defect that described first image exists；Compensate to eliminate described first image to described first data
The defect existed, it is thus achieved that described second data.
Present invention also offers a kind of display panels, comprising: display floater；Source electrode driver, uses
In providing data signal to described display floater；Gate drivers, for providing scanning to described display floater
Signal；Time schedule controller as above, for providing to described source electrode driver and described gate drivers
Timing control signal, and send data signal to be shown to described source electrode driver.
The time schedule controller that the embodiment of the present invention provides, by being provided with holotype list in timing controller
First, from mode unit and connection control unit, when needs obtain data from data storage, connection control
Unit processed controls holotype unit and is connected with spi bus, it is not necessary to when data storage obtains data, even
Connect control unit to control to be connected with spi bus from mode unit, thus, carry out data in solution and update appearance
While the problem that multiple host side clash, it is to avoid periphery circuit design complicates, and reduces cost.
And when carrying out data and updating, it operates more simple and flexible, improves the stability that data update.
Accompanying drawing explanation
Fig. 1 is the structural representation of existing time schedule controller；
Fig. 2 is the structural representation of the display panels that the embodiment of the present invention provides；
Fig. 3 is the structural representation of the time schedule controller that the embodiment of the present invention provides；
Fig. 4 is the schematic flow sheet of the data-updating method of the time schedule controller in the embodiment of the present invention；
Fig. 5 is the schematic flow sheet of the acquisition mode of the second data in the embodiment of the present invention.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with the accompanying drawings to the present invention's
Detailed description of the invention is described in detail.The example of these preferred implementations is illustrated in the accompanying drawings.
The embodiments of the present invention shown in accompanying drawing and described with reference to the accompanying drawings are merely exemplary, and the present invention
It is not limited to these embodiments.
Here, also, it should be noted in order to avoid having obscured the present invention because of unnecessary details, attached
Figure illustrate only and according to the closely-related structure of the solution of the present invention and/or process step, and eliminate
Other details little with relation of the present invention.
The embodiment of the present invention provide firstly a kind of display panels, as in figure 2 it is shown, described liquid crystal display
Panel includes display floater 10, source electrode driver 20, gate drivers 30 and time schedule controller 40.Its
In, described display floater 10 is provided with crisscross data wire and scanning elder generation and is positioned at data wire and sweeps
Multiple pixel cells (not shown in accompanying drawing) between face, described source electrode driver 20 is by data alignment institute
Stating display floater 10 and provide data signal, described gate drivers 30 is by display floater described in scanning alignment
10 provide scanning signal, and described time schedule controller 40 is then for described source electrode driver 20 and described grid
Driver 30 provides timing control signal, and also sends data to be shown to described source electrode driver 20
Signal.
Wherein, the display floater 10 in the embodiment of the present invention such as may is that Electronic Paper, mobile phone, flat board electricity
Brain, television set, display, notebook computer, DPF, navigator etc. are any has display function
Product or parts.
Wherein, the time schedule controller 40 that the present embodiment provides is as it is shown on figure 3, described time schedule controller 40 wraps
Including timing controller 100 and data storage 200, described timing controller 100 is deposited with described data
Connected by spi bus 300 between reservoir 200.Specifically, described spi bus 300 includes the first connection
End the 301, second connection end 302 and the 3rd connects end 303, and described first connects end 301 and described sequential
Control chip 100 connects, and described second connects end 302 is connected with described data storage 200, and described the
Three connect end 303 is used for connecting data recording tool 400.
Wherein, in the present embodiment, described timing controller 100 is provided with holotype unit 101, from
Mode unit 102 and connection control unit 103, described connection control unit 103 is used for controlling described SPI
First connection end 301 of bus 300 is connected to described holotype unit 101 or from mode unit 102.Work as institute
State connection control unit 103 control described first connect end 301 be connected to described holotype unit 101, described
Timing controller 100 has described spi bus 300 control, the conduct of described timing controller 100
The host side of described data storage 200 obtains data from described data storage 200；Control is connected when described
Unit 103 processed controls described first connection end 301 and is connected to described from mode unit 102, described sequencing contro
Chip 100 discharges described spi bus 300 control, and described timing controller 100 is not re-used as described
The host side of data storage 200, now can at the 3rd connection end 303 of described spi bus 300 even
Connecing data recording tool 400, described data recording tool 400 is as the host side of described data storage 200
To described data storage 200 burning data, update the data of storage in described data storage 200.
Wherein, described data storage 200 is flash storage.Further, as it is shown on figure 3, described
Timing controller 100 is also associated with synchronous DRAM (Synchronous Dynamic Random
Access Memory, SDRAM) 500, when described synchronous DRAM 500 is used for storing described
The data that sequence control chip 100 obtains from described data storage 200.
Wherein, about spi bus 300, SPI (Serial Peripheral Interface, Serial Peripheral Interface (SPI))
Bus is a kind of synchronous serial interface that motorola inc releases, and it works with master slave system, this pattern
Generally there is a host side (Master) and one or more from machine end (Slave).SPI for host side with
Full duplex, synchronous serial communication is carried out between machine end.
Further, as shown in Figure 4, the data-updating method bag of the time schedule controller that the present embodiment is provided
Include the steps:
Step S1, control the first connection end are connected to, from mode unit, data recording tool is connected to the 3rd
Connect end, by data recording tool by the second data recording to be updated to data storage.
Step S2, control the first connection end are connected to holotype unit, are connected from the 3rd by data recording tool
End removes, timing controller obtain the second data from data storage.
More specifically, in the present embodiment, described time schedule controller for driving display floater to show,
Time schedule controller needs to provide driving data to display floater, makes display floater show image, as above
Second data refer to driving data to be updated.In the present embodiment, refering to Fig. 5, described second data
Acquisition mode specifically includes following steps:
S10, time schedule controller show the first image according to the first data-driven display floater.Wherein, described
First data refer to the driving data before updating.
S20, detect first image exist defect.Can be detected by some image detecting apparatus, example
As being fluorescence detector.
S30, the first data compensate to eliminate the defect that the first image exists, it is thus achieved that the second data.?
On the basis of first data, with eliminate according to the first data-driven time show the defect of the first image as target,
First data are compensated, is derived from the second data.
According to update method as above, after the driving data in time schedule controller 40 is updated to the second data,
Second data are stored in the synchronous DRAM 500 being connected with timing controller 100.In work
(driving the state that display floater shows) when making state, time schedule controller 40 is from synchronous DRAM
Obtain the second data in 500, according to the second data, display floater 10 is driven.
In sum, the embodiment of the present invention provide time schedule controller and data-updating method, by time
Sequence control chip is provided with holotype unit, from mode unit and connection control unit, at needs from number
When obtaining data according to memorizer, connect control unit control holotype unit and be connected with spi bus, it is not necessary to
When data storage obtains data, connect control unit and control to be connected with spi bus from mode unit, by
This, solving to carry out while data update and the problem that multiple host side clashes occur, it is to avoid peripheral electricity
Road design complicates, and reduces cost.And when carrying out data and updating, it operates more simple and flexible,
Improve the stability that data update.
It should be noted that in this article, the relational terms of such as first and second or the like be used merely to by
One entity or operation separate with another entity or operating space, and not necessarily require or imply these
Relation or the order of any this reality is there is between entity or operation.And, term " includes ", " comprising "
Or its any other variant is intended to comprising of nonexcludability, so that include the mistake of a series of key element
Journey, method, article or equipment not only include those key elements, but also other including being not expressly set out
Key element, or also include the key element intrinsic for this process, method, article or equipment.Do not having
In the case of more restrictions, statement " including ... " key element limited, it is not excluded that including described wanting
Process, method, article or the equipment of element there is also other identical element.
The above is only the detailed description of the invention of the application, it is noted that common for the art
For technical staff, on the premise of without departing from the application principle, it is also possible to make some improvements and modifications,
These improvements and modifications also should be regarded as the protection domain of the application.
Claims (9)
1. a time schedule controller, including timing controller and data storage, described sequencing contro
Be connected by spi bus between chip with described data storage, described spi bus include the first connection end,
Second connects end and the 3rd connects end, and described first connects end is connected with described timing controller, institute
Stating the second connection end to be connected with described data storage, described 3rd connection end is used for connecting data recording and controls
Tool；It is characterized in that, described timing controller is provided with holotype unit, from mode unit and
Connecting control unit, described connection control unit is used for controlling described first connection end and is connected to described main mould
Formula unit or from mode unit；When described first connection end is connected to described holotype unit, described sequential
Control chip obtains data as the host side of described data storage from described data storage.
Time schedule controller the most according to claim 1, it is characterised in that the described 3rd connects end even
It is connected to data recording tool, for described data storage burning data；When described data recording tool
When described data storage burning data, described connection control unit controls described first and connects end connection
To described from mode unit.
Time schedule controller the most according to claim 1, it is characterised in that described data storage is
Flash storage.
Time schedule controller the most according to claim 3, it is characterised in that described timing controller
It is also associated with synchronous DRAM, is used for storing described timing controller and stores from described data
The data that device obtains.
5. the data-updating method of a time schedule controller as claimed in claim 1, it is characterised in that
Including:
Control described first connection end and be connected to described from mode unit, data recording tool is connected to institute
State the 3rd connection end, described data recording tool the second data recording to be updated to described data is deposited
Reservoir；
Control described first to connect end and be connected to described holotype unit, by data recording tool from described the
Three connect end removes, described timing controller obtain described second data from described data storage.
Data-updating method the most according to claim 5, it is characterised in that described data storage
For flash storage.
Data-updating method the most according to claim 6, it is characterised in that described sequencing contro core
Sheet is also associated with synchronous DRAM, is used for storing described timing controller and deposits from described data
The data that reservoir obtains.
8. according to the arbitrary described data-updating method of claim 5-7, it is characterised in that described sequential
Controller is used for driving display floater to show, wherein, the acquisition mode of described second data is as follows:
Described time schedule controller shows the first image according to the first data-driven display floater；
Detect the defect that described first image exists；
Described first data compensate to eliminate the defect that described first image exists, it is thus achieved that described the
Two data.
9. a display panels, it is characterised in that including:
Display floater；
Source electrode driver, for providing data signal to described display floater；
Gate drivers, for providing scanning signal to described display floater；
Time schedule controller as described in claim 1-4 is arbitrary, for described source electrode driver and described grid
Driver provides timing control signal, and sends data signal to be shown to described source electrode driver.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610519564.5A CN105976779B (en) | 2016-07-01 | 2016-07-01 | Sequence controller and its data-updating method, liquid crystal display panel |
| PCT/CN2016/090268 WO2018000468A1 (en) | 2016-07-01 | 2016-07-18 | Timing controller and data updating method thereof, and liquid crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610519564.5A CN105976779B (en) | 2016-07-01 | 2016-07-01 | Sequence controller and its data-updating method, liquid crystal display panel |
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| Publication Number | Publication Date |
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| CN105976779A true CN105976779A (en) | 2016-09-28 |
| CN105976779B CN105976779B (en) | 2019-02-12 |
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| CN201610519564.5A Active CN105976779B (en) | 2016-07-01 | 2016-07-01 | Sequence controller and its data-updating method, liquid crystal display panel |
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| WO (1) | WO2018000468A1 (en) |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106802815A (en) * | 2016-12-21 | 2017-06-06 | 北京小鸟看看科技有限公司 | A kind of serial flash memory on-line rewriting method, device, system and electronic equipment |
| CN106847224A (en) * | 2017-04-06 | 2017-06-13 | 深圳市华星光电技术有限公司 | LCD data recording tool parallel method and system |
| CN107705769A (en) * | 2017-11-21 | 2018-02-16 | 深圳市华星光电技术有限公司 | Display device drive system and method and display device |
| CN107705764A (en) * | 2017-10-13 | 2018-02-16 | 深圳市华星光电半导体显示技术有限公司 | A kind of programming system and method |
| CN108346404A (en) * | 2018-03-05 | 2018-07-31 | 昆山龙腾光电有限公司 | A kind of sequence controller and the parameter testing method for shielding driving circuit |
| CN108459862A (en) * | 2018-05-16 | 2018-08-28 | 昆山龙腾光电有限公司 | Burning code method and liquid crystal display die set |
| CN109920388A (en) * | 2019-04-11 | 2019-06-21 | 深圳市华星光电技术有限公司 | Display panel driving system |
| CN110175460A (en) * | 2019-05-05 | 2019-08-27 | 深圳市华星光电技术有限公司 | The configuration method and image processing apparatus of image processing apparatus |
| CN110660367A (en) * | 2018-06-29 | 2020-01-07 | 瑞鼎科技股份有限公司 | Display device and inter-chip bus thereof |
| WO2020029974A1 (en) * | 2018-08-06 | 2020-02-13 | 京东方科技集团股份有限公司 | Data transmission method, chip, controller, and display device |
| CN111142916A (en) * | 2019-12-16 | 2020-05-12 | 杭州迪普科技股份有限公司 | Configuration device and method of flash memory |
| CN111327954A (en) * | 2020-02-04 | 2020-06-23 | 广州视源电子科技股份有限公司 | Display configuration information processing method and display equipment |
| CN113763884A (en) * | 2021-09-18 | 2021-12-07 | 京东方科技集团股份有限公司 | Data connector, data providing module, method and display device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB815903A (en) * | 1954-06-23 | 1959-07-01 | Landis & Gyr Ag | Apparatus for telemetering and integrating impulses from a number of measuring stations in a central recording station |
| CN101604500A (en) * | 2008-06-11 | 2009-12-16 | 旭曜科技股份有限公司 | The method for burn-recording of display driver, the display driver that uses it and display |
| CN105244004A (en) * | 2015-11-23 | 2016-01-13 | 深圳市华星光电技术有限公司 | Control board and liquid crystal display with control board |
| CN105427822A (en) * | 2015-12-29 | 2016-03-23 | 深圳市华星光电技术有限公司 | Gray-scale compensation data resetting device and method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2706826Y (en) * | 2004-02-13 | 2005-06-29 | 胜华科技股份有限公司 | Automatic voltage regulator |
| DE102005042008A1 (en) * | 2005-09-02 | 2007-03-22 | Ba-Tech Verwaltung Gmbh | Electronic display system including associated electronic and electrical components and method for its control |
| CN102129828A (en) * | 2010-01-18 | 2011-07-20 | 冠捷科技（北京）有限公司 | Display device identification data recording method |
| CN104064141B (en) * | 2014-06-12 | 2016-12-14 | 京东方科技集团股份有限公司 | Display floater optical compensating member, display floater and optical compensation method |
| CN105700210B (en) * | 2016-04-29 | 2019-04-05 | 深圳市华星光电技术有限公司 | LCD display panel and its manufacturing method |
-
2016
- 2016-07-01 CN CN201610519564.5A patent/CN105976779B/en active Active
- 2016-07-18 WO PCT/CN2016/090268 patent/WO2018000468A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB815903A (en) * | 1954-06-23 | 1959-07-01 | Landis & Gyr Ag | Apparatus for telemetering and integrating impulses from a number of measuring stations in a central recording station |
| CN101604500A (en) * | 2008-06-11 | 2009-12-16 | 旭曜科技股份有限公司 | The method for burn-recording of display driver, the display driver that uses it and display |
| CN105244004A (en) * | 2015-11-23 | 2016-01-13 | 深圳市华星光电技术有限公司 | Control board and liquid crystal display with control board |
| CN105427822A (en) * | 2015-12-29 | 2016-03-23 | 深圳市华星光电技术有限公司 | Gray-scale compensation data resetting device and method |
Cited By (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106802815A (en) * | 2016-12-21 | 2017-06-06 | 北京小鸟看看科技有限公司 | A kind of serial flash memory on-line rewriting method, device, system and electronic equipment |
| CN106847224A (en) * | 2017-04-06 | 2017-06-13 | 深圳市华星光电技术有限公司 | LCD data recording tool parallel method and system |
| CN107705764A (en) * | 2017-10-13 | 2018-02-16 | 深圳市华星光电半导体显示技术有限公司 | A kind of programming system and method |
| CN107705769A (en) * | 2017-11-21 | 2018-02-16 | 深圳市华星光电技术有限公司 | Display device drive system and method and display device |
| CN107705769B (en) * | 2017-11-21 | 2021-03-02 | Tcl华星光电技术有限公司 | Display device driving system and method and display device |
| CN108346404A (en) * | 2018-03-05 | 2018-07-31 | 昆山龙腾光电有限公司 | A kind of sequence controller and the parameter testing method for shielding driving circuit |
| CN108346404B (en) * | 2018-03-05 | 2020-11-24 | 昆山龙腾光电股份有限公司 | Parameter debugging method for time schedule controller and screen driving circuit |
| CN108459862A (en) * | 2018-05-16 | 2018-08-28 | 昆山龙腾光电有限公司 | Burning code method and liquid crystal display die set |
| CN110660367A (en) * | 2018-06-29 | 2020-01-07 | 瑞鼎科技股份有限公司 | Display device and inter-chip bus thereof |
| CN110660367B (en) * | 2018-06-29 | 2021-12-31 | 瑞鼎科技股份有限公司 | Display device and inter-chip bus thereof |
| WO2020029974A1 (en) * | 2018-08-06 | 2020-02-13 | 京东方科技集团股份有限公司 | Data transmission method, chip, controller, and display device |
| US11231805B2 (en) | 2018-08-06 | 2022-01-25 | Beijing Boe Display Technology Co., Ltd. | Data transmission method, chip, controller and display device |
| CN109920388B (en) * | 2019-04-11 | 2021-01-15 | 深圳市华星光电技术有限公司 | Display panel driving system |
| CN109920388A (en) * | 2019-04-11 | 2019-06-21 | 深圳市华星光电技术有限公司 | Display panel driving system |
| CN110175460A (en) * | 2019-05-05 | 2019-08-27 | 深圳市华星光电技术有限公司 | The configuration method and image processing apparatus of image processing apparatus |
| CN111142916A (en) * | 2019-12-16 | 2020-05-12 | 杭州迪普科技股份有限公司 | Configuration device and method of flash memory |
| CN111142916B (en) * | 2019-12-16 | 2023-09-26 | 杭州迪普科技股份有限公司 | Configuration device and method of flash memory |
| CN111327954A (en) * | 2020-02-04 | 2020-06-23 | 广州视源电子科技股份有限公司 | Display configuration information processing method and display equipment |
| CN111327954B (en) * | 2020-02-04 | 2023-03-21 | 广州视源电子科技股份有限公司 | Display configuration information processing method and display equipment |
| CN113763884A (en) * | 2021-09-18 | 2021-12-07 | 京东方科技集团股份有限公司 | Data connector, data providing module, method and display device |
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| Publication number | Publication date |
|---|---|
| CN105976779B (en) | 2019-02-12 |
| WO2018000468A1 (en) | 2018-01-04 |
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