CN105929613B - A kind of preparation method of array substrate, display panel and display device - Google Patents
A kind of preparation method of array substrate, display panel and display device Download PDFInfo
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- CN105929613B CN105929613B CN201610534951.6A CN201610534951A CN105929613B CN 105929613 B CN105929613 B CN 105929613B CN 201610534951 A CN201610534951 A CN 201610534951A CN 105929613 B CN105929613 B CN 105929613B
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- array substrate
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- dottle pin
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
- G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
Abstract
The invention discloses a kind of preparation method of array substrate, display panel and display devices, belong to display technology field.The present invention in the fringe region that display can be caused the first array substrate of periphery yellowing phenomenon occur by forming at least one reparation groups of vias pattern and obtaining the second array substrate, at least two sectional hole patterns one dottle pin unit vessel pattern of formation was blurred by all or part of on the second array substrate repairs that groups of vias pattern each repairs that groups of vias pattern includes, obtain third array substrate, each dottle pin unit vessel pattern in third array substrate is etched into a dottle pin unit vessel, obtain the 4th array substrate, when so that the 4th array substrate being applied to liquid crystal cell, dottle pin unit corresponding with each dottle pin unit vessel pattern loses the impetus in the 4th array substrate and can not support the 4th array substrate, to reduce the thickness of liquid crystal cell fringe region, display is avoided the phenomenon that periphery jaundice occur.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of preparation method of array substrate, display panel and display
Device.
Background technology
LCD is occupied important because having many advantages, such as that light, thin, low in energy consumption, brightness is high and image quality is high in flat display field
Status.Wherein, the liquid crystal cell of LCD includes array substrate, color membrane substrates and liquid crystal, by array substrate and color membrane substrates to box
And liquid crystal is encapsulated between array substrate and color membrane substrates and forms liquid crystal cell.
Multiple dottle pin units are formed in current liquid crystal cell, on color membrane substrates, each dottle pin unit is far from color film base
One end of plate is withstood in array substrate, and liquid crystal is filled between multiple dottle pin units, passes through dottle pin unit supports array substrate
And color membrane substrates, to keep between array substrate and color membrane substrates, there are certain distances.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems：
In the design process, it is possible that the higher situation of the density of the dottle pin unit of color membrane substrates fringe region,
After array substrate and color membrane substrates are to box, it is be easy to cause the fringe region in liquid crystal cell, between array substrate and color membrane substrates
At a distance from the array substrate more than the central region in liquid crystal cell is between color membrane substrates, the light of backlight is caused to penetrate
By the optical path difference of different location difference when liquid crystal cell, there is the phenomenon that display periphery jaundice.
Invention content
In order to which the density for solving the dottle pin unit due to color membrane substrates fringe region in the prior art is higher, cause in array
After substrate and color membrane substrates are to box, the light of backlight penetrates different by the optical path difference of different location when liquid crystal cell, shows
Show device periphery jaundice the phenomenon that the problem of, an embodiment of the present invention provides a kind of preparation method of array substrate, display panel and
Display device.The technical solution is as follows：
In a first aspect, providing a kind of preparation method of array substrate, the preparation method of the array substrate includes：
Form the first array substrate；
At least one reparation groups of vias pattern, which is formed, in the fringe region of the first array substrate light emission side obtains second
Array substrate, each groups of vias pattern of repairing blurred sectional hole patterns including at least two；
All or part of each of groups of vias pattern of repairing on the second array substrate is repaired into groups of vias pattern
Including at least two blurred sectional hole patterns formed a dottle pin unit vessel pattern, obtain third array substrate, each dottle pin
Unit vessel pattern is corresponding with a dottle pin unit on color membrane substrates respectively, and each dottle pin unit is in the third array substrate
On view field be located in its corresponding dottle pin unit vessel pattern；
Each dottle pin unit vessel pattern in the third array substrate is etched into a dottle pin unit vessel, is obtained
4th array substrate.
Further, described all or part of each of groups of vias pattern of repairing by the second array substrate is repaiied
It answers groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit vessel pattern of formation, obtain third array base
Before plate, further include：
It is etched into reparation groups of vias by groups of vias pattern is repaired each of on the second array substrate, obtains the 5th array
Substrate, each groups of vias of repairing includes at least two virtualization vias；
If the 5th array substrate can result in display and periphery yellowing phenomenon occurs, execute described by described
Each of whole in two array substrates or reparations groups of vias pattern that periphery jaundice region occur reparation groups of vias pattern packet
At least two included blurred sectional hole patterns and form a dottle pin unit vessel pattern, the step of obtaining third array substrate.
Further, described all or part of each of groups of vias pattern of repairing by the second array substrate is repaiied
Multiple groups of vias pattern is etched into reparation groups of vias, after obtaining the 5th array substrate, further includes：
One group of display is formed, each display in one group of display includes the 5th array substrate；
If the display number for occurring periphery jaundice in one group of display reaches predetermined threshold value, it is determined that described the
Five array substrates can result in display and periphery yellowing phenomenon occur.
Specifically, groups of vias is repaired each of in the 5th array substrate correspond to a dottle pin on the color membrane substrates
Unit, the corresponding reparation groups of vias contact of each dottle pin unit.
Specifically, the distance between two neighboring virtualization via in at least two virtualizations via is micro- for 3 to 3.5
Rice.
Specifically, the distance between described two neighboring virtualization via is 3 microns.
Specifically, the fringe region in the first array substrate light emission side forms at least one reparation via group picture
Case obtains the second array substrate, including：
Using illumination mask plate, photo-irradiation treatment is carried out to the first array substrate for being coated with photoresist according to the first light exposure,
At least one reparation groups of vias pattern, which is formed, with the fringe region in first array substrate obtains the second array substrate.
Specifically, all or part of each reparation repaired in groups of vias pattern by the second array substrate
Groups of vias pattern include at least two blurred sectional hole patterns formed a dottle pin unit vessel pattern, obtain third array base
Plate, including：
Using the illumination mask plate, photo-irradiation treatment is carried out to the second array substrate according to the second light exposure, it will
All or part of each of groups of vias of repairing on the second array substrate repairs groups of vias pattern includes at least two
It blurred sectional hole patterns and forms a dottle pin unit vessel pattern, and obtained third array substrate, second light exposure is more than described
First light exposure.
Specifically, each dottle pin unit vessel pattern by the third array substrate is etched into a dottle pin list
First vessel, including：Each dottle pin unit vessel pattern in the third array substrate is etched into one on its organic film
A dottle pin unit vessel, obtains the 4th array substrate.
Second aspect, provides a kind of display panel, and the display panel includes the preparation side according to the array substrate
Array substrate prepared by method.
The third aspect, provides a kind of display device, and the display device includes the display panel.
The advantageous effect that technical solution provided in an embodiment of the present invention is brought is：
The present invention in the fringe region that display can be caused the first array substrate of periphery yellowing phenomenon occur by forming
At least one reparation groups of vias pattern obtains the second array substrate, by all or part of reparation groups of vias on the second array substrate
Each of pattern repairs groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit vessel pattern of formation,
Third array substrate is obtained, each dottle pin unit vessel pattern in third array substrate, which is etched into a dottle pin unit, to be held
Chamber obtains the 4th array substrate, at least one dottle pin unit vessel is formed on the fringe region of the 4th array substrate, due to each
Dottle pin unit vessel pattern is corresponding with a dottle pin unit on color membrane substrates respectively, and each dottle pin unit is in third array substrate
On view field be located in its corresponding dottle pin unit vessel pattern so that by the 4th array substrate be applied to liquid crystal cell when,
Dottle pin unit corresponding with each dottle pin unit vessel pattern loses the impetus in the 4th array substrate and can not support
Four array substrates avoid display from the phenomenon that periphery jaundice occur to reduce the thickness of liquid crystal cell fringe region.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is the flow chart of the preparation method for the array substrate that one embodiment of the invention provides；
Fig. 2 is the structural schematic diagram for the first array substrate that further embodiment of this invention provides；
Fig. 3 is the structural schematic diagram for the 4th array substrate that further embodiment of this invention provides；
Fig. 4 is the use state diagram for the 4th array substrate that further embodiment of this invention provides；
Fig. 5 is the flow chart of the preparation method for the array substrate that further embodiment of this invention provides；
Fig. 6 is the structural schematic diagram for the 5th array substrate that further embodiment of this invention provides；
Fig. 7 is the structural schematic diagram for the 5th array substrate that further embodiment of this invention provides；
Fig. 8 is the use state diagram for the 5th array substrate that further embodiment of this invention provides.
Wherein：
1 first array substrate,
11 underlay substrates, 12 tft layers, 13 passivation layers, 14 organic films,
2 the 4th array substrates,
21 dottle pin unit vessels,
3 the 5th array substrates,
31 repair groups of vias, and 311 blur vias,
4 color membrane substrates,
5 dottle pin units.
Specific implementation mode
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Light emission side described in description of the embodiment of the present invention each means the display screen close to display and deviates from backlight mould
The side of block, fringe region refer to the non-display area for being located at display area periphery on display panel.
Embodiment one
As shown in Figure 1, an embodiment of the present invention provides a kind of preparation method of array substrate, the preparation side of the array substrate
Method includes：
In a step 101, the first array substrate is formed；
As shown in Fig. 2, in embodiments of the present invention, the first array substrate 1 includes underlay substrate 11, tft layer
12, pixel electrode (not shown), passivation layer 13 and organic film 14, tft layer 12 are formed in underlay substrate 11
Light emission side, pixel electrode are formed between the thin film transistor (TFT) of tft layer 12, and passivation layer 13 is formed in thin film transistor (TFT)
The light emission side and covering tft layer 12, organic film 14 of layer 12 are covered in the light emission side of passivation layer 13, pass through film crystalline substance
Thin film transistor (TFT) control in body tube layer 12 is deflected using the liquid crystal molecule in the liquid crystal cell of first array substrate 1.
In a step 102, at least one reparation groups of vias pattern is formed in the fringe region of the first array substrate light emission side
The second array substrate is obtained, each groups of vias pattern of repairing blurred sectional hole patterns including at least two.
In embodiments of the present invention, at least one reparation via is formed in the fringe region of the light emission side of the first array substrate
Organizing pattern is specially：Using illumination mask plate, illumination is carried out to the first array substrate for being coated with photoresist according to the first light exposure
Processing, forms at least one reparation groups of vias pattern with the fringe region in the first array substrate and obtains the second array substrate.More
Specifically, resist coating on the organic film in the first array substrate, forms photoresist layer, and illumination mask plate is equipped with and repaired
Illumination mask plate, is placed in the light emission side of photoresist layer by hole group pattern, is exposed according to first the first array substrate of light exposure pair,
Form the second array substrate.
In step 103, all or part of each of groups of vias pattern of repairing on the second array substrate was repaired
Hole group pattern include at least two blurred sectional hole patterns formed a dottle pin unit vessel pattern, obtain third array substrate,
Each dottle pin unit vessel pattern is corresponding with a dottle pin unit on color membrane substrates respectively, and each dottle pin unit is in third array
View field on substrate is located in its corresponding dottle pin unit vessel pattern.
In embodiments of the present invention, all or part of each of groups of vias pattern of repairing on the second array substrate is repaiied
It answers groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit vessel pattern of formation, obtain third array base
Plate is specially：Using illumination mask plate, photo-irradiation treatment is carried out to the second array substrate according to the second light exposure, by the second array
All or part of each of groups of vias pattern of repairing on substrate repairs at least two virtualization vias that groups of vias pattern includes
Pattern forms a dottle pin unit vessel pattern, obtains third array substrate, and the second light exposure is more than the first light exposure.More specifically
Ground keeps illumination mask plate to be located on the second array substrate, is exposed to the second array substrate according to the second light exposure, second
All or part of each of groups of vias pattern of repairing in array substrate repairs at least two void that groups of vias pattern includes
Change sectional hole patterns and is linked to be a dottle pin unit vessel pattern.
At step 104, each dottle pin unit vessel pattern in third array substrate is etched into a dottle pin unit
Vessel obtains the 4th array substrate.
In embodiments of the present invention, each dottle pin unit vessel pattern in third array substrate is etched into a dottle pin
Unit vessel, obtaining the 4th array substrate is specially：Each dottle pin unit vessel pattern in third array substrate is had at it
It is etched into a dottle pin unit vessel in machine film layer, obtains the 4th array substrate.More specifically, being carried out to third array substrate
After development operation, by etching so that the neighboring area of third array substrate forms at least one dottle pin unit vessel, the is obtained
Four array substrates, wherein the structural schematic diagram of the 4th array substrate as shown in figure 3, illustrated in conjunction with Fig. 4, it is at least one every
Single pad member vessel 21 is formed on the organic film 14 of the 4th array substrate 2, wherein at least one dottle pin unit vessel 21
Each dottle pin unit vessel 21 is corresponding with a dottle pin unit 5 on color membrane substrates 4, dottle pin corresponding with dottle pin unit vessel 21
Projection of the unit 5 in the 4th array substrate 2 is located in dottle pin unit vessel 21, uses 4th gust provided in an embodiment of the present invention
When row substrate 2, due to the presence of dottle pin unit vessel 21, dottle pin unit corresponding with dottle pin unit vessel 21 5 is in the 4th array
Impetus is lost on substrate 2 and is suspended on the light emission side of dottle pin unit vessel 21, the 4th array substrate 2 can not be supported, to subtract
The distance between small 4th array substrate 2 and color membrane substrates 3.
The present invention in the fringe region that display can be caused the first array substrate of periphery yellowing phenomenon occur by forming
At least one reparation groups of vias pattern obtains the second array substrate, by all or part of reparation groups of vias on the second array substrate
Each of pattern repairs groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit vessel pattern of formation,
Third array substrate is obtained, each dottle pin unit vessel pattern in third array substrate, which is etched into a dottle pin unit, to be held
Chamber obtains the 4th array substrate, at least one dottle pin unit vessel is formed on the fringe region of the 4th array substrate, due to each
Dottle pin unit vessel pattern is corresponding with a dottle pin unit on color membrane substrates respectively, and each dottle pin unit is in third array substrate
On view field be located in its corresponding dottle pin unit vessel pattern so that by the 4th array substrate be applied to liquid crystal cell when,
Dottle pin unit corresponding with each dottle pin unit vessel pattern loses the impetus in the 4th array substrate and can not support
Four array substrates avoid display from the phenomenon that periphery jaundice occur to reduce the thickness of liquid crystal cell fringe region.
Embodiment two
As shown in figure 5, an embodiment of the present invention provides a kind of preparation method of array substrate, this method includes：
In step 201, the first array substrate is formed.
As shown in Fig. 2, in embodiments of the present invention, the first array substrate 1 includes underlay substrate 11, tft layer
12, pixel electrode (not shown), passivation layer 13 and organic film 14, tft layer 12 are formed in underlay substrate 11
Light emission side, pixel electrode are formed between the thin film transistor (TFT) of tft layer 12, and passivation layer 13 is formed in thin film transistor (TFT)
The light emission side and covering tft layer 12, organic film 14 of layer 12 are covered in the light emission side of passivation layer 13, pass through film crystalline substance
Thin film transistor (TFT) control in body tube layer 12 is deflected using the liquid crystal molecule in the liquid crystal cell of first array substrate 1.
In step 202, at least one reparation groups of vias pattern is formed in the fringe region of the first array substrate light emission side,
The second array substrate is obtained, each groups of vias pattern of repairing blurred sectional hole patterns including at least two.
In embodiments of the present invention, at least one reparation via is formed in the fringe region of the light emission side of the first array substrate
Group pattern is specifically, the light emission side in the first array substrate forms one layer of organic film, and on the organic film of the array substrate
Resist coating forms photoresist layer, will be placed in the light emission side of photoresist layer equipped with the illumination mask plate for repairing groups of vias pattern, according to the
One the first array substrate of light exposure pair is exposed, and forms the second array substrate.
In step 203, all or part of each of groups of vias pattern of repairing on the second array substrate was repaired
Hole group pattern is etched into reparation groups of vias, obtains the 5th array substrate, and each groups of vias of repairing includes at least two virtualization vias.
As shown in fig. 6, and illustrate in conjunction with Fig. 7 and Fig. 8, in embodiments of the present invention, the second array substrate is carried out
Development and etching operation, obtain the 5th array substrate 3, the fringe region of the 5th array substrate 3 is formed at least one repaired
Hole group 31, it includes at least two virtualization vias 311 that each of at least one reparation groups of vias 31, which repairs groups of vias 31,.By the 5th
One on the correspondence color membrane substrates 4 of groups of vias 31 is repaired when array substrate 3 is applied to display, each of in the 5th array substrate 3
A dottle pin unit 5, the corresponding reparation groups of vias 31 of each dottle pin unit 5 contact.
Specifically, the dottle pin unit 5 on color membrane substrates 4 is usually cylindrical structure, in embodiments of the present invention, Mei Gexiu
Each of at least two virtualization vias 311 that multiple groups of vias 31 includes virtualization via 311 is that diameter is less than and the reparation
The circular hole of the diameter of 31 corresponding dottle pin unit 5 of hole group, it is each to repair in at least two virtualization vias 311 that groups of vias 31 includes
Any two virtualization via 311 between the corresponding dottle pin unit 5 in interval contact, namely each groups of vias 31 of repairing is wrapped
At least two included blur the corresponding dottle pin unit 5 of vias 311 and contact, so that the dottle pin unit 5 can support the 5th
After array substrate 3 namely the 5th array substrate 3 and color membrane substrates 4 are to box, dottle pin unit 5 can be to blur between via 311
Between be divided into support, keep the distance between the 5th array substrate 3 and color membrane substrates 4.
Certainly, skilled person will appreciate that, the cross-sectional shape of dottle pin unit 5 be alternatively rectangular, triangle etc. other
Polygon or ellipse, and the size of each cross sectional dimensions for repairing at least two virtualization vias 311 that groups of vias 31 includes
It is located at the reparation groups of vias 31 packet with projection of the dottle pin unit corresponding with the reparation groups of vias 31 5 in the 5th array substrate 3
Subject on all virtualization vias 311 included, ensure it is each repair at least two virtualization vias 311 that groups of vias 31 includes and its
Corresponding dottle pin unit 5 contacts.
In embodiments of the present invention, it is preferable that each to repair in at least two virtualization vias 311 that groups of vias 31 includes
The distance between two neighboring virtualization via 311 is 3 to 3.5 microns, avoids the two neighboring virtualization via under the first light exposure
Pattern is connected to, it is preferable that the distance between two neighboring virtualization via 311 is 3 microns.And in embodiments of the present invention, adjacent
Two reparation the distance between groups of vias 31 be more than the adjacent virtualization via 311 of any two in every group of reparation groups of vias 31 it
Between distance, avoid making a difference between two neighboring reparation groups of vias 31 in exposure process.
Certainly, skilled person will appreciate that, due to the distance between the array substrate of fringe region and color membrane substrates 4 with
The severity that periphery yellowing phenomenon occurs in display is closely bound up, therefore in this application, at least one reparation groups of vias 31
N (N=2,3,4 ... ...) secondary exposure group can be divided into, each exposure group includes at least one reparation groups of vias 31, and n-th exposes
The distance between two neighboring virtualization via 311 that each of reparation groups of vias 31 that group includes repairs groups of vias 31 is more than the
Each of reparation groups of vias 31 that N-1 exposure group includes is repaired between the two neighboring virtualization via 311 of groups of vias 31
Distance, if N is equal to 3, each of at least one reparation groups of vias 31 that first time exposure group includes repairs the phase of groups of vias 31
The distance between adjacent two virtualizations via 311 is 3 microns, at least one reparation groups of vias 31 that second of exposure group includes
The distance between each two neighboring virtualization via 311 for repairing groups of vias 31 is 3.2 microns, third time exposure group include to
It is micro- for 3.4 that each of few reparation groups of vias 31 repairs the distance between two neighboring virtualization via 311 of groups of vias 31
Rice.The pattern at least one reparation groups of vias 31 that first time exposure group includes forms dottle pin unit vessel under the second light exposure
The pattern for the reparation groups of vias that pattern, second of exposure group and third time exposure group include is in the light exposure higher than the second light exposure
Lower formation dottle pin unit vessel pattern, staff periphery jaundice can occur now according to the 5th array substrate 3 applied to display
The light exposure that the severity selection of elephant is needed by first time exposure group, second of exposure group or third time exposure group is exposed
Light, when the light exposure needed by third time exposure group is exposed, first time exposure group, second of exposure group and third time expose
The pattern for the reparation groups of vias that light group includes is respectively formed whole reparations on dottle pin unit vessel pattern namely the second array substrate
Each of groups of vias pattern repairs groups of vias pattern includes at least two and blurred sectional hole patterns and be respectively formed dottle pin unit vessel
Pattern, when the light exposure needed by second of exposure group is exposed, first time exposure group and second of exposure group include
It repairs each reparation groups of vias pattern of groups of vias pattern includes at least two and blurred sectional hole patterns and be respectively formed dottle pin unit
Vessel pattern, but each of the reparation groups of vias pattern that third time exposure group includes repairs groups of vias pattern includes at least two
A sectional hole patterns that blurred will not form dottle pin unit vessel pattern, when the light exposure needed according to first time exposure group is exposed
When, each of reparation groups of vias pattern that first time exposure group includes is repaired groups of vias pattern includes at least two and was blurred
Sectional hole patterns formed dottle pin unit vessel pattern, but second of exposure group and third time exposure group include reparation groups of vias pattern in
Each of repair groups of vias pattern includes at least two and blurred sectional hole patterns and will not form dottle pin unit vessel pattern, by second
Even if the light exposure that light exposure and first time exposure group that secondary exposure group needs need is exposed on also the second array substrate
Part repair groups of vias pattern each repair groups of vias pattern include at least two blurred sectional hole patterns formation one every
Single pad member vessel pattern, obtains the situation of third array substrate.
Certainly, skilled person will appreciate that, each of groups of vias pattern is repaired to the part on the second array substrate
It repairs groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit vessel pattern of formation, obtain third array
Substrate may be, by using illumination mask plate so that part repairs each of groups of vias pattern and repairs groups of vias pattern packet
At least two included blurred sectional hole patterns and form a dottle pin unit vessel pattern, obtained third array substrate.
In step 204, one group of display is formed, each display in one group of display includes the 5th array base
Plate.
In embodiments of the present invention, since array substrate and color membrane substrates once complete box, array substrate and color film base
The structure of plate can not all change, and before display produces completion input detection, those skilled in the art can not learn foundation
Whether the display that a certain design drawing is produced will appear the phenomenon that periphery jaundice.Therefore in embodiments of the present invention, pass through elder generation
It includes the display of the 5th array substrate to judge whether the 5th array substrate can cause display periphery hair occur to produce one group
Yellow phenomenon, it is poised for battle to realize by adjusting the light exposure in exposure process then based on the design of the 5th array substrate
The improvement of the structure of row substrate, it is easy to operate, and production cost is relatively low.
In step 205, whether predetermined threshold value is reached according to the display number for occurring periphery jaundice in one group of display,
Judge whether the 5th array substrate can result in display and periphery yellowing phenomenon occur；
If so, thening follow the steps 206；
If it is not, then no longer executing step 206, the 5th array substrate is used directly for display.
In embodiments of the present invention, it will be understood by those skilled in the art that being the phenomenon that periphery jaundice occurs in display
When being caused by array substrate, there is the probability of periphery yellowing phenomenon up to a hundred percent, but array substrate and color membrane substrates are to box
In the process, the operation error of staff may also change the distance between array substrate and color membrane substrates of fringe region, be
Avoid because occur the quantity of periphery yellowing phenomenon reach absolutely due to misjudgment passes through one group in embodiments of the present invention
Occurs the quantity of periphery yellowing phenomenon in display to judge whether the 5th array substrate can cause display periphery jaundice occur
The phenomenon that.Such as, the quantity of one group of display is 10, if the quantity for the display of periphery yellowing phenomenon occur is more than 8, you can
Judge that the 5th array substrate can cause display periphery yellowing phenomenon occur, wherein the size of predetermined threshold value can be according to work
Make the product yield of personnel's converted products to determine.
The present invention is by before forming third array substrate, first judging whether the 5th array substrate can cause display to go out
It the phenomenon that existing periphery jaundice, if the 5th array substrate will not cause display the phenomenon that periphery jaundice occur, is subsequently giving birth to
The 5th array substrate can be used directly in the display of production, if the 5th array substrate can cause display periphery jaundice occur
Phenomenon then cannot be used continuously the 5th array substrate in the display of subsequent production, and need to carry out the second array substrate
It improves, to ensure that display can normally be shown, avoids display will not being caused periphery yellowing phenomenon occur in the 5th array substrate
Under the premise of develop the 4th array substrate, draw a snake and add feet to it, wasting manpower and material resources.And according to the display for periphery yellowing phenomenon occur
Quantity judge whether the 5th array substrate can cause display the phenomenon that periphery jaundice occur, judging result is more accurate.
In step 206, it at least two was blurred repair that groups of vias pattern includes each of on the second array substrate
Sectional hole patterns form a dottle pin unit vessel pattern, obtain third array substrate, each dottle pin unit vessel pattern respectively with coloured silk
A dottle pin unit in ilm substrate corresponds to, and it is corresponding that view field of each dottle pin unit in third array substrate is located at its
In dottle pin unit vessel pattern.
In embodiments of the present invention, at least two void for including by reparation groups of vias pattern each of on the second array substrate
Changed sectional hole patterns and form a dottle pin unit vessel pattern, obtaining third array substrate is specially：Illumination mask plate is kept to be located at
On the second array substrate, the second array substrate is exposed according to the second light exposure, the second light exposure is more than the first light exposure,
Reparation groups of vias pattern includes each of on the second array substrate at least two blurred sectional hole patterns and are linked to be a dottle pin list
First vessel pattern.
The present invention forms the second array substrate and third array substrate by same illumination mask plate, is exposed by adjusting
Amount is easy to operate to change the pattern being formed in array substrate, substantially reduces production cost.
In step 207, each dottle pin unit vessel pattern in third array substrate is etched into a dottle pin unit
Vessel obtains the 4th array substrate.
In embodiments of the present invention, each dottle pin unit vessel pattern in third array substrate is etched into a dottle pin
Unit vessel, obtaining the 4th array substrate is specially：After carrying out development operation to third array substrate, by etching so that the
The neighboring area of three array substrates forms at least one dottle pin unit vessel, obtains the 4th array substrate.
Wherein, it shown in structural representation Fig. 3 of the 4th array substrate, is illustrated in conjunction with Fig. 4, wherein the 4th array substrate 2
Structural schematic diagram as shown in figure 3, being illustrated in conjunction with Fig. 4, at least one dottle pin unit vessel 21 is formed in the 4th array base
On the organic film 14 of plate 2, wherein each dottle pin unit vessel 21 at least one dottle pin unit vessel 21 and color membrane substrates
A dottle pin unit 5 on 4 corresponds to, projection of the dottle pin unit corresponding with dottle pin unit vessel 21 5 in the 4th array substrate 2
In dottle pin unit vessel 21, when using four array substrate 2 provided in an embodiment of the present invention, due to dottle pin unit vessel 21
Presence, dottle pin unit corresponding with dottle pin unit vessel 21 5 loses impetus in the 4th array substrate 2 and is suspended on dottle pin
The light emission side of unit vessel 21 can not support the 4th array substrate 2, to reduce between the 4th array substrate 2 and color membrane substrates 3
Distance.
Wherein, it will be understood by those skilled in the art that the dottle pin unit 5 that can support the 4th array substrate 2 density
Higher position, the 4th array substrate 2 and the distance between color membrane substrates 4 are bigger, in order to ensure to locate at various locations the 4th gust
The distance between row substrate 2 and color membrane substrates 4 are consistent, and dottle pin unit vessel 21 is uniform along the fringe region of the 4th array substrate 2
Distribution.
Certainly, it will be understood by those skilled in the art that the light emission side in organic film 14 is also formed with passivation layer 13, and it is blunt
Change the inner wall that layer 13 covers organic film 14 and dottle pin unit vessel 21.
Embodiment three
An embodiment of the present invention provides a kind of display panel, which includes by embodiment one or embodiment two
Array substrate prepared by the preparation method of the array substrate.
The present invention in the fringe region that display can be caused the first array substrate of periphery yellowing phenomenon occur by forming
At least one reparation groups of vias pattern obtains the second array substrate, by all or part of reparation groups of vias on the second array substrate
Each of pattern repairs groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit vessel pattern of formation,
Third array substrate is obtained, each dottle pin unit vessel pattern in third array substrate, which is etched into a dottle pin unit, to be held
Chamber obtains the 4th array substrate, at least one dottle pin unit vessel is formed on the fringe region of the 4th array substrate, due to each
Dottle pin unit vessel pattern is corresponding with a dottle pin unit on color membrane substrates respectively, and each dottle pin unit is in third array substrate
On view field be located in its corresponding dottle pin unit vessel pattern so that by the 4th array substrate be applied to liquid crystal cell when,
Dottle pin unit corresponding with each dottle pin unit vessel pattern loses the impetus in the 4th array substrate and can not support
Four array substrates avoid display from the phenomenon that periphery jaundice occur to reduce the thickness of liquid crystal cell fringe region.
Example IV
An embodiment of the present invention provides a kind of display device, which includes the display surface described in embodiment three
Plate.
The present invention in the fringe region that display can be caused the first array substrate of periphery yellowing phenomenon occur by forming
At least one reparation groups of vias pattern obtains the second array substrate, by all or part of reparation groups of vias on the second array substrate
Each of pattern repairs groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit vessel pattern of formation,
Third array substrate is obtained, each dottle pin unit vessel pattern in third array substrate, which is etched into a dottle pin unit, to be held
Chamber obtains the 4th array substrate, at least one dottle pin unit vessel is formed on the fringe region of the 4th array substrate, due to each
Dottle pin unit vessel pattern is corresponding with a dottle pin unit on color membrane substrates respectively, and each dottle pin unit is in third array substrate
On view field be located in its corresponding dottle pin unit vessel pattern so that by the 4th array substrate be applied to liquid crystal cell when,
Dottle pin unit corresponding with each dottle pin unit vessel pattern loses the impetus in the 4th array substrate and can not support
Four array substrates avoid display from the phenomenon that periphery jaundice occur to reduce the thickness of liquid crystal cell fringe region.
The embodiments of the present invention are for illustration only, can not represent the quality of embodiment.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent replacement, improvement and so on should all be included in the protection scope of the present invention.
Claims (11)
1. a kind of preparation method of array substrate, which is characterized in that the preparation method of the array substrate includes：
Form the first array substrate；
At least one reparation groups of vias pattern, which is formed, in the fringe region of the first array substrate light emission side obtains the second array
Substrate, each groups of vias pattern of repairing blurred sectional hole patterns including at least two；
Include by all or part of each of groups of vias pattern reparation groups of vias pattern of repairing on the second array substrate
At least two blurred sectional hole patterns formed a dottle pin unit vessel pattern, obtain third array substrate, each dottle pin unit
Vessel pattern is corresponding with a dottle pin unit on color membrane substrates respectively, and each dottle pin unit is in the third array substrate
View field is located in its corresponding dottle pin unit vessel pattern；
Each dottle pin unit vessel pattern in the third array substrate is etched into a dottle pin unit vessel, obtains the 4th
Array substrate.
2. the method as described in claim 1, which is characterized in that all or part by the second array substrate is repaiied
Each of multiple groups of vias pattern repairs groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit of formation
Vessel pattern further includes before obtaining third array substrate：
It is etched into reparation groups of vias by groups of vias pattern is repaired each of on the second array substrate, obtains the 5th array base
Plate, each groups of vias of repairing includes at least two virtualization vias；
If the 5th array substrate can result in display and periphery yellowing phenomenon occurs, execute described by described second gust
Each of whole on row substrate or reparations groups of vias pattern that periphery jaundice region occur reparation groups of vias pattern includes
At least two blurred the step of sectional hole patterns form a dottle pin unit vessel pattern, obtain third array substrate.
3. method as claimed in claim 2, which is characterized in that all or part by the second array substrate is repaiied
Each of multiple groups of vias pattern repairs groups of vias pattern and is etched into reparation groups of vias, after obtaining the 5th array substrate, also wraps
It includes：
One group of display is formed, each display in one group of display includes the 5th array substrate；
If the display number for occurring periphery jaundice in one group of display reaches predetermined threshold value, it is determined that described 5th gust
Row substrate can result in display and periphery yellowing phenomenon occurs.
4. method as claimed in claim 2, which is characterized in that repair groups of vias each of in the 5th array substrate and correspond to
A dottle pin unit on the color membrane substrates, the corresponding reparation groups of vias contact of each dottle pin unit.
5. method as claimed in claim 2, which is characterized in that two neighboring blurring in at least two virtualizations via
The distance between hole is 3 to 3.5 microns.
6. method as claimed in claim 5, which is characterized in that the distance between described two neighboring virtualization via is 3 microns.
7. the method as described in claim 1, which is characterized in that described on the side of the first array substrate light emission side
Edge region forms at least one reparation groups of vias pattern and obtains the second array substrate, including：
Using illumination mask plate, photo-irradiation treatment is carried out to the first array substrate for being coated with photoresist according to the first light exposure, with
The fringe region of first array substrate forms at least one reparation groups of vias pattern, obtains the second array substrate.
8. the method for claim 7, which is characterized in that all or part by the second array substrate is repaiied
Each of multiple groups of vias pattern repairs groups of vias pattern includes at least two and blurred sectional hole patterns one dottle pin unit of formation
Vessel pattern obtains third array substrate, including：
Using the illumination mask plate, photo-irradiation treatment is carried out to the second array substrate according to the second light exposure, it will be described
All or part of each of groups of vias pattern of repairing on the second array substrate repairs groups of vias pattern includes at least two
It blurred sectional hole patterns and forms a dottle pin unit vessel pattern, and obtained third array substrate, second light exposure is more than described
First light exposure.
9. the method as described in claim 1, which is characterized in that each dottle pin unit by the third array substrate
Vessel pattern is etched into a dottle pin unit vessel, including：By each dottle pin unit vessel figure in the third array substrate
Case is etched into a dottle pin unit vessel on its organic film, obtains the 4th array substrate.
10. a kind of display panel, which is characterized in that the display panel includes according to any one of claim 1-9 claim
Array substrate prepared by the preparation method of the array substrate.
11. a kind of display device, which is characterized in that the display device includes display panel according to any one of claims 10.
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| KR20060075506A (en) * | 2004-12-28 | 2006-07-04 | 엘지.필립스 엘시디 주식회사 | Liquid crystal panel for liquid crystal display device and method of fabricating the same |
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