CN105914273B - A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof - Google Patents

A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof Download PDF

Info

Publication number
CN105914273B
CN105914273B CN201610301831.1A CN201610301831A CN105914273B CN 105914273 B CN105914273 B CN 105914273B CN 201610301831 A CN201610301831 A CN 201610301831A CN 105914273 B CN105914273 B CN 105914273B
Authority
CN
China
Prior art keywords
layer
type
layers
alinp
emitting diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610301831.1A
Other languages
Chinese (zh)
Other versions
CN105914273A (en
Inventor
王世俊
邢振远
李彤
董耀尽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HC Semitek Suzhou Co Ltd
Original Assignee
HC Semitek Suzhou Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HC Semitek Suzhou Co Ltd filed Critical HC Semitek Suzhou Co Ltd
Priority to CN201610301831.1A priority Critical patent/CN105914273B/en
Publication of CN105914273A publication Critical patent/CN105914273A/en
Application granted granted Critical
Publication of CN105914273B publication Critical patent/CN105914273B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system

Abstract

The invention discloses a kind of reddish yellow light-emitting diode epitaxial wafers and preparation method thereof, belong to technical field of semiconductors.Epitaxial wafer includes N-type substrate, N-type buffer layer, N-type reflecting layer, N-type limiting layer, electronic barrier layer, multiple quantum well layer, hole adjustment layer, p-type limiting layer, p-type current extending, p-type ohmic contact layer, electronic barrier layer includes AlGaInP layers and AlInP layers, hole adjustment layer includes the first sublayer and at least two layers of second sublayers, first sublayer is undoped AlInP layers, second sublayer includes the AlInP layers of p-type doping and undoped AlInP layers, and the doping concentration of the AlInP layers of p-type doping is less than the doping concentration of p-type limiting layer.The present invention delays electronics to reach multiple quantum well layer by electronic barrier layer, and hole adjustment layer makes hole be evenly distributed on the region for closing on multiple quantum well layer, increases the recombination probability of electrons and holes, improves the luminous efficiency of light emitting diode.

Description

A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of reddish yellow light-emitting diode epitaxial wafer and its preparation side Method.
Background technology
The light emitting diode (Light Emitting Diode, abbreviation LED) of the high brightness AlGaInP systems of reddish yellow light has Small, long lifespan, it is low in energy consumption the advantages that, in fields such as white light source, total colouring, traffic lights and city lighting engineerings It has broad application prospects.
AlGaInP LED epitaxial wafer includes N-type substrate from bottom to top, N-type buffer layer, N-type reflecting layer, N-type limiting layer, more Quantum well layer, p-type limiting layer, p-type current extending, p-type ohmic contact layer.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The volume and quality of electronics are respectively less than hole, therefore the mobility of electronics and migration rate are superior to hole, electronics Compound with hole is occurred mostly in adjacent to the region of p-type limiting layer, and luminous efficiency is relatively low.
Invention content
In order to solve the problems, such as that prior art luminous efficiency is relatively low, an embodiment of the present invention provides a kind of red Yellow light emittings two Pole pipe epitaxial wafer and preparation method thereof.The technical solution is as follows:
In a first aspect, an embodiment of the present invention provides a kind of reddish yellow light-emitting diode epitaxial wafer, the red Yellow light emitting Diode epitaxial slice includes N-type substrate and the N-type buffer layer being sequentially laminated in the N-type substrate, N-type reflecting layer, N-type Limiting layer, multiple quantum well layer, p-type limiting layer, p-type current extending, p-type ohmic contact layer, the reddish yellow light-emitting diode Epitaxial wafer further includes the electronic barrier layer being layered between the N-type limiting layer and the multiple quantum well layer and is layered in institute State the hole adjustment layer between multiple quantum well layer and the p-type limiting layer, the electronic barrier layer include AlGaInP layers and AlInP layers, the hole adjustment layer includes the first sublayer and at least two layers of second sublayers, and first sublayer is arranged described more On quantum well layer, first sublayer be undoped AlInP layers, second sublayer include p-type doping AlInP layers with it is non- The doping concentration of the AlInP layers of doping, the AlInP layers of the p-type doping is less than the doping concentration of the p-type limiting layer.
Optionally, AlGaInP layers of the thickness is 20~50nm.
Optionally, the thickness of the AlInP layers in the electronic barrier layer is 8~15nm.
Optionally, the thickness of first sublayer is 90~220nm.
Optionally, the number of plies of second sublayer is 2~9 layers.
Optionally, the thickness of the AlInP layers of the p-type doping is identical as the undoped thickness of AlInP layers.
Optionally, the thickness of the AlInP layers of the p-type doping is 10~20nm.
Optionally, the thickness of the undoped AlInP layers is 10~20nm.
Optionally, the impurity of the AlInP layers of the p-type doping is magnesium elements, the AlInP layers of the p-type doping Doping concentration is 10-17~5*10-17cm-3
Second aspect, an embodiment of the present invention provides a kind of reddish yellow light-emitting diode epitaxial wafers as described in relation to the first aspect Preparation method, the preparation method includes:
N-type buffer layer is formed in N-type substrate;
N-type reflecting layer is formed on the N-type buffer layer;
N-type limiting layer is formed on the N-type reflecting layer;
Electronic barrier layer is formed on the N-type limiting layer, the electronic barrier layer includes AlGaInP layers and AlInP layers;
Multiple quantum well layer is formed on the electronic barrier layer;
Hole adjustment layer is formed on the multiple quantum well layer, the hole adjustment layer includes the first sublayer and at least two layers Second sublayer, first sublayer are formed on the multiple quantum well layer, and first sublayer is undoped AlInP layers, institute The AlInP layers and undoped AlInP layers that the second sublayer includes p-type doping are stated, the doping of the AlInP layers of the p-type doping is dense Doping concentration of the degree less than the p-type limiting layer;
P-type limiting layer is formed in the hole adjustment layer;
P-type current extending is formed on the p-type limiting layer;
P-type ohmic contact layer is formed on the p-type current extending.
The advantageous effect that technical solution provided in an embodiment of the present invention is brought is:
By the way that electronic barrier layer is laminated between N-type limiting layer and multiple quantum well layer, electronics is delayed to reach multiple quantum well layer, Hole adjustment layer is laminated between multiple quantum well layer and p-type limiting layer so that hole, which is evenly distributed on, closes on multiple quantum well layer Region increases the recombination probability of electrons and holes, improves the luminous efficiency of light emitting diode.Meanwhile the doping of hole adjustment layer Concentration is relatively low, it is possible to prevente effectively from impurity is diffused into multiple quantum well layer and enhances the probability of non-radiative recombination.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings Attached drawing.
Fig. 1 is a kind of structural schematic diagram for reddish yellow light-emitting diode epitaxial wafer that the embodiment of the present invention one provides;
Fig. 2 a are N-type limiting layer, electronic barrier layer, multiple quantum well layer and the p-type limitation that the embodiment of the present invention one provides The energy band schematic diagram of layer;
Fig. 2 b are the distribution schematic diagrams of hole adjustment layer and p-type limiting layer doping concentration that the embodiment of the present invention one provides;
Fig. 3 is a kind of flow of the preparation method of reddish yellow light-emitting diode epitaxial wafer provided by Embodiment 2 of the present invention Figure.
Specific implementation mode
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention Formula is described in further detail.
Embodiment one
An embodiment of the present invention provides a kind of reddish yellow light-emitting diode epitaxial wafers, referring to Fig. 1, the reddish yellow light light-emitting diodes Pipe epitaxial wafer includes N-type substrate 1 and the N-type buffer layer 2 being sequentially laminated in N-type substrate 1, N-type reflecting layer 3, N-type limitation Layer 4, electronic barrier layer 5, multiple quantum well layer 6, hole adjustment layer 7, p-type limiting layer 8, p-type current extending 9, p-type Ohmic contact Layer 10.
In the present embodiment, N-type substrate 1 is GaAs substrates;N-type buffer layer 2 is GaAs layers;N-type reflecting layer 3 includes alternating The AlAs layers 31 and AlGaAs layers 32 of stacking;N-type limiting layer 4 is AlInP layers;Electronic barrier layer 5 includes 51 He of AlGaInP layers AlInP layers 52;Multiple quantum well layer 6 includes alternately stacked quantum well layer 61 and quantum barrier layer 62 (quantum well layer and quantum barrier layer The respectively different AlGaInP layers of Al components);Hole adjustment layer 7 includes the first sublayer 71 and at least two layers of second sublayers 72, the One sublayer 71 is undoped AlInP layers, and the second sublayer includes AlInP layer 72a and undoped the AlInP layers of p-type doping The doping concentration of 72b, the AlInP layers 72a of p-type doping are less than the doping concentration of p-type limiting layer 8;P-type limiting layer 8 is AlInP Layer;P-type current extending 9 is GaP layers;P-type ohmic contact layer 10 is GaP layers.
Fig. 2 a are the energy band schematic diagram of N-type limiting layer 4, electronic barrier layer 5, multiple quantum well layer 6 and p-type limiting layer 8. As shown in Figure 2 a, the energy band for the materials A lInP that N-type limiting layer 4, AlInP layers 52, p-type limiting layer 8 use is higher than AlGaInP layers 51 and the energy band of materials A lGaInP that uses of multiple quantum well layer 6, therefore part electronics can be blocked in by AlInP layers 52 In AlGaInP layers 51, electronics is delayed to reach multiple quantum well layer 6.
Fig. 2 b are the distribution schematic diagram of 8 doping concentration of hole adjustment layer 7 and p-type limiting layer.As shown in Figure 2 b, undoped AlInP layers, low-doped AlInP layers, highly doped AlInP layers doping concentration gradually increase, p-type doping AlInP layers 72a Doping concentration be less than p-type limiting layer 8 doping concentration, be conducive to hole injection hole adjustment layer 7;Consider that Mg's is easy simultaneously The AlInP layer 72a and undoped AlInP layers 72b of diffusivity, p-type doping is alternately laminated, hole can be made to be evenly distributed on sky In cave adjustment layer 7;In addition the first layer for closing on multiple quantum well layer 6 uses undoped AlInP layers, Mg can be prevented to be diffused into more Quantum well layer 6 causes non-radiative recombination.
Specifically, N-type substrate 1 can be biased to for 2 or 4 cun of 100 faces《111》A+5 ° of GaAs substrate.
Optionally, the thickness of N-type substrate 1 can be 340~360 μm.
Optionally, the impurity of N-type substrate 1 can be element silicon, and the doping concentration of N-type substrate 1 can be 10-18~ 2*10-18cm-3
Optionally, the thickness of N-type buffer layer 2 can be 150~250nm.When the thickness of N-type buffer layer is less than 150nm, The defect of N-type substrate 1 can not be covered;When the thickness of N-type buffer layer is more than 250nm, cause to waste.
Optionally, the impurity of N-type buffer layer 2 can be element silicon, and the doping concentration of N-type buffer layer 2 can be 10-18~2*10-18cm-3
Preferably, the doping concentration of N-type buffer layer 2 can be 10-18cm-3
Optionally, the impurity in N-type reflecting layer 3 can be element silicon, and the doping concentration in N-type reflecting layer 3 can be 2* 10-18~8*10-18cm-3.When the doping concentration in N-type reflecting layer 3 is less than 2*10-18cm-3When, forward voltage is higher;When N-type reflects The doping concentration of layer 3 is more than 8*10-18cm-3When, excessive impurity causes Quantum Well to send out photon equilibrium state, influences chip brightness.
In practical applications, AlAs layers 31 and AlGaAs layers 32 inject same amount of dopant, and doping concentration is different, AlAs The doping concentration of layer 31 is less than the doping concentration of AlGaAs layers 32.Specifically, the doping concentration of AlAs layers 31 is 2*10-18~ 4.5*10-18cm-3, the doping concentration of AlGaAs layers 32 is 4.5*10-18~8*10-18cm-3
Optionally, the sum of number of plies of AlAs layers 31 and AlGaAs layers 32 can be 30~60.
It is to be appreciated that the sum of number of plies of AlAs layers 31 and AlGaAs layers 32 mainly influences chip brightness.When AlAs layers 31 When reaching 60 with the number of plies of AlGaAs layers 32, the reflectivity of emergent light is essentially 100%, is further added by AlAs layers 31 and AlGaAs layers The sum of 32 number of plies can influence chip voltage without much effects.In practical applications, 31 He of AlAs layers The sum of the number of plies of AlGaAs layers 32 can be determined according to product requirement.
Optionally, the thickness of AlAs layers 31 can be 42~55nm.
Optionally, the thickness of AlGaAs layers 32 can be 40~50nm.
It should be noted that the thickness range of AlAs layers 31 and AlGaAs layers 32 is determined according to reflectance spectrum, it is more than upper It states range and does not have reflecting effect.In practical applications, specific thickness can be determined according to the wavelength of production product, different waves It is long to need different thickness.
Optionally, the impurity of N-type limiting layer 4 can be element silicon, and the doping concentration of N-type limiting layer 4 can be 7* 10-17~2*10-18cm-3
Optionally, the thickness of N-type limiting layer 4 can be 200~500nm.
Optionally, the thickness of AlGaInP layers 51 can be 20~50nm.When AlGaInP layers of thickness are less than 20nm, nothing Method effectively accommodates enough polyelectrons;When AlGaInP layers of thickness are more than 50nm, cause the electronics of recombination luminescence less.
Preferably, the thickness of AlGaInP layers 51 can be 35nm.
Optionally, the thickness of AlInP layers 52 can be 8~15nm.It, can not be effective when AlInP layers of thickness are less than 8nm Stop electron injection multiple quantum well layer;When AlInP layers of thickness are more than 15nm, the electronics of tunnelling is less, causes recombination luminescence Electronics it is few.
Preferably, the thickness of AlInP layers 52 can be 12nm.
Optionally, the thickness of quantum well layer 61 can be 3~5nm.
Optionally, the thickness of quantum barrier layer 62 can be 5~7nm.
Optionally, the thickness of the first sublayer 71 can be 90~220nm.When the thickness of the first sublayer is less than 90nm, mix The multiple quantum wells that impurity may be spread, causes non-radiative recombination, influences hole injection;When the thickness of the first sublayer is more than When 220nm, the hole for injecting multiple quantum well layer is less.
Preferably, the thickness of the first sublayer 71 can be 140nm.
In practical applications, the thickness of the first sublayer can be determined according to the number of plies and doping concentration of the second sublayer 72.
Optionally, the number of plies of the second sublayer 72 can be 2~9 layers.When the second sublayer 72 the number of plies be less than 2 layers, Wu Fayou The distribution in effect adjustment hole;When the number of plies of the second sublayer 72 is more than 9 layers, p-type limiting layer be injected into the hole of multiple quantum well layer compared with It is few.
Preferably, the number of plies of the second sublayer 72 can be 5~6 layers.
Optionally, the thickness of the AlInP layers 72a of p-type doping can be identical with the thickness of undoped AlInP layers 72b, has It is uniformly distributed conducive to hole.
Optionally, the thickness of the AlInP layers 72a of p-type doping can be 10~20nm.When the thickness of the AlInP layers of p-type doping When degree is less than 10nm, the distribution in hole can not be effectively adjusted;When adjustment layer thickness is more than 20nm when hole, the note in hole is influenced Enter.
Preferably, the thickness of the AlInP layers 72a of p-type doping can be 14nm.
Optionally, the thickness of undoped AlInP layers 72b can be 10~20nm.When the thickness of undoped AlInP layers When less than 10nm, the distribution in hole can not be effectively adjusted;When the thickness of undoped AlInP layers is more than 20nm, hole is influenced Injection.
Preferably, the thickness of undoped AlInP layers 72b can be 14nm.
Optionally, the impurity of the AlInP layers 72a of p-type doping can be magnesium elements, the AlInP layers 72a of p-type doping Doping concentration can be 10-17~5*10-17cm-3.When the doping concentration of the AlInP layers of p-type doping is less than 10-17cm-3When, nothing Method effectively adjusts the distribution in hole;When the doping concentration of the AlInP layers of p-type doping is more than 5*10-17cm-3When, cause impurity It is diffused into multiple quantum well layer and enhances the probability of non-radiative recombination.
Preferably, the doping concentration of the AlInP layers of p-type doping can be 3*10-17cm-3
Optionally, the impurity of p-type limiting layer 8 can be magnesium elements, and the doping concentration of p-type limiting layer 8 can be 7* 10-17~10-18cm-3
Optionally, the thickness of p-type limiting layer 8 can be 400~600nm.
Optionally, the impurity of p-type current extending 9 can be magnesium elements, the doping concentration of p-type current extending 9 Can be 2*10-18~8*10-18cm-3.When the doping concentration of p-type current extending is less than 2*10-18When, influence voltage;Work as p-type The doping concentration of current extending is more than 8*10-18cm-3When, lattice quality is poor, influences light emission luminance.
Optionally, the thickness of p-type current extending 9 can be 8~10 μm.When the thickness of p-type current extending is less than 8 μm When, influence current expansion;When the thickness of p-type current extending be more than 10 μm when, can cause epitaxial wafer angularity increase, cause as The adverse consequences such as film flying.
Optionally, the impurity of p-type ohmic contact layer 10 can be carbon, to realize higher doping concentration and fit Lower growth temperature is answered, the doping concentration of p-type ohmic contact layer 10 can be 3*10-19~10-20cm-3.When p-type Ohmic contact The doping concentration of layer is less than 3*10-19cm-3When, Ohmic contact is bad to cause voltage higher;When the doping of p-type ohmic contact layer is dense Degree is more than 10-20cm-3When, lattice quality is deteriorated.
Optionally, the thickness of p-type ohmic contact layer 10 can be 30~100nm.When the thickness of p-type ohmic contact layer is less than When 30nm, voltage is difficult to control;When the thickness of p-type ohmic contact layer is more than 100nm, brightness is influenced.
The embodiment of the present invention delays electronics to reach by the way that electronic barrier layer is laminated between N-type limiting layer and multiple quantum well layer To multiple quantum well layer, hole adjustment layer is laminated between multiple quantum well layer and p-type limiting layer so that hole, which is evenly distributed on, to be closed on The region of multiple quantum well layer increases the recombination probability of electrons and holes, improves the luminous efficiency of light emitting diode.Meanwhile hole The doping concentration of adjustment layer is relatively low, it is possible to prevente effectively from impurity is diffused into multiple quantum well layer and enhances the several of non-radiative recombination Rate.
Embodiment two
An embodiment of the present invention provides a kind of preparation method of reddish yellow light-emitting diode epitaxial wafer, it is suitable for preparing and implements The reddish yellow light-emitting diode epitaxial wafer that example one provides, referring to Fig. 3, which includes:
Step 201:N-type buffer layer is formed in N-type substrate.
In the present embodiment, N-type substrate is GaAs substrates;N-type buffer layer is GaAs layers.
Specifically, N-type substrate can be biased to for 2 or 4 cun of 100 faces《111》A+5 ° of GaAs substrate.
Optionally, the thickness of N-type substrate can be 340~360 μm.
Optionally, the impurity of N-type substrate can be element silicon, and the doping concentration of N-type substrate 1 can be 10-18~2* 10-18cm-3
Specifically, the growth conditions of N-type buffer layer can be:Growth temperature is 640~660 DEG C, TMGa (trimethyl gallium) Flow is 80~100sccm, AsH3(arsenic hydride) flow is 400~450sccm, and impurity is element silicon, and doping concentration is 10-18~2*10-18cm-3, thickness is 150~250nm.
Step 202:N-type reflecting layer is formed on N-type buffer layer.
In the present embodiment, N-type reflecting layer includes alternately stacked AlAs layers and AlGaAs layers.
Specifically, the growth conditions in N-type reflecting layer can be:Growth temperature be 640~660 DEG C, TMGa flows be 80~ 120sccm, TMAl (trimethyl aluminium) flow is 180~320sccm, AsH3Flow is 400~500sccm, AlAs layers of thickness For 42~55nm, AlGaAs layers of thickness is 40~50nm, and the sum of AlAs layers and AlGaAs layers number of plies is 30~60, and doping is miscellaneous Matter is element silicon, doping concentration 2*10-18~8*10-18cm-3
Step 203:N-type limiting layer is formed on N-type reflecting layer.
In the present embodiment, N-type limiting layer is AlInP layers.
Specifically, the growth conditions of N-type limiting layer can be:Growth temperature be 660~680 DEG C, TMAl flows be 100~ 120sccm, TMIn (trimethyl indium) flow is 800~850sccm, PH3Flow is 900~1100sccm, and impurity is silicon Element, doping concentration 7*10-17~2*10-18cm-3, thickness is 200~500nm.
Step 204:Electronic barrier layer is formed on N-type limiting layer.
In the present embodiment, electronic barrier layer includes AlGaInP layers and AlInP layers.
Specifically, the growth conditions of electronic barrier layer can be:Growth temperature is 660~680 DEG C, and TMIn flows are 800 ~850sccm, PH3Flow is 900~1100sccm;AlGaInP layers of TMAl flows are 6~35sccm, and TMGa flows are 26 ~40sccm;AlInP layers of TMAl flows are 100~120sccm;AlGaInP layers of thickness is 20~50nm, AlInP layers Thickness is 8~15nm.
Step 205:Multiple quantum well layer is formed on electronic barrier layer.
In the present embodiment, multiple quantum well layer includes alternately stacked quantum well layer and quantum barrier layer (quantum well layer and amount Sub- barrier layer is respectively the different AlGaInP layers of Al components).
Specifically, the growth conditions of quantum well layer can be:Growth temperature be 660~680 DEG C, TMGa flows be 26~ 40sccm, TMAl flow are 6~35sccm, and TMIn flows are 800~850sccm, PH3Flow is 900~1100sccm, thickness For 3~5nm.
The growth conditions of quantum barrier layer can be:Growth temperature is 660~680 DEG C, and TMGa flows are 5~18sccm, TMAl flows are 70~100sccm, and TMIn flows are 800~850sccm, PH3Flow be 900~1100sccm, thickness be 5~ 7nm。
Step 206:Hole adjustment layer is formed on multiple quantum well layer.
In the present embodiment, hole adjustment layer includes the first sublayer and at least two layers of second sublayers, and the first sublayer is non-mixes Miscellaneous AlInP layers, the second sublayer include the AlInP layers that the AlInP layers of p-type doping are adulterated with undoped AlInP layers, p-type Doping concentration is less than the doping concentration of p-type limiting layer.
Specifically, the growth conditions of hole adjustment layer can be:Growth temperature is 660~680 DEG C, and TMAl flows are 100 ~120sccm, TMIn flow are 800~850sccm, PH3Flow is 900~1100sccm, the thickness of the first sublayer is 90~ The number of plies of 220nm, the second sublayer are 2~9 layers, and the thickness of the AlInP layers of p-type doping is 10~20nm, undoped AlInP layers Thickness be 10~20nm, p-type doping AlInP layers impurity be magnesium elements, p-type adulterate AlInP layers doping it is dense Degree is 10-17~5*10-17cm-3
Step 207:P-type limiting layer is formed in the adjustment layer of hole.
In the present embodiment, p-type limiting layer is AlInP layers.
Specifically, the growth conditions of p-type limiting layer can be:Growth temperature be 660~680 DEG C, TMAl flows be 100~ 120sccm, TMIn flow are 800~850sccm, PH3Flow is 900~1100sccm, and impurity is magnesium elements, and doping is dense Degree is 7*10-17~10-18cm-3, thickness is 400~600nm.
Step 208:P-type current extending is formed on p-type limiting layer.
In the present embodiment, p-type current extending is GaP layers.
Specifically, the growth conditions of p-type current extending can be:Growth temperature is 690~710 DEG C, and TMGa flows are 400~600sccm, PH3Flow is 200~500sccm, and impurity is magnesium elements, doping concentration 2*10-18~8*10- 18cm-3, thickness is 8~10 μm.
Step 209:P-type ohmic contact layer is formed on p-type current extending.
In the present embodiment, p-type ohmic contact layer is GaP layers.
Specifically, the growth conditions of p-type ohmic contact layer can be:Growth temperature is 630~650 DEG C, and TMGa flows are 400~600sccm, PH3Flow is 200~500sccm, and impurity is carbon, doping concentration 3*10-19~10-20cm-3, thickness is 30~100nm.
The embodiment of the present invention delays electronics to reach by the way that electronic barrier layer is laminated between N-type limiting layer and multiple quantum well layer To multiple quantum well layer, hole adjustment layer is laminated between multiple quantum well layer and p-type limiting layer so that hole, which is evenly distributed on, to be closed on The region of multiple quantum well layer increases the recombination probability of electrons and holes, improves the luminous efficiency of light emitting diode.Meanwhile hole The doping concentration of adjustment layer is relatively low, it is possible to prevente effectively from impurity is diffused into multiple quantum well layer and enhances the several of non-radiative recombination Rate.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all the present invention spirit and Within principle, any modification, equivalent replacement, improvement and so on should all be included in the protection scope of the present invention.

Claims (10)

1. a kind of reddish yellow light-emitting diode epitaxial wafer, the reddish yellow light-emitting diode epitaxial wafer includes N-type substrate, Yi Jiyi The secondary N-type buffer layer being layered in the N-type substrate, N-type reflecting layer, N-type limiting layer, multiple quantum well layer, p-type limiting layer, p-type Current extending, p-type ohmic contact layer, which is characterized in that the reddish yellow light-emitting diode epitaxial wafer further includes being layered in institute It states the electronic barrier layer between N-type limiting layer and the multiple quantum well layer and is layered in the multiple quantum well layer and the p-type Hole adjustment layer between limiting layer, the electronic barrier layer include AlGaInP layers and AlInP layers, the hole adjustment layer packet The first sublayer and at least two layers of second sublayers are included, first sublayer is arranged on the multiple quantum well layer, first sublayer For undoped AlInP layers, second sublayer includes that the AlInP layers of p-type doping and undoped AlInP layers, the p-type are mixed The doping concentration of miscellaneous AlInP layers is less than the doping concentration of the p-type limiting layer.
2. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that AlGaInP layers of the thickness Degree is 20~50nm.
3. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that in the electronic barrier layer AlInP layers of thickness is 8~15nm.
4. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that the thickness of first sublayer For 90~220nm.
5. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that the number of plies of second sublayer It is 2~9 layers.
6. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that the AlInP of the p-type doping The thickness of layer is identical as the undoped thickness of AlInP layers.
7. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that the AlInP of the p-type doping The thickness of layer is 10~20nm.
8. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that the undoped AlInP The thickness of layer is 10~20nm.
9. reddish yellow light-emitting diode epitaxial wafer according to claim 1, which is characterized in that the AlInP of the p-type doping The impurity of layer is magnesium elements, and the doping concentration of the AlInP layers of the p-type doping is 10-17~5*10-17cm-3
10. a kind of preparation method of such as claim 1-9 any one of them reddish yellow light-emitting diode epitaxial wafers, feature exist In the preparation method includes:
N-type buffer layer is formed in N-type substrate;
N-type reflecting layer is formed on the N-type buffer layer;
N-type limiting layer is formed on the N-type reflecting layer;
Electronic barrier layer is formed on the N-type limiting layer, the electronic barrier layer includes AlGaInP layers and AlInP layers;
Multiple quantum well layer is formed on the electronic barrier layer;
Hole adjustment layer is formed on the multiple quantum well layer, the hole adjustment layer includes the first sublayer and at least two layers second Sublayer, first sublayer are formed on the multiple quantum well layer, and first sublayer is undoped AlInP layers, and described the Two sublayers include the AlInP layers of p-type doping and undoped AlInP layers, and the doping concentration of the AlInP layers of the p-type doping is small In the doping concentration of the p-type limiting layer;
P-type limiting layer is formed in the hole adjustment layer;
P-type current extending is formed on the p-type limiting layer;
P-type ohmic contact layer is formed on the p-type current extending.
CN201610301831.1A 2016-05-09 2016-05-09 A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof Active CN105914273B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610301831.1A CN105914273B (en) 2016-05-09 2016-05-09 A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610301831.1A CN105914273B (en) 2016-05-09 2016-05-09 A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof

Publications (2)

Publication Number Publication Date
CN105914273A CN105914273A (en) 2016-08-31
CN105914273B true CN105914273B (en) 2018-07-31

Family

ID=56748548

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610301831.1A Active CN105914273B (en) 2016-05-09 2016-05-09 A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof

Country Status (1)

Country Link
CN (1) CN105914273B (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107331746A (en) * 2017-05-12 2017-11-07 华灿光电(浙江)有限公司 The epitaxial wafer and preparation method of a kind of light emitting diode
CN108091736B (en) * 2017-10-20 2019-07-02 华灿光电(浙江)有限公司 A kind of LED epitaxial slice and its manufacturing method
CN108831975B (en) * 2018-04-28 2020-04-07 华灿光电(苏州)有限公司 Light emitting diode epitaxial wafer and preparation method thereof
CN109346583B (en) * 2018-08-31 2021-04-27 华灿光电(浙江)有限公司 Light emitting diode epitaxial wafer and preparation method thereof
CN111554782B (en) * 2020-03-04 2021-08-17 江苏第三代半导体研究院有限公司 Light emitting diode and method for manufacturing the same
CN115763657A (en) * 2020-07-27 2023-03-07 中国科学院半导体研究所 GaN-based LED epitaxial structure for visible light communication and preparation method thereof
CN113161454B (en) * 2021-03-23 2022-09-06 北京创盈光电医疗科技有限公司 Epitaxial structure of red and yellow light chip for phototherapy and preparation method
WO2023279241A1 (en) * 2021-07-05 2023-01-12 重庆康佳光电技术研究院有限公司 Led chip, led array and electronic device
CN114284409B (en) * 2022-03-08 2022-05-24 江西兆驰半导体有限公司 Light emitting diode and preparation method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103236480A (en) * 2013-04-28 2013-08-07 华灿光电股份有限公司 LED (light emitting diode) epitaxial wafer and manufacture method thereof
CN103474539A (en) * 2013-09-25 2013-12-25 湘能华磊光电股份有限公司 Method for epitaxial growth of LED structure containing superlattice layers and LED structure
CN104576855A (en) * 2013-10-28 2015-04-29 首尔伟傲世有限公司 Near ultraviolet light emitting device
CN205004348U (en) * 2014-07-29 2016-01-27 首尔伟傲世有限公司 Ultraviolet ray emitting diode

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100868530B1 (en) * 2006-12-04 2008-11-13 한국전자통신연구원 Nitride Semiconductors Based Light Emitting Devices
KR102086547B1 (en) * 2013-02-13 2020-05-28 삼성디스플레이 주식회사 Organic light emitting diode comprising the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103236480A (en) * 2013-04-28 2013-08-07 华灿光电股份有限公司 LED (light emitting diode) epitaxial wafer and manufacture method thereof
CN103474539A (en) * 2013-09-25 2013-12-25 湘能华磊光电股份有限公司 Method for epitaxial growth of LED structure containing superlattice layers and LED structure
CN104576855A (en) * 2013-10-28 2015-04-29 首尔伟傲世有限公司 Near ultraviolet light emitting device
CN205004348U (en) * 2014-07-29 2016-01-27 首尔伟傲世有限公司 Ultraviolet ray emitting diode

Also Published As

Publication number Publication date
CN105914273A (en) 2016-08-31

Similar Documents

Publication Publication Date Title
CN105914273B (en) A kind of reddish yellow light-emitting diode epitaxial wafer and preparation method thereof
US9842963B2 (en) GaN-based LED epitaxial structure and preparation method thereof
TWI436495B (en) Nitride-based light emitting device
CN106611808B (en) A kind of growing method of LED epitaxial slice
CN105103309A (en) Ultraviolet light-emitting device
CN106711299B (en) A kind of epitaxial wafer of light emitting diode and preparation method thereof
CN108461592A (en) A kind of LED epitaxial slice and its manufacturing method
CN106025023B (en) A kind of yellowish green light-emitting diode and preparation method thereof
TW201717429A (en) Semiconductor light-emitting device
CN113224214B (en) Red light emitting diode epitaxial wafer and preparation method thereof
CN104465898B (en) Growing method of light-emitting diode epitaxial wafer and light emitting diode epitaxial wafer
CN104733582A (en) Nitride led structure with double graded electron blocking layer
CN115863501B (en) Light-emitting diode epitaxial wafer and preparation method thereof
CN106887494A (en) The epitaxial wafer and its manufacture method of a kind of light emitting diode
CN104362237B (en) The growing method and light emitting diode of a kind of light emitting diode
KR20140002910A (en) Near uv light emitting device
CN105514239A (en) Light-emitting diode
CN104900778A (en) Growing method of epitaxial wafer of light emitting diode and epitaxial wafer
CN111326622A (en) Light-emitting diode based on hole adjusting layer
CN111326626A (en) Semiconductor light-emitting device capable of improving hole transmission capacity
CN102157647A (en) Nitride LED structure and preparation method thereof
CN115241337A (en) Light emitting diode
CN107546305A (en) A kind of GaN base light emitting epitaxial structure
CN110416376B (en) Semiconductor heterojunction light-emitting chip capable of directly emitting white light
KR102444467B1 (en) light emitting diode

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant