CN105897376A - Testing method and apparatus for decoding performance of decoder - Google Patents
Testing method and apparatus for decoding performance of decoder Download PDFInfo
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- CN105897376A CN105897376A CN201610184358.3A CN201610184358A CN105897376A CN 105897376 A CN105897376 A CN 105897376A CN 201610184358 A CN201610184358 A CN 201610184358A CN 105897376 A CN105897376 A CN 105897376A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
- H04L1/0048—Decoding adapted to other signal detection operation in conjunction with detection of multiuser or interfering signals, e.g. iteration between CDMA or MIMO detector and FEC decoder
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/1607—Details of the supervisory signal
- H04L1/1657—Implicit acknowledgement of correct or incorrect reception, e.g. with a moving window
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- Computer Networks & Wireless Communication (AREA)
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- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
The embodiment of the invention provides a testing method and apparatus for a decoding performance of a decoder. The method comprises: a testing tool sends a testing code source to a decoder and thus the decoder carries out decoding on the testing code source, wherein the testing code source includes a sample code source and a correct message code and the sample code source may cause failed decoding of the decoder; the testing tool obtains decoding time and a decoding result of decoding on the testing code source by the decoder; and the testing tool determines the decoding performance of the decoder according to the decoding time and the decoding result. According to the embodiment of the invention, the interference-included testing code source is sent to the decoder by the testing tool, so that the decoder carries out decoding on the interference-included testing code source; and the testing tool determines the decoding performance of the decoder based on the decoding time and the decoding result of the testing tool. Therefore, testing on the decoding performance of the decoder is realized under the circumstance that the code source is under interference.
Description
Technical field
The present embodiments relate to communication technical field, particularly relate to a kind of decoder decoding performance test side
Method and device.
Background technology
Nowadays responder system is applied widely in the railway system, and it includes ground installation and vehicle-mounted
Equipment, BTM is the nucleus equipment in mobile unit, and the Core Feature of BTM is decoding, concrete, BTM
Decoder TA signal that BTM is received be decoded.It has been investigated that the decoding performance of decoder is direct
It is related to the vulnerability to jamming of BTM and the F-Zero of the train of application BTM.
The decoding performance of decoder specifically can be from the standpoint of two: 1) the decoding time, refer to decoding
Device starts to the time finally solving legal user's message from receiving a correct frame message code source, and
The decoding time, the shortest decoding performance was the best；2) the shortest code source length that can decode, when code source is all
In the case of code, i.e. code source are not affected by interference, the shortest code source length that can decode of long message is 1100
Position, the shortest code source length that can decode of short message is 462, but, it is interfered at Ma Yuan
In the case of, the shortest code source length that can decode of long message is more than 1100, short message the shortest
The code source length that can decode more than 462, if the shortest code source length that can decode is too big, will
Cause decoder not decode, deadlock state occurs.
Prior art, uses large-scale simulator that BTM complete machine carries out functional test, or only in code source not
The decoding performance of decoder is tested in the case of being interfered, but, at the scene under test environment, code source
The decoding performance of decoder can be caused to reduce by various interference, and prior art lacks
In the case of Ma Yuan is interfered, the method that the decoding performance of decoder is tested.
Summary of the invention
The embodiment of the present invention provides a kind of decoder decoding performance method of testing and device, to realize at Ma Yuan
In the case of being interfered, the method that the decoding performance of decoder is tested.
One aspect of the embodiment of the present invention is to provide a kind of decoder decoding performance method of testing, including:
Test fixture sends test patterns source to decoder, so that described test patterns source is carried out by described decoder
Decoding, it is described that described test patterns source includes that sample code source and correct message code, described sample code source may result in
Decoder decoding is unsuccessful；
Described test fixture obtains the decoding time reconciliation that described test patterns source is decoded by described decoder
Code result；
Described test fixture determines the decoding of described decoder according to described decoding time and described decoded result
Performance.
Another aspect of the embodiment of the present invention is to provide a kind of decoder decoding performance test device, including:
Sending module, for sending test patterns source to decoder, so that described decoder is to described test patterns
Source is decoded, and described test patterns source includes that sample code source and correct message code, described sample code source can be led
Cause the decoding of described decoder unsuccessful；
Acquisition module, for obtain decoding time that described test patterns source is decoded by described decoder and
Decoded result；
Analyze module, for determining the solution of described decoder according to described decoding time and described decoded result
Code performance.
The embodiment of the present invention provide decoder decoding performance method of testing and device, by test fixture to
Decoder sends and carries noisy test patterns source, so that decoder test patterns noisy to this band source is carried out
Decoding, the decoding time of test fixture foundation decoder and decoded result determine the decoding performance of decoder,
Achieve in the case of a yard source is interfered, the method that the decoding performance of decoder is tested.
Accompanying drawing explanation
The decoder decoding performance method of testing flow chart that Fig. 1 provides for the embodiment of the present invention；
The schematic diagram in the test patterns source that Figure 1A provides for the embodiment of the present invention；
The decoder decoding performance method of testing flow chart that Fig. 2 provides for another embodiment of the present invention；
Fig. 3 show decoder in the embodiment of the present invention and performs the flow chart of decoding task and other tasks；
The decoder decoding performance method of testing flow chart that Fig. 4 provides for another embodiment of the present invention；
The schematic diagram in the test patterns source that Fig. 5 provides for the embodiment of the present invention；
The structure chart of the test system that Fig. 6 provides for another embodiment of the present invention；
The structure chart of the decoder decoding performance test device that Fig. 7 provides for the embodiment of the present invention；
The structure chart of the decoder decoding performance test device that Fig. 8 provides for another embodiment of the present invention.
Detailed description of the invention
The decoder decoding performance method of testing flow chart that Fig. 1 provides for the embodiment of the present invention；Figure 1A is this
The schematic diagram in the test patterns source that inventive embodiments provides.The embodiment of the present invention lacks in prior art
Code is in the case of source is interfered, the method testing the decoding performance of decoder, it is provided that decoding
Device decoding performance method of testing, the method specifically comprises the following steps that
Step S101, test fixture send test patterns source to decoder, so that described decoder is to described survey
Examination code source is decoded, and described test patterns source includes sample code source and correct message code, described sample code source
May result in the decoding of described decoder unsuccessful；
The executive agent of the embodiment of the present invention is test fixture, and this test fixture can automatically generate test patterns
Source, test patterns source is stored in caching with lasting baud rate 564K, and decoder passes through sliding window from caching
Middle read test code source, the size of sliding window is the test patterns that decoder performs a decoding task process
The length scale in source, the test patterns source in the embodiment of the present invention includes sample code source and correct message code, should
Sample code source may result in described decoder and decodes unsuccessful, i.e. this sample code source is the code source being disturbed, by
Under test environment at the scene, the code source that decoder receives can be by various interference, in order to simulate
Interference, the embodiment of the present invention automatically generates the code source being disturbed i.e. sample code source by test fixture, and
The added behind some correct message code in sample code source, as shown in Figure 1A, interval 11 belong to un-decodable
District, the code source in un-decodable district is sample code source, and interval 12 belong to decodable code district, in decodable code district
Code source is correct message code, and some C is error code position.
Described test patterns source is decoded by the embodiment of the present invention by this decoder, determines this decoder energy
When being enough correctly decoded, total number of the correct message code that sample code source is added behind, this correct message code
Total number i.e. reflects the performance of this decoder.
Step S102, described test fixture obtain the solution that described test patterns source is decoded by described decoder
Code time and decoded result；
In the embodiment of the present invention, after test patterns source is sent to this decoder by test fixture, test fixture
Record delivery time, after this test fixture receives the decoded result that this decoder returns, test fixture
Recording the time of reception, test fixture passes through delivery time and i.e. would know that the solution of described decoder the time of reception
The code time；Or, record time of reception when decoder receives test patterns source, note when generating decoded result
Record decoding finish time, this decoder can calculate the decoding time by the time of reception and decoding finish time,
And this decoding time is sent to this test fixture.
Step S103, described test fixture determine described solution according to described decoding time and described decoded result
The decoding performance of code device.
In embodiments of the present invention, decoded result may include that and decodes unsuccessfully mark, successfully decoded mark
Or the test test patterns source after successfully decoded.
The embodiment of the present invention sends the noisy test patterns source of band by test fixture to decoder, so that solving
Code device test patterns noisy to this band source be decoded, test fixture according to decoder the decoding time and
Decoded result determines the decoding performance of decoder, it is achieved that in the case of code source is interfered, to decoder
The decoding performance method that carries out testing.
The decoder decoding performance method of testing flow chart that Fig. 2 provides for another embodiment of the present invention；Fig. 3
It show decoder in the embodiment of the present invention and perform the flow chart of decoding task and other tasks.Real at Fig. 1
On the basis of executing example correspondence, the concrete step of the decoder decoding performance method of testing that the embodiment of the present invention provides
Rapid as follows:
Step S201, test fixture generate multiple test case libraries, and described test case library includes that test is used
Example；
It is illustrated in figure 3 decoder in the embodiment of the present invention and performs the flow process of decoding task and other tasks
Figure, specifically comprises the following steps that
Step 21, decoder pass through sliding window readout code source；
In embodiments of the present invention, the code that code source device the most to be decoded processes is stored in lasting baud rate 564K
In caching, decoder is by sliding window readout code source from caching, and the size of sliding window is decoder
Perform the length scale in the code source of a decoding task process.
Step 22, decoder judge that whether the length in code source is more than n+r bit；The most then perform step
24, otherwise, perform step 23；
If the message before Xie Ma is long message, then n=1023, r=77；If the message before Xie Ma is short message,
Then n=341, r=121.
Step 23, sliding window increase code source；
Circulation perform step 21,22,23, until the length in code source is more than n+r bit.
Step 24, decoder carry out CRC check to code source；
Step 25, decoder judge whether CRC check is passed through；The most then execution step 27, otherwise,
Perform step 26；
Step 26, sliding window move n1 position, and return step 21；
Such as, before this step, sliding window has 1100 bit code sources, then new after the 1100th bit code source
Add untreated code source, n1 position, meanwhile, the code source of the 1st to the n-th 1 is removed this sliding window
Mouthful, if the code source processed in Huan Cun is arranged in front, after untreated code source is arranged in, then this step
Process be equivalent to sliding window size keep constant on the premise of slided backward n1 position.
Step 27, decoder carry out n+r verification to code source；
Step 28, judge n+r verification whether pass through, the most then perform step 30, otherwise, perform step
Rapid 29；
Step 29, sliding window move n2 position, and return step 21；
In like manner in step 26, here is omitted.
Synchronization value is detected in code source by step 30, decoder；
Step 31, decoder judge that synchronization value is the most legal；The most then perform step 33, otherwise, hold
Row step 32；
Step 32, sliding window move n3 position, and return step 21；
Step 33, decoder carry out legitimacy verification to code source；
Step 34, decoder judge whether that all bits are the most legal；The most then execution step 36, otherwise,
Perform step 35；
Step 35, sliding window move n4 position, and return step 21；
Step 36, decoder check code source, the need of reversion, if desired invert, then invert；
Control bit in step 37, decoder check code source；
Step 38, decoder judge that control bit is the most legal；The most then perform step 40, otherwise, hold
Row step 39；
Step 39, sliding window move n5 position, and return step 21；
Step 40, decoder carry out inversion and descrambling to code source, obtain legal message and reversion position；
Step 41, sliding window move n6 position, and return step 21.
As it is shown on figure 3, the decoding task that decoder performs includes multiple subtask, it is preferred that the present invention
Embodiment provides 6 steps, concrete, step 21-26 is as first subtask of decoding task
The first step, step 27-29 is second step, step 30-32 as second subtask of decoding task
The 3rd subtask as decoding task is the 3rd step, and step 33-35 is as the 4th of decoding task the
Individual subtask is the 4th step, and step 36-39 is the 5th step as the 5th subtask of decoding task,
Step 40 is the 6th step as the 6th subtask of decoding task.
This step S201, the detailed process that test fixture generates multiple test case libraries is as follows:
1) first test case library making the first step in Fig. 3 not pass through is generated
If owing to there being an arbitrary bit code to make mistakes in the code source of CRC check, then CRC check will not be passed through,
Therefore long message being specially to the message of 1100, this message of 1100 includes the check bit of 77
R, this message of 1100 is represented by N+R=1023+77, as long as there being an arbitrary bit code to go out in 1023
Mistake, then CRC check will not be passed through, and therefore, for long message, first test case library includes N=1023
Individual test case, concrete, the 1st test case is that the 1st bit code of this long message is made mistakes, the 2nd
Test case is that the 2nd bit code of this long message is made mistakes ..., n-th test case is this long message
N bit code is made mistakes.
Short message being specially to the message of 462, this message of 462 includes check bit R of 121,
This message of 462 is represented by N+R=341+121, as long as 341 there being an arbitrary bit code make mistakes,
Then CRC check will not be passed through, and therefore, for short message, first test case library includes N=341
Test case, concrete, the test case of short message is similar with the test case of long message, the most no longer
Repeat.
2) second test case library making second step in Fig. 3 not pass through is generated
If source code passes through first step CRC check, then N position occurring, the probability of mistake is almost 0, sets up
Mainly consider the impact on this decoder of the mistake in R position during second test case library, and R position connects
Continuous error bit is the most, then the impact on this decoder is the biggest, and therefore, second test case library is according to R
In Wei, the figure place of continuous error bit determines, concrete, and this second test case library divides 4 kinds of situations to consider:
The first situation: 7500 front decodable codes of source code, source code is long message, second test case library
Including the test case that figure place is 1 of error bit continuous in R position, in R position, the figure place of continuous error bit is 2
Test case ..., the test case that figure place is R of continuous error bit, N=1023, R=77 in R position.
The second situation: 7500 front decodable codes of source code, source code is short message, second test case library
Including the test case that figure place is 1 of error bit continuous in R position, in R position, the figure place of continuous error bit is 2
Test case ..., the test case that figure place is R of continuous error bit, N=341, R=121 in R position.
The third situation: decodable code after source code 7500, source code is long message, second test case library
Including the test case that figure place is 1 of error bit continuously in the R position of long message N+R position after 7500,7500
The test case that figure place is 2 of continuous error bit in the R position of long message N+R position after Wei ..., 7500
The test case that figure place is R of continuous error bit, N=1023, R=77 in the R position of long message N+R position after Wei.
4th kind of situation: decodable code after source code 7500, source code is short message, second test case library
Including the test case that figure place is 1 of error bit continuously in the R position of long message N+R position after 7500,7500
The test case that figure place is 2 of continuous error bit in the R position of long message N+R position after Wei ..., 7500
The test case that figure place is R of continuous error bit, N=341, R=121 in the R position of long message N+R position after Wei.
3) the 3rd test case library making second step in Fig. 3 not pass through is generated
3rd test case library includes following test case:
Test case 1: 3 frame S1 messages of repetition are as long message；
Test case 2:S6 message is as short message；
Test case 3: full 0 code；
Test case 4: all-ones；
Test case 5: each 11 are the same from code, 1,023 1 circulations.
4) the 4th test case library making second step in Fig. 3 not pass through is generated
4th test case library includes following test case:
Test case 9:S7 message is as long message；
5) the 5th test case library making second step in Fig. 3 not pass through is generated
5th test case library includes following test case:
Test case 10:S3 message is as long message；
Test case 11:S5 message is as long message；
Test case 12:S4 message is as short message.
6) the 6th test case library making second step in Fig. 3 not pass through is generated
6th test case library includes following test case:
Test case: the long message that can be correctly decoded；
Test case: the short message that can be correctly decoded；
By above-mentioned 1)-6) obtain 6 different test case libraries, each test case library afterwards
All include test case.
Step S202, described test fixture are according to described Test cases technology test patterns source；
In embodiments of the present invention, described test fixture can be controlled operation by operator, if operator
This encoder of pretest performs the decoding performance of the first step, then operator control test fixture to this decoding
Device sends the test case in first test case library, and this test case can be N bit data, with this
N bit data is a cycle period, generates with the cyclic code that N bit data is a cycle period, and this follows
Ring code is as the test patterns source in the embodiment of the present invention.
If it addition, this encoder of operator's pretest performs the decoding performance of second step, then by test
Frock sends the test case in second test case library to this decoder, the like test this coding
The decoding performance of several steps after device execution.
Step S203, test fixture send test patterns source to decoder, so that described decoder is according to described
Test patterns source performs decoding task；
Described decoding task includes that multiple subtask, described test patterns source include sample code source and correct message
Code, it is unsuccessful that described sample code source may result in the decoding of described decoder；Described test case library and described son
Task one_to_one corresponding, the described test case in described test case library may result in described decoder and performs institute
State subtask failure.
Step S204, described test fixture obtain the solution that described test patterns source is decoded by described decoder
Code time and decoded result；
Step S205, described test fixture determine described solution according to described decoding time and described decoded result
The decoding performance of code device.
The embodiment of the present invention is by setting up multiple test case library, and test case library performs with decoder respectively
The subtask one_to_one corresponding that includes of decoding task, the test case in test case library may result in decoder
Subtasking failure, can ensure decoder by the decoding performance of substantial amounts of testing case decoder
Decoding performance be greatly improved.
The decoder decoding performance method of testing flow chart that Fig. 4 provides for another embodiment of the present invention；Fig. 5
Schematic diagram for the test patterns source that the embodiment of the present invention provides.On the basis of the embodiment that Fig. 2 is corresponding,
Specifically comprising the following steps that of the decoder decoding performance method of testing that the embodiment of the present invention provides
Step S301, test fixture generate multiple test case libraries, and described test case library includes that test is used
Example；
This step is consistent with step S201, and here is omitted.
Step S302, described test fixture are according to described Test cases technology test patterns source；
Described sample code source is the code source after at least two test case merges, and said two test case is divided
Not from different described test case libraries.
In embodiments of the present invention, this encoder of the most measurable examination of operator performs the first step and successively
The decoding performance of two steps, then operator control test fixture to the transmission of this decoder by first test use
The code source that test case in example storehouse and the combination of the test case in second test case library are constituted.
It addition, operator can also test this encoder performs the first step, second step and the 3rd step successively
Decoding performance, then operator control test fixture to this decoder send by first test case library
In test case, the test case in second test case library and the survey in the 3rd test case library
The code source that example combination on probation is constituted.
In order to improve the performance of this decoder, it is also possible to first test case library of autotelic combination,
Two test case libraries, the 3rd test case library, the 4th test case library, the 5th test cases
The code source that test case in storehouse is constituted.
Or, operator can also test this encoder perform discontinuous step decoding performance, such as,
Test this encoder and perform the first step and the decoding performance of the 3rd step, then operator control test fixture to
This decoder sends by the survey in the test case in first test case library and the 3rd test case library
The code source that example combination on probation is constituted；The method of testing of the decoding performance of remaining discontinuous step is in like manner in this.
As it is shown in figure 5, interval 51 belong to un-decodable district, the code source in un-decodable district is sample code source,
Sample code source is made up of multiple test cases, and interval 52 belong to decodable code district, and the code source in decodable code district is
Correct message code, some C is error code position.Compared to Figure 1A, the code source in interval 51 is by multiple surveys
Example on probation is constituted, and the code source in interval 11 is made up of single test case.
Step S303, test fixture send test patterns source to decoder, so that described decoder is according to described
Test patterns source performs decoding task；
Step S304, described test fixture obtain the solution that described test patterns source is decoded by described decoder
Code time and decoded result；
If the described decoded result of step S305 represents described decoder, decoding is unsuccessful, the most described test work
Dress increases the figure place of correct message code in described test patterns source and obtains new test patterns source, so that described decoding
Device is to described new test patterns source successfully decoded；
When test patterns source is decoded unsuccessful by decoder, test fixture increases in described test patterns source correct
The figure place of message code, concrete, as shown in Figure 1A and Fig. 5, continue after decodable code district 12 or 52
The continuous figure place increasing correct message code obtains new test patterns source, so that being continued in new test patterns source by decoder
Continuous decoding, if decoding is the most unsuccessful, then test fixture continues to increase the figure place of correct message code, directly
Can be to new test patterns source successfully decoded to decoder.
Step S306, determine the figure place of described correct message code according to described decoded result；
When assuming decoder to new test patterns source successfully decoded, the correct message code that test fixture increases
Total number of figure place is M.
If the step S307 described decoding time is in preset time range and the position of described correct message code
Number is less than presetting figure place, it is determined that the decoding performance of described decoder is up to standard.
Due to the figure place of decoding time, the time of being successfully decoded correct message code be decoder decoding performance two
Individual performance indications, if the decoding time, in preset time range and figure place M of described correct message code was little
In default figure place, then illustrate that the decoding performance of this decoder is up to standard.
If figure place M of described correct message code is more than presetting figure place, then needs that decoder is carried out this and enter,
This method entered can include following method: reduces described decoder and performs appointing outside described decoding task
The time of business；Reduce described decoder and perform the time of each subtask.
The embodiment of the present invention is surveyed by the test case in different test case libraries is combined obtain combination
Example on probation, is combined test, further increases the performance of decoder decoder.
The structure chart of the test system that Fig. 6 provides for another embodiment of the present invention.As shown in Figure 6, test
System includes test fixture 61, decoder 62 and computer 63, wherein, test fixture 61 and decoder
62 connect, and test fixture 61 is connected with computer 63, and key zone is available for operator's operation, by behaviour
Make human users's button and generate key-press input signal, the corresponding different test pattern of different buttons, this
Test pattern in bright embodiment includes single test case pattern and combined test use-case pattern, concrete
Compound mode is consistent with above-described embodiment.Controller sends control according to key-press input signal to code source transmitter
Signal processed, control signal includes test pattern and test case identification number, stores above-mentioned reality in memorizer
Executing the test case library described in example, it is right that code source transmitter obtains from memorizer according to test case identification number
The test case answered, according to this Test cases technology test patterns source, and is sent to decoding by this test patterns source
Device 62, concrete, code source transmitter first sends a commencing signal to decoder 62, so that decoder
62 carry out the preparation receiving follow-up test code source, after code source transmitter has sent a commencing signal, start
Sending test patterns source, this test patterns source can be sent by two kinds of forms, and a kind of form is simulation code source,
Another kind of form is digital code source, test patterns source send form be differently depending on that decoder 62 supports connect
Receive code source different, i.e. the test fixture 61 of the embodiment of the present invention disclosure satisfy that the demand of different decoder 62.
It addition, controller analog peripheral can send request signal by district to be measured interface to decoder 62, decoding
Device 62 sends answer signal according to this request signal to controller, and decoder 62 decodes it result and sends
To controller, such as, the sequence in test patterns source during decoding whether success, successfully decoded, test be
Which subtask of decoding task, testing time, decoding time etc..Test fixture 61 also has display screen,
This display screen button in display button district.The decoded result that decoder 62 also can be returned by controller
Form test report, this test report is sent to computer 63 by output port, in order to computer 63
Test report is carried out storage display, analyzes for operator.
The embodiment of the present invention sends the noisy test patterns source of band by test fixture to decoder, so that solving
Code device test patterns noisy to this band source be decoded, test fixture according to decoder the decoding time and
Decoded result determines the decoding performance of decoder, it is achieved that in the case of code source is interfered, to decoder
The decoding performance method that carries out testing.
The structure chart of the decoder decoding performance test device that Fig. 7 provides for the embodiment of the present invention.The present invention
The test work that the decoder decoding performance test device that embodiment provides is specifically as follows in above-described embodiment
Dress, the decoder decoding performance test device that the embodiment of the present invention provides can perform decoder decoding performance
The handling process that method of testing embodiment provides, as it is shown in fig. 7, decoder decoding performance test device 70
Including sending module 71, acquisition module 72 and analysis module 73, wherein, sending module 71 is for solution
Code device sends test patterns source, so that described test patterns source is decoded by described decoder, described test patterns
It is unsuccessful that source includes that sample code source and correct message code, described sample code source may result in the decoding of described decoder；
The decoding time that described test patterns source is decoded by acquisition module 72 for obtaining described decoder conciliates
Code result；Analyze module 73 for determining described decoder according to described decoding time and described decoded result
Decoding performance.
The embodiment of the present invention sends the noisy test patterns source of band by test fixture to decoder, so that solving
Code device test patterns noisy to this band source be decoded, test fixture according to decoder the decoding time and
Decoded result determines the decoding performance of decoder, it is achieved that in the case of code source is interfered, to decoder
The decoding performance method that carries out testing.
The structure chart of the decoder decoding performance test device that Fig. 8 provides for another embodiment of the present invention.?
On the basis of above-described embodiment, decoder decoding performance test device 70 also includes that test case library generates mould
Block 74 and test patterns source generation module 75, wherein, test case library generation module 74 is used for generating multiple
Test case library, described test case library includes test case；Test patterns source generation module 75 is for basis
Described Test cases technology test patterns source.
Described sample code source is the code source after at least two test case merges, and said two test case is divided
Not from different described test case libraries.
Decoder decoding performance test device 70 also includes processing module 76, and processing module 76 is for described
Decoded result represents when the decoding of described decoder is unsuccessful, increases correct message code in described test patterns source
Figure place obtains new test patterns source, so that described decoder is to described new test patterns source successfully decoded.
Analyze module 73 specifically for determining the figure place of described correct message code according to described decoded result；If
The described decoding time in preset time range and described correct message code figure place less than preset figure place,
Then determine that the decoding performance of described decoder is up to standard.
The decoder decoding performance test device that the embodiment of the present invention provides can be specifically for performing above-mentioned figure
1 embodiment of the method provided, here is omitted for concrete function.
The embodiment of the present invention is by setting up multiple test case library, and test case library performs with decoder respectively
The subtask one_to_one corresponding that includes of decoding task, the test case in test case library may result in decoder
Subtasking failure, can ensure decoder by the decoding performance of substantial amounts of testing case decoder
Decoding performance be greatly improved；By the test case in different test case libraries is combined acquisition group
Close test case, decoder is combined test, further increases the performance of decoder.
In sum, the embodiment of the present invention sends the noisy test patterns of band by test fixture to decoder
Source, so that decoder test patterns noisy to this band source is decoded, test fixture is according to decoder
Decoding time and decoded result determine the decoding performance of decoder, it is achieved that in the case of code source is interfered,
The method that the decoding performance of decoder is tested；By setting up multiple test case library, test case
The subtask one_to_one corresponding that the decoding task that storehouse performs with decoder respectively includes, the survey in test case library
Example on probation may result in the failure of decoder subtasking, by the solution of substantial amounts of testing case decoder
Code performance can ensure that the decoding performance of decoder is greatly improved；By by the test in different test case libraries
Use-case is combined obtaining combined test use-case, decoder is combined test, further increases solution
The performance of code device.
In several embodiments provided by the present invention, it should be understood that disclosed apparatus and method,
Can realize by another way.Such as, device embodiment described above is only schematically,
Such as, the division of described unit, it is only a kind of logic function and divides, actual can have additionally when realizing
Dividing mode, the most multiple unit or assembly can in conjunction with or be desirably integrated into another system, or
Some features can be ignored, or does not performs.Another point, shown or discussed coupling each other or
Direct-coupling or communication connection can be the INDIRECT COUPLING by some interfaces, device or unit or communication link
Connect, can be electrical, machinery or other form.
The described unit illustrated as separating component can be or may not be physically separate, makees
The parts shown for unit can be or may not be physical location, i.e. may be located at a place,
Or can also be distributed on multiple NE.Can select according to the actual needs part therein or
The whole unit of person realizes the purpose of the present embodiment scheme.
It addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit,
Can also be that unit is individually physically present, it is also possible to two or more unit are integrated in a list
In unit.Above-mentioned integrated unit both can realize to use the form of hardware, it would however also be possible to employ hardware adds software
The form of functional unit realizes.
The above-mentioned integrated unit realized with the form of SFU software functional unit, can be stored in a computer
In read/write memory medium.Above-mentioned SFU software functional unit is stored in a storage medium, including some fingers
Make with so that a computer equipment (can be personal computer, server, or the network equipment etc.)
Or processor (processor) performs the part steps of method described in each embodiment of the present invention.And it is aforementioned
Storage medium include: USB flash disk, portable hard drive, read only memory (Read-Only Memory, ROM),
Random access memory (Random Access Memory, RAM), magnetic disc or CD etc. are various permissible
The medium of storage program code.
Those skilled in the art are it can be understood that arrive, for convenience and simplicity of description, only with above-mentioned respectively
The division of functional module is illustrated, and in actual application, can above-mentioned functions be divided as desired
Join and completed by different functional modules, the internal structure of device will be divided into different functional modules, with
Complete all or part of function described above.The specific works process of the device of foregoing description is permissible
With reference to the corresponding process in preceding method embodiment, do not repeat them here.
Last it is noted that various embodiments above is only in order to illustrate technical scheme, rather than right
It limits；Although the present invention being described in detail with reference to foregoing embodiments, this area common
Skilled artisans appreciate that the technical scheme described in foregoing embodiments still can be modified by it,
Or the most some or all of technical characteristic is carried out equivalent；And these amendments or replacement, and
The essence not making appropriate technical solution departs from the scope of various embodiments of the present invention technical scheme.
Claims (10)
1. a decoder decoding performance method of testing, it is characterised in that including:
Test fixture sends test patterns source to decoder, so that described test patterns source is decoded by described decoder, it is unsuccessful that described test patterns source includes that sample code source and correct message code, described sample code source may result in the decoding of described decoder；
Described test fixture obtains decoding time and the decoded result that described test patterns source is decoded by described decoder；
Described test fixture determines the decoding performance of described decoder according to described decoding time and described decoded result.
Method the most according to claim 1, it is characterised in that before described test fixture sends test patterns source to decoder, also include:
Test fixture generates multiple test case libraries, and described test case library includes test case；
Described test fixture is according to described Test cases technology test patterns source；
Described test patterns source is decoded by described decoder, including:
Described decoder performs decoding task according to described test patterns source, and described decoding task includes multiple subtask；
Wherein, described test case library and described subtask one_to_one corresponding, the described test case in described test case library may result in described decoder and performs the failure of described subtask.
Method the most according to claim 2, it is characterised in that described sample code source is the code source after at least two test case merges, and said two test case is respectively from different described test case libraries.
Method the most according to claim 3, it is characterised in that after described test fixture obtains described decoder decoding time of being decoded described test patterns source and decoded result, also include:
If described decoded result represents described decoder, decoding is unsuccessful, and the most described test fixture increases the figure place of correct message code in described test patterns source and obtains new test patterns source, so that described decoder is to described new test patterns source successfully decoded.
Method the most according to claim 4, it is characterised in that described test fixture determines the decoding performance of described decoder according to described decoding time and described decoded result, including:
The figure place of described correct message code is determined according to described decoded result；
If the described decoding time in preset time range and described correct message code figure place less than preset figure place, it is determined that the decoding performance of described decoder is up to standard.
Described test fixture obtains described decoder and decodes decoding time and the decoded result in described second code source.
6. a decoder decoding performance test device, it is characterised in that including:
Sending module, for sending test patterns source to decoder, so that described test patterns source is decoded by described decoder, it is unsuccessful that described test patterns source includes that sample code source and correct message code, described sample code source may result in the decoding of described decoder；
Acquisition module, for obtaining decoding time and the decoded result that described test patterns source is decoded by described decoder；
Analyze module, for determining the decoding performance of described decoder according to described decoding time and described decoded result.
Decoder decoding performance the most according to claim 6 test device, it is characterised in that also include:
Test case library generation module, is used for generating multiple test case library, and described test case library includes test case；
Test patterns source generation module, for according to described Test cases technology test patterns source.
Decoder decoding performance the most according to claim 7 test device, it is characterised in that described sample code source is the code source after at least two test case merges, and said two test case is respectively from different described test case libraries.
Decoder decoding performance the most according to claim 8 test device, it is characterised in that also include:
Processing module, when described decoded result represents that the decoding of described decoder is unsuccessful, the figure place increasing correct message code in described test patterns source obtains new test patterns source, so that described decoder is to described new test patterns source successfully decoded.
Decoder decoding performance the most according to claim 9 test device, it is characterised in that described analysis module specifically for determining the figure place of described correct message code according to described decoded result；
If the described decoding time in preset time range and described correct message code figure place less than preset figure place, it is determined that the decoding performance of described decoder is up to standard.
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