CN105895707A - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereof Download PDFInfo
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- CN105895707A CN105895707A CN201510036944.9A CN201510036944A CN105895707A CN 105895707 A CN105895707 A CN 105895707A CN 201510036944 A CN201510036944 A CN 201510036944A CN 105895707 A CN105895707 A CN 105895707A
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Abstract
The embodiment of the invention provides a semiconductor device and a manufacturing method thereof. The semiconductor device comprises a substrate, a P-N junction formed in the substrate, and an electrode formed at the surface of the substrate, wherein, heavy metal atoms are introduced into the substrate, and the concentrations of the heavy metal atoms of the contact area between the substrate and the electrode and the junction area of the P-N junction are higher than that of the heavy metal atoms of other areas in the substrate. According to the embodiment of the invention, the semiconductor device with high switch speed and low positive voltage Vf can be formed.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly relate to a kind of semiconductor device and manufacture method thereof.
Background technology
Semiconductor device is widely used in electronic equipment.Fast recovery diode (Fast Recovery Diode, FRD)
A kind of semiconductor device with characteristics such as switching characteristic are good, reverse recovery time is short, be mainly used in Switching Power Supply,
In the electronic circuits such as pulse-width modulator (Pulse Width Modulator, PWM), converter, as high frequency
Commutation diode, fly-wheel diode or damper diode use.
Fig. 1 shows the structure of the fast recovery diode described in patent documentation 1 (the clear 63-119585A of TOHKEMY)
Schematic diagram, as it is shown in figure 1, have N+ diffusion layer 2 in the N-type substrate 1 of this fast recovery diode, serves as a contrast in N-type
The end, is formed p type diffused layer 3,3a, between p type diffused layer and N-type substrate, thus forms P-N junction, at N
The upper surface of type substrate 1 and the lower surface of N+ diffusion layer 2 are respectively formed with electrode 8a, 8b, and, this recovers soon
Diode also has gold diffusion district 6.
In patent documentation 1, by forming gold diffusion district 6, and control the degree of depth and shape, the energy of p type diffused layer
Enough reduce Trr reverse recovery time of fast recovery diode, forward voltage Vf and reverse leakage current Ir.
It should be noted that introduction to technical background above be intended merely to convenient technical scheme is carried out clear,
Complete explanation, and facilitate the understanding of those skilled in the art to illustrate.Can not be merely because these schemes be at this
Bright background section is set forth and thinks that technique scheme is known to those skilled in the art.
Summary of the invention
But, inventor finds, in patent documentation 1, the gold atom even concentration in gold diffusion district 6, this can lead
Send a telegraph the resistance between 8a and 8b of pole to increase, thus increase forward voltage Vf, and therefore, it is very difficult to reach both to improve out
Close speed, reduce again the effect of forward voltage Vf.
The embodiment of the present invention provides a kind of semiconductor device and manufacture method thereof, by adjusting heavy metal in Semiconductor substrate
Concentration distribution, the switching speed of semiconductor device can either be improved, forward voltage Vf can be reduced again.
First aspect according to the embodiment of the present application, it is provided that a kind of semiconductor device, this semiconductor device includes:
Substrate；It is formed at the P-N junction in described substrate；It is formed at the electrode of described substrate surface；Wherein, described lining
The end, is imported with heavy metal atom, and, the region of described substrate and described electrode contact and described P-N junction
The concentration of the described heavy metal atom in interface is higher than the concentration of the described heavy metal atom in other region in described substrate.
According to the second aspect of the embodiment of the present application, wherein, the region being imported with described heavy metal atom of described substrate
In, the concentration range of heavy metal atom is 1 × 1015atom/cm3-1×1017atom/cm3。
According to the third aspect of the embodiment of the present application, wherein, in the district being imported with described heavy metal atom of described substrate
In territory, described heavy metal atom replaces the semiconductor atom in described substrate.
According to the fourth aspect of the embodiment of the present application, wherein, described heavy metal atom be gold atom (Au) or platinum former
Son (Pt).
The 5th aspect according to the embodiment of the present application, wherein, the quantity of described electrode is 2, lays respectively at described lining
Two surfaces that the end is relative.
The 6th aspect according to the embodiment of the present application, wherein, also has field limiting ring (Field Limiting in described substrate
Ring, FLR), described field limiting ring is around described P-N junction.
The 7th aspect according to the embodiment of the present application, it is provided that the manufacture method of a kind of semiconductor device, the method includes:
Form P-N junction in the substrate；
Heavy metal atom is imported in described substrate；
Electrode is formed at described substrate surface；
Wherein, described substrate is former with the described heavy metal in the interface of the region of described electrode contact and described P-N junction
The concentration of son is higher than the concentration of the described heavy metal atom in other region in described substrate.
According to the eighth aspect of the embodiment of the present application, wherein, described substrate imports described heavy metal atom to include:
The diffusion source of described heavy metal atom is formed on relative two surface of described substrate or surface；
The described heavy metal atom in described diffusion source is made to be diffused in described substrate.
The 9th aspect according to the embodiment of the present application, wherein, the thickness range in described diffusion source is 50 angstroms-5 microns.
The tenth aspect according to the embodiment of the present application, wherein, the temperature range of described diffusion is 750 DEG C-1200 DEG C.
The beneficial effects of the present invention is: substrate is former with the heavy metal in the region of electrode contact and the interface of P-N junction
The concentration of son, higher than the concentration of the heavy metal atom in other region in substrate, has high switching speed thereby, it is possible to formed
Semiconductor device with low forward voltage Vf.
With reference to explanation hereinafter and accompanying drawing, disclose in detail only certain exemplary embodiments of this invention, specify the former of the present invention
Reason can be in adopted mode.It should be understood that embodiments of the present invention are not so limited in scope.?
In the range of the spirit and terms of claims, embodiments of the present invention include many changes, revise and be equal to.
The feature described for a kind of embodiment and/or illustrate can be in same or similar mode one or more
Other embodiment individual uses, combined with the feature in other embodiment, or substitute in other embodiment
Feature.
It should be emphasized that term " includes/comprises " existence referring to feature, one integral piece, step or assembly herein when using,
But it is not precluded from the existence of one or more further feature, one integral piece, step or assembly or additional.
Accompanying drawing explanation
Included accompanying drawing is used for providing being further understood from the embodiment of the present invention, which constitutes of description
Point, it is used for illustrating embodiments of the present invention, and describes, with word, the principle coming together to explain the present invention.Obviously
Ground, the accompanying drawing in describing below is only some embodiments of the present invention, for those of ordinary skill in the art,
On the premise of not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.In the accompanying drawings:
Fig. 1 is the structural representation of the fast recovery diode of patent documentation 1；
Fig. 2 is the vertical section schematic diagram of the semiconductor device of embodiment 1；
Fig. 3 is the concentration schematic diagram along substrate genesis analysis of the heavy metal atom of embodiment 1；
Fig. 4 is a schematic flow sheet of the manufacture method of the semiconductor device of embodiment 2；
Fig. 5 is the schematic flow sheet importing heavy metal atom in substrate of embodiment 2.
Detailed description of the invention
Referring to the drawings, by description below, the aforementioned and further feature of the present invention will be apparent from.In explanation
In book and accompanying drawing, specifically disclose only certain exemplary embodiments of this invention, which show and wherein can use that the present invention's is former
Some embodiments then, it will thus be appreciated that the invention is not restricted to described embodiment, on the contrary, bag of the present invention
Include whole amendments, modification and the equivalent fallen within the scope of the appended claims.
In this application, for convenience of description, the surface of the close P-N junction of substrate is referred to as " upper surface ", by substrate
The face relative with this " upper surface " be referred to as " lower surface ", thus, " on " direction refers to from " lower surface " sensing " upper surface "
Direction, D score direction with " on " in opposite direction, and, " on " direction and D score direction be referred to as longitudinal direction.?
In the application, the setting of "up" and "down" is comparatively speaking, merely to explanation is convenient, does not represent specifically used half
Conductor device or orientation when manufacturing this semiconductor device.
Embodiment 1
The embodiment of the present invention 1 provides a kind of semiconductor device.Fig. 2 is the vertical section schematic diagram of this semiconductor device, as
Shown in Fig. 2, this semiconductor device 200 includes: substrate 201, p-type doped region 202, n-type doping district 203, with
And electrode 204.
Wherein, the junction in p-type doped region 202 and n-type doping district 203 forms P-N junction, the district of this P-N junction
Territory is interface 2021；Electrode 204 is formed at the surface of substrate 201, and, with electrode 204 in substrate 201
The region of contact is 2041.
In the present embodiment, substrate 201 is imported with heavy metal atom, and, at interface 2021 and substrate
Former higher than the heavy metal in other region in substrate 201 with the concentration of the heavy metal atom in the region 2041 of electrode contact
The concentration of son.
In the present embodiment, the concentration of the heavy metal atom in interface 2021 is higher, thus, in the interface meeting of P-N junction
Form more deep energy level, shorten the minority carrier lifetime in P-N junction, thus improve the switch of this semiconductor device
Speed.
In the present embodiment, substrate is higher with the concentration of the heavy metal atom in the region 2041 of electrode contact, thus,
The heavy metal atom in this region 2041 and the atom of substrate can form alloy, thus reduce contact resistance so that fall
The forward voltage Vf of this semiconductor device low.
In the present embodiment, in the region outside the interface 2021 of this substrate 201 and region 2041, heavy metal atom
Concentration relatively low, thereby, it is possible to the resistance substrate that causes due to heavy metal atom of suppression increases phenomenon, so that should
Semiconductor device has relatively low forward voltage Vf.
According to the present embodiment, the switching speed of semiconductor device can either be improved, forward voltage Vf can be reduced again.
In the present embodiment, this substrate 201 can be the Semiconductor substrate that semiconductor applications is conventional, such as silicon substrate etc..
In the present embodiment, this heavy metal atom can be such as gold atom (Au) or pt atom (Pt)；Further,
In the region being imported with heavy metal atom of this substrate 201, this heavy metal atom can replace partly leading in this substrate
Body atom, i.e. this heavy metal atom presented in substitutional impurity atom in this substrate 201.
In the present embodiment, p-type doped region 202 can be the region being mixed with boron atom, and n-type doping district 204 can
To be the region being mixed with phosphorus atoms.Additionally, in the present embodiment, substrate 201 can be N-type substrate, thus,
This N doped region 204 can include whole substrate 201.
In the present embodiment, the quantity of electrode 204 can be two, i.e. 204A and 204B, and these two electricity
Pole 204A and 204B can lay respectively at the upper and lower surface of substrate 201, and, this substrate 201 and electricity
The region of pole 204A, 204B contact can be respectively 2041A and 2041B.Thus, this semiconductor device can be with shape
Become vertical structure.But, the present embodiment is not limited to this, and the quantity of this electrode can be 1, or 3 with
On；Further, in the case of having more than 2 electrodes, this electrode of more than 2 can also be arranged on substrate
Same surface, thus, this semiconductor device can be formed as transversary, in addition it is also possible to arranged by partial electrode
On the same surface of substrate, partial electrode is arranged on relative two surface of substrate.
In the present embodiment, heavy metal atom can along the longitudinal direction of substrate, between 2041A and 2041B of region with
The formal distribution that two ends concentration is high, intermediate concentration is low.Fig. 3 is the concentration genesis analysis along substrate of heavy metal atom
Schematic diagram, in figure 3, the longitudinal axis represents each region of substrate and the fore-and-aft distance of region 2041B, and transverse axis represents weight
The concentration of metallic atom.As it is shown on figure 3, in the 2041B of region, the concentration of heavy metal atom is higher, further away from
Region 2041B, the concentration of heavy metal atom is the lowest, after the concentration of heavy metal atom arrives minimum, the closer to
Region 2041A, the concentration of heavy metal atom is the highest, and in the 2041A of region, the concentration of heavy metal atom becomes again
High value.Thus, in figure 3, the concentration of heavy metal atom is distributed in horizontal " U " font.
In the present embodiment, the concentration of the heavy metal atom of region 2041A with 2041B can be identical.Additionally,
In the present embodiment, interface 2021 can be relatively near with the distance of region 2041A, therefore, and interface 2021 and region 2041A
The concentration of heavy metal atom may be considered that identical.
In the present embodiment, heavy metal atom has a concentration distribution profile as shown in Figure 3, thus, region 2041A,
The heavy metal atom concentration in region 2041B and interface 2021 is higher than the heavy metal atom concentration in other region in substrate,
Thus it is possible to improve the switching speed of semiconductor device, forward voltage Vf can be reduced again.
It should be noted that the concentration distribution profile of Fig. 3 is only citing, in the present embodiment, heavy metal atom also may be used
There to be other concentration distribution profile, as long as interface and substrate can be made former with the heavy metal in the region of electrode contact
Two electrodes, higher than the concentration of the heavy metal atom in other region in substrate, such as, are being arranged on by the concentration of son
In the case of the same surface of substrate, heavy metal atom concentration can be made higher in the substrate region with electrode contact,
Further, the concentration of heavy metal atom in substrate is made to increase and dullness is passed along with the distance in the region contacted with this in the vertical
Subtract.
In the present embodiment, in the region being imported with heavy metal atom of substrate 201, the concentration model of heavy metal atom
Enclosing can be 1 × 1015atom/cm3-1×1017atom/cm3.Certainly, the present embodiment is not limited to this, this concentration model
Enclosing can also be other value.
In the present embodiment, as in figure 2 it is shown, this substrate 201 can also have field limiting ring (Field Limiting
Ring, FLR) 205, this field limiting ring can be around P-N junction.Additionally, in the outside of electrode 204A, can be with shape
Become to have field plate (Field Plate) 206 and equal potential belt (Equipotential-Ring, EQR) 207.This field limiting ring
205, field plate 206 and equal potential belt 207 may be used for reducing the surface field of semiconductor device 200, puncture to improve
Voltage.About the explanation of field limiting ring, field plate and equal potential belt, being referred to prior art, the present embodiment repeats no more.
Additionally, in the present embodiment, it is formed at equal potential belt 207 as in figure 2 it is shown, this substrate 201 can also have
The raceway groove barrier layer (Channel Stopper, CS) 208 of lower section, it is used for preventing from forming parasitism in surface of silicon
Raceway groove.About the explanation on raceway groove barrier layer, being referred to prior art, the present embodiment repeats no more.
Embodiment 2
The embodiment of the present application 2 provides the manufacture method of a kind of semiconductor device, for manufacturing partly leading described in embodiment 1
Body device.
Fig. 4 is a schematic flow sheet of the manufacture method of the semiconductor device of the present embodiment.As shown in Figure 4, this system
The method of making includes:
S401, forms P-N junction in the substrate；
S402, imports heavy metal atom in substrate；
S403, forms electrode at substrate surface.
In the present embodiment, the concentration of the heavy metal atom in the interface of substrate and the region of electrode contact and P-N junction
Higher than the concentration of the heavy metal atom in other region in substrate, thereby, it is possible to formed, there is high switching speed and low forward
The semiconductor device of voltage Vf.
In the S401 of the present embodiment, can use in semiconductor fabrication process conventional method to form P-N junction,
The present embodiment repeats no more.
In the S402 of the present embodiment, the method from substrate surface diffusion can be used, in substrate, import heavy metal
Atom.For example, it is possible to arrange the diffusion source of heavy metal atom at substrate surface, and at a certain temperature, Jing Guoyi
The fixed time, heavy metal atom is made to diffuse in Semiconductor substrate.
It is in the present embodiment, corresponding with the distribution of the concentration of the semiconductor device structure of Fig. 2 and the heavy metal atom of Fig. 3,
The method that can use Fig. 5 imports heavy metal atom in substrate.As it is shown in figure 5, the method includes:
S501, in relative two surface of substrate or the diffusion source of a surface formation heavy metal atom；
S502, makes the heavy metal atom in diffusion source be diffused in substrate.
In step S501, by the way of evaporation, the diffusion source of heavy metal atom can be formed on substrate 201 surface,
Such as, this diffusion source can be such as thickness range be the layer gold of 50 angstroms-5 microns.Certainly, the present embodiment is not limited to
This, the generation type in the diffusion source of heavy metal atom can make alternate manner, and its thickness can also be other value.
In step S502, the substrate being provided with diffusion source can be made to be at a temperature of certain, through certain time,
Making heavy metal atom be diffused in substrate, such as, this temperature can be 750 DEG C-1200 DEG C, and this time can be 60
Minute.In a detailed description of the invention, it is silicon substrate at substrate, in the case of heavy metal atom is gold, this step
Temperature in S502 can be 750 DEG C, and the time can be 60 minutes.
In the present embodiment, the concentration of the heavy metal atom shown in Fig. 3 can be reached according to step S501 and S502 to divide
Cloth.
It should be noted that the method shown in Fig. 5 is only a specific embodiment, the present embodiment is not limited to this,
The method that can also use other imports heavy metal atom in substrate, as long as interface and substrate can be made to connect with electrode
The concentration of the heavy metal atom in the region touched is higher than the concentration of the heavy metal atom in other region in substrate.
In step S403, can use the method that semiconductor applications is conventional to form electrode, for example with evaporated gold
The mode belonging to layer this metal level graphical forms electrode, it is, of course, also possible to the method using other.Additionally, it is electric
The forming position of pole is referred to the explanation in embodiment 1, and here is omitted.
According to embodiments herein 2, it is possible to form the quasiconductor dress with high switching speed and low forward voltage Vf
Put.
Above in association with specific embodiment, invention has been described, it will be appreciated by those skilled in the art that this
A little descriptions are all exemplary, are not limiting the scope of the invention.Those skilled in the art can be according to this
The present invention is made various variants and modifications by spirit and the principle of invention, and these variants and modifications are also in the scope of the present invention
In.
Claims (10)
1. a semiconductor device, it is characterised in that described semiconductor device includes:
Substrate；
It is formed at the P-N junction in described substrate；
It is formed at the electrode of described substrate surface；
Wherein, described substrate is imported with heavy metal atom, and, the region of described substrate and described electrode contact,
And the concentration of the described heavy metal atom in the interface of described P-N junction is higher than other region described heavy in described substrate
The concentration of metallic atom.
2. semiconductor device as claimed in claim 1, it is characterised in that
In the region being imported with described heavy metal atom of described substrate, the concentration range of heavy metal atom is 1 ×
1015atom/cm3-1×1017atom/cm3。
3. semiconductor device as claimed in claim 1, it is characterised in that
In the region being imported with described heavy metal atom of described substrate, described heavy metal atom is replaced in described substrate
Semiconductor atom.
4. semiconductor device as claimed in claim 1, it is characterised in that
Described heavy metal atom is gold atom (Au) or pt atom (Pt).
5. semiconductor device as claimed in claim 1, it is characterised in that
The quantity of described electrode is 2, lays respectively at two surfaces that described substrate is relative.
6. semiconductor device as claimed in claim 5, it is characterised in that
Also having field limiting ring (Field Limiting Ring, FLR) in described substrate, described field limiting ring is around institute
State P-N junction.
7. the manufacture method of a semiconductor device, it is characterised in that described method includes:
Form P-N junction in the substrate；
Heavy metal atom is imported in described substrate；
Electrode is formed at described substrate surface；
Wherein, described substrate is former with the described heavy metal in the interface of the region of described electrode contact and described P-N junction
The concentration of son is higher than the concentration of the described heavy metal atom in other region in described substrate.
8. the manufacture method of semiconductor device as claimed in claim 7, it is characterised in that lead in described substrate
Enter described heavy metal atom to include:
The diffusion source of described heavy metal atom is formed on relative two surface of described substrate or surface；
The described heavy metal atom in described diffusion source is made to be diffused in described substrate.
9. the manufacture method of semiconductor device as claimed in claim 8, it is characterised in that
The thickness range in described diffusion source is 50 angstroms-5 microns.
10. the manufacture method of semiconductor device as claimed in claim 8, it is characterised in that
The temperature range of described diffusion is 750 DEG C-1200 DEG C.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510036944.9A CN105895707B (en) | 2015-01-26 | 2015-01-26 | Semiconductor device and method for manufacturing the same |
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|---|---|---|---|
| CN201510036944.9A CN105895707B (en) | 2015-01-26 | 2015-01-26 | Semiconductor device and method for manufacturing the same |
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| CN105895707A true CN105895707A (en) | 2016-08-24 |
| CN105895707B CN105895707B (en) | 2020-02-07 |
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