CN105892931A - heterogeneous CPU-GPU system configuration based on intelligent flash cache - Google Patents
heterogeneous CPU-GPU system configuration based on intelligent flash cache Download PDFInfo
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- CN105892931A CN105892931A CN201410206761.2A CN201410206761A CN105892931A CN 105892931 A CN105892931 A CN 105892931A CN 201410206761 A CN201410206761 A CN 201410206761A CN 105892931 A CN105892931 A CN 105892931A
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Abstract
The invention discloses an operating system prototype of a <{EN0}>heterogeneous CPU-GPU system configuration based on an intelligent flash cache; the configuration is characterized by comprising independent parallel CPU and parallel GPU, both have a storage subsystem, and can access the memory of both parties; the CPU is connected with a chipset through a I/O bus, and connected with the CPU through a I/O bridge; the CPU comprises an ALU, a dwell vessel file, an intelligent flash cache and a bus interface; Linux system transplant is carried out so as to support the heterogeneous CPU-GPU system configuration based on the intelligent flash cache, thus forming a self made operating system prototype.
Description
Technical field
The present invention relates to a kind of operating system prototype supporting isomery CPU-GPU system architecture based on intelligent flash caching
Background technology
CPU i.e. central processing unit is one piece of ultra-large integrated circuit, is arithmetic core and the control core of a computer.Mainly include arithmetical unit (ALU) and the big parts of controller (CU) two.Additionally, also include several depositors and cache memory and realize the bus of data, control and the state of contact between them.It is collectively referred to as the big core component of electronic computer three with internal storage and input-output apparatus.GPU i.e. graphic process unit is a kind of special at personal computer, work station, game machine and the microprocessor of some mobile device epigraph operation.
Heterogeneous Computing is primarily referred to as using the calculation of the computing unit composition system of dissimilar instruction set and architectural framework.Common computing unit classification includes the processors such as CPU, GPU.Heterogeneous Computing obtains more concern in recent years, and the traditional approach being primarily due to improve computing capability by promoting cpu clock frequency and number of cores encounters heat radiation and energy consumption bottleneck.Although and the dedicated computing unit operating frequencies such as GPU are relatively low, having more interior check figure and computation capability, ratio and the performance/power dissipation ratio of overall performance/chip area are the highest, are far from being fully used.
The design of CPU allows it compare and is good at process irregular data structure and uncertain access mode, and recursive algorithm, branch's intensity code and single-threading program.This kind of program task has the steps such as instruction scheduling, circulation, branch, logical judgment and the execution of complexity.And GPU is good at processing rules data structure and measurable access mode.Gather both strong points, reach the optimization of overall performance by Heterogeneous Computing.
Intelligent flash caching is a read-only caching.Being removed out buffer area cache when unmodified data block due to the pressure in space, these data blocks are just moved in flash cache；If needing again these data, data base will retract these data blocks from flash cache again.Flash cache utilizes the I/O speed of flash memory device, more much higher than storage performance based on disk；There is enough CPU, flash cache can be used.
The invention provides a kind of operating system prototype supporting isomery CPU-GPU system architecture based on intelligent flash caching.Framework is characterized by independent parallel C PU and parallel GPU, has respective storage subsystem, all may have access to the memorizer of the other side；GPU is connected to chipset by I/O bus, is connected with CPU by I/O bridge the most again；CPU is cached by ALU, register file and intelligent flash and EBI forms.Carry out linux system transplanting, to support isomery CPU-GPU system architecture based on intelligent flash caching, constitute a kind of self-making operational system prototype.
Summary of the invention
It is an object of the invention to provide a kind of operating system prototype supporting isomery CPU-GPU system architecture based on intelligent flash caching.The present invention includes following characteristics:
Inventive technique scheme
1. an isomery CPU-GPU system architecture based on intelligent flash caching, the feature of framework:
1) there is independent parallel C PU and parallel GPU, have respective storage subsystem, all may have access to the memorizer of the other side；
2) GPU is connected to chipset by I/O bus, is connected with CPU by I/O bridge the most again；
3) CPU is cached by ALU, register file and intelligent flash and EBI forms.
2. hardware structure based on claim 1, carries out linux system transplanting, to support isomery CPU-GPU system architecture based on intelligent flash caching, constitutes a kind of self-making operational system prototype.
Accompanying drawing explanation
Accompanying drawing 1 is isomery CPU-GPU system architecture based on intelligent flash caching.
Detailed description of the invention
1. an isomery CPU-GPU system architecture based on intelligent flash caching, the feature of framework:
1) there is independent parallel C PU and parallel GPU, have respective storage subsystem, all may have access to the memorizer of the other side；
2) GPU is connected to chipset by I/O bus, is connected with CPU by I/O bridge the most again；
3) CPU is cached by ALU, register file and intelligent flash and EBI forms.
2. hardware structure based on claim 1, carries out linux system transplanting, to support isomery CPU-GPU system architecture based on intelligent flash caching, constitutes a kind of self-making operational system prototype.
Claims (2)
1. an isomery CPU-GPU system architecture based on intelligent flash caching, the feature of framework:
1) there is independent parallel C PU and parallel GPU, have respective storage subsystem, all may have access to the memorizer of the other side；
2) GPU is connected to chipset by I/O bus, is connected with CPU by I/O bridge the most again；
3) CPU is cached by ALU, register file and intelligent flash and EBI forms.
2. hardware structure based on claim 1, carries out linux system transplanting, to support isomery CPU-GPU system architecture based on intelligent flash caching, constitutes a kind of self-making operational system prototype.
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| CN201410206761.2A CN105892931A (en) | 2014-05-16 | 2014-05-16 | heterogeneous CPU-GPU system configuration based on intelligent flash cache |
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| CN105320630A (en) * | 2014-08-01 | 2016-02-10 | 张军 | Heterogeneous multi-core CPU-GPU (Central Processing Unit-Graphics Processing Unit) system architecture based on intelligent flash cache |
| CN106502956A (en) * | 2016-10-28 | 2017-03-15 | 张军 | A kind of operating system prototype of multinuclear isomery CPU GPU system frameworks |
| CN106708777A (en) * | 2017-01-23 | 2017-05-24 | 张军 | Multi-core heterogeneous CPU - CPU - FPGA architecture |
| CN106843045A (en) * | 2017-01-23 | 2017-06-13 | 张军 | A kind of embedded OS prototype based on multinuclear isomery CPU GPU FPGA system frameworks |
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| CN101526934A (en) * | 2009-04-21 | 2009-09-09 | 浪潮电子信息产业股份有限公司 | Construction method of GPU and CPU combined processor |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105320630A (en) * | 2014-08-01 | 2016-02-10 | 张军 | Heterogeneous multi-core CPU-GPU (Central Processing Unit-Graphics Processing Unit) system architecture based on intelligent flash cache |
| CN106502956A (en) * | 2016-10-28 | 2017-03-15 | 张军 | A kind of operating system prototype of multinuclear isomery CPU GPU system frameworks |
| CN106708777A (en) * | 2017-01-23 | 2017-05-24 | 张军 | Multi-core heterogeneous CPU - CPU - FPGA architecture |
| CN106843045A (en) * | 2017-01-23 | 2017-06-13 | 张军 | A kind of embedded OS prototype based on multinuclear isomery CPU GPU FPGA system frameworks |
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Inventor after: Zhang Jun Inventor before: Zhang Jun Inventor before: Song Weizhong |
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Effective date of registration: 20171222 Address after: 200120 room 4A06, No. 277, Ruichang Road, Pudong New Area, Shanghai, 6 rooms Applicant after: Shanghai Deheng Data Technology Co. Ltd. Address before: 200061 room No. 100, Lane 40, Tam Tam Road, Shanghai, Putuo District, China 1103 Applicant before: SHANGHAI JINGZHI INFORMATION TECHNOLOGY CO., LTD. |
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Application publication date: 20160824 |