CN105871730B - Network-on-chip router based on network code - Google Patents

Abstract

The invention discloses a kind of novel compacts based on network code, efficient, quick network-on-chip router, the router includes the input of the road P, output channel, each input channel is equipped with v virtual channel again, it is designed with a routing logic and virtual channel distributor per input channel all the way, is each responsible for the route direction and distribution virtual channel of data transmission；Virtual channel distributor is also connected with switch divider, the switch divider is responsible for the road P input channel distribution crossbar switch, it realizes multiple input channels while requesting the president of the same output channel, network code module NCU is additionally provided between the road P input channel and crossbar switch, the microplate output of virtual channel is by simple coding selection circuit, NCU performs the encoding operation qualified input, by the microplate of coding after the arbitration of switch divider, is sent to crossbar switch.The transmission mode as unit of microplate is supported in invention, realizes real-time coding, and additional hardware and power consumption consumption is effectively reduced.

Description

Network-on-chip router based on network code

Technical field

The present invention relates to the research field of network router, in particular to a kind of network-on-chip routing based on network code Device.

Background technique

With the sustainable development of semiconductor technology, the quantity that one chip accommodates transistor is continuously increased, and integrated circuit steps Multicore (multiple-core) or many-core (many-core) epoch are entered.Core relies on network-on-chip (Network-on- Chip or NoC) it links together, the overall performance of chip is improved by concurrent operation.Currently, many-core chip has been carried out A large amount of business application.Such as: cloud computer single-chip cloud computer " the single-chip cloud of 48 core of Intel The TILE-Gx72 single-chip of computer " and 72 core of Tilera.These chips be widely used in supercomputing, cloud computing, In the systems such as big data.

The scale and degree of parallelism of many-core chip constantly increase, and the reliable interconnection and communication between core become increasingly to be stranded Difficulty, bus and point-to-point interconnection mode are not able to satisfy the performance and expansible needs that on piece interconnects gradually, there has been proposed Network-on-chip mode based on packet switch.The application of many-core chip is continuously increased, and the concurrent cooperation in chip between core is increasingly Closely, the data volume transmitted between each other continues to increase, and needs support increasingly complex network behavior.In addition, complicated multiple groups are broadcast (multi-session multicast) communication is applied also very frequently in many-core chip, such as: Cache consistency and biography Defeated shared data etc..These factors increase the traffic of network-on-chip, cause network congestion, reduce the property of network-on-chip Can, increase the power consumption of entire chip.People are badly in need of new network-on-chip and are designed to improve performance and energy consumption efficiency.

The it is proposed of network-on-chip concept is at 2000 or so, and the data for using for reference macroscopical computer network packet switch transmit shape The frame mode of formula and shared physical channel supports the transmission mode with " microplate (flit) " for unit.1999, masschusetts, U.S.A The Raw microprocessor of Polytechnics combines static and two sets of communication networks of dynamic, realizes multiple processor cores jointly Collaboration and communication；Guerrier and Greiner was proposed in 2000 based on fat tree (fat-tree) structure and packet switch SPIN On-chip network structure.2001, the characteristics of Dally and Towles analyze system on chip hardware resource, propose one it is general NoC model, to demonstrate network-on-chip in the feasibility for solving SoC interconnection；The same year, Benini and Micheli propose NoC's Stratification tectonic model.Then, researchers expand extensive research in network-on-chip field, propose a series of online Network structure, it is more influential to have: the CHAIN and SpiNNaker of Univ Manchester UK, Italian Bologna university and beauty The XPIPES of Stanford University, state, PHILIPS Co.The NOSTRUM of Sweden's Royal Institute of Technology, French UPMC SPIN and the MANGO of Denmark Polytechnic University of university etc..

With the development that multi-core processor and shared data are applied, increasingly complex network behavior, such as multicast (multicast), become the significant consideration of network-on-chip design.The data transmission of network-on-chip mainly has unicast (unicast) transmission and multicast transmission.Multicast can be realized with multiple unicast operations, but efficiency is very low.Researchers Numerous studies have been done in terms of multicast network-on-chip, have proposed a variety of NoC frameworks and multicast optimization algorithm for supporting multicast. Merolla et al. proposes a kind of tree routing device for supporting multicast, can pass through the broadcast (sites) in turn in subtree (subtree) Mode realizes multicast.Stefan et al. proposes a kind of on-chip network structure of time-sharing multiplex, supports QoS, multicast and efficient Connection creates a mechanism.Abad et al. proposes a kind of new routing mechanism for supporting multicast, is protected using the method for multicasting adaptively set Limitation of the correct transmission of multicast without routing is demonstrate,proved, therefore improves the performance of CMP multicast.Samman et al. proposes one kind It can realize that the multicast of deadlock freedom, the router of NoC support following functions without virtual channel: if certain data packets are hindered It fills in, the microplate of other data packets is inserted into before them, to avoid deadlock.You Zhiqiang et al. is proposed based on BFT The network-on-chip of type proposes a kind of multicast routing protocol and nodes encoding design scheme, and the multicast for completing to phase same core is surveyed Examination, reduces test application time.

The concept of network code is for the first time to be put forward by Ahlswede et al. in 2000.It is a kind of network data Transmission mode extends the concept and function of traditional routing.In traditional network based on routing, network node (router, Interchanger etc.) it only carries out the forwarding of data and replicates two operations；And after having used network code, network node can be right The data received carry out arbitrary encoding operation (such as linear transformation), then coding result is replicated or forwarded.With traditional net Network is compared, and the advantage of network code is mainly reflected in multicast application, can promote throughput, realizes directed networks The multicast capacity (multicast capacity) of (directed networks).Network code just causes state once proposition The extensive concern of border academia, theoretical and application have become the new hot spot of network and communications field research.

The introducing of network code gives Netowrk tape next certain additional consumption, such as router of additional encoding operation, complexity, Biggish caching.It in network code, needs under the premise of meeting throughput, uses simple calculations as far as possible, it is lesser to have Confinement, and reduce the quantity of coding nodes.For given network topology structure, the smallest finite field is found to reach network Capacity has NP difficulty.C.Fragouli and E.Soljanin is in " Information flow decomposition For network coding " in prove finite field size and destination node number it is closely related, and give one The upper bound of minimum finite field.Similar, finding least coding nodes number is also to have NP difficulty.M.Langberg, A.Sprintson, and J.Bruck first will in " The encoding complexity of network coding " General network is converted to so-called simple network.Using the method for simple network, under acyclic and network that is having ring respectively The Lower and upper bounds of coding nodes number are gone out.C.Fragouli and E.Soljanin utilizes greedy algorithm, propose one it is new Network information flow model optimizes to study coding nodes and coding number of edges purpose.Coding nodes, the optimization of coding side can also apply Genetic algorithm (genetic algorithm).M.Kim, C.W.Ahn, M.M é dard, and M.Effros are in " On Minimizing network coding resources:An evolutionary approach " in be considered as losing for the first time Propagation algorithm Optimized Coding Based number of edges.For the coding of chromosome, network G is converted into corresponding line chart G ' first.For each Encoding scheme, the bit vectors that code coefficient on the corresponding all sides line chart G ' is formed are as chromosome coding.With coding side Adaptive value of the quantity as chromosome.Preliminary simulation result shows using the result of genetic algorithm better than greedy algorithm.

The research team of Texas A&M University proposes for network code to be applied to integrated electricity for 2006 for the first time Road interconnects field.Jayakumar, Khatri and Gulati et al. application network coding techniques in ASIC bus reduce energy consumption 7%~8.5%, reduce interconnection bus length and area 6%~10%.Then, they arrive the application extension of network code FPGA interconnects field, achieves good results.A kind of bidirectional bus for supporting network code, net has also been devised in the research team Network coding techniques can use the bandwidth that a bidirectional bus realizes two one-way bus, save 49% bus resource and 11% Bus energy consumption.

2011, Indrusiak for the first time applied to the concept of network code in network-on-chip, inquired into it in NoC group Broadcast the potential advantages in communication.The angle for the hop count (hops) that article is transmitted from data packet, compares network coding and XY The sum of hop required for routing is transmitted, tentatively demonstrates the advantage being applied to network coding in NoC.Analytical table Bright, network code can reduce by 10%~22% transmission hop count.Thuan et al. answers network code in terms of hardware realization For in CMP, devising the router for supporting network code, it was demonstrated that in the CMP of 9 cores, network code can drop significantly Low network delay, and improve 1.48 times of handling capacity of network.Shalaby et al. mainly considers butterfly network at 2D-mesh Optimization problem, propose the algorithms of 5 selections intermediate source node is and intermediate destination node i d, it was demonstrated that network code can be with Reduce transmission hop count 12%~35%.The optimization problem of network code is expanded to general group from butterfly network by Vonbun et al. Topological structure is broadcast, the packet transmission range of network-on-chip can be reduced by theoretically demonstrating network code.A.Shalaby, V.Goulart, and M.-S.Ragab are in " Study of application of network coding on NoCs for Multicast communications " in document [33], it was demonstrated that it can also be in multicast application effectively using network code Reduce transmission delay.Hu et al. achieves Preliminary Results, but circuit is set it is also proposed that with the on-chip network structure of network coding technique Meter and experimental result description are simultaneously unintelligible.

It is rigid to can be seen that the research work in terms of network coding technique is applied to network-on-chip from above document analysis Ground zero, relevant research achievement be not also comprehensive.These preliminary explorations, which demonstrate network-on-chip, can efficiently use network volume Code technology improves network throughput, reduces transmission delay, saves transmission energy consumption.But most of technology is all confined to butterfly net The construction of network, and butterfly network is a special case of network code application.Although butterfly network is expanded to one by some technologies As multicast topology structure and give theoretical performance, however specific network code construction is not mentioned in text to realize this A little theoretical performances.But (Intra-session) coding is still confined in multicast.It is compiled by (Inter-session) between multicast Code, bigger performance gain should may be implemented in we.In addition, the rough theory that these documents are mostly based on network code is commented Estimate, lack and be accurately delayed and power consumption experimental data under actual circuit environment, optimization algorithm is also based on existing network coding reason By, for network-on-chip structure and performance characteristics targetedly improved, it is difficult to realization to network code for The facilitation of network-on-chip carries out research and evaluation comprehensively, comprehensive.

Summary of the invention

The shortcomings that it is a primary object of the present invention to overcome the prior art and deficiency, provide a kind of piece based on network code Upper network router.

In order to achieve the above object, the invention adopts the following technical scheme:

The present invention provides a kind of network-on-chip router based on network code, which includes that the road P inputs, is defeated Channel out, each input channel are equipped with v virtual channel again, are designed with a routing logic per input channel all the way Routing Logic and virtual channel distributor VC allocator, route direction and the distribution for being each responsible for data transmission are virtual Channel；Virtual channel distributor VC allocator is also connected with switch divider Switch allocator, the switch distribution Device Switch allocator is a global component, is responsible for the road P input channel distribution crossbar switch crossbar, realizes Multiple input channels request the president of the same output channel simultaneously, and Crossbar is a crossbar switch, realize that the input of the road P is logical The rapid data of road to the road P output channel transmits, and network volume is additionally provided between the road P input channel and crossbar switch Crossbar Code module NCU, the microplate output of virtual channel is by simple coding selection circuit, without what is encoded or do not encode here Microplate is directly sent to crossbar switch Crossbar；If it is the microplate encoded in this router, then network code mould is sent to Block NCU, NCU perform the encoding operation qualified input, by the microplate of coding through switch divider Switch After the arbitration of allocator, it is sent to crossbar switch.

The logic that router passes through modification routing logic Routing Logic component as a preferred technical solution, Circuit realizes multicast functionality.

The network code module NCU includes input buffer Input buffer and defeated as a preferred technical solution, Buffer Output buffer out inputs distributor Input allocator according to the sky of input buffer Input buffer Not busy state is input distribution buffer queue, and output moderator Output arbiter arbitration two-way coding output guarantees to intersect and open The use for closing Crossbar does not conflict.

The network code module NCU scans input buffer Input buffer as a preferred technical solution, checks Whether there are effective data to be encoded, and checks this data whether there is or not the paired datas of alignment, if two paths of data is all here, net Network coding module NCU just carries out data encoding, and modifies packet header, the data packet after forming new coding, is sent to the defeated of free time Out in buffer Outputbuffer.

The pack arrangement of support network code is defined as a preferred technical solution, as follows:

One data packet is made of several microplates Flit, including a packet header Head, several load datas Payload It include control information with packet tail a Tail, Head and Tail, what is put in Payload is valid data.

Head includes the key control information for supporting network transmission and coding as a preferred technical solution, by 9 parts It constitutes, the definition of each part and function are as shown in table 1:

Can be seen that from the definition in above table can just with NC type, Dist to IS and Dist to ID To determine two data packets are performed the encoding operation in which router, which router multicast transmission is carried out at.

Data packet Dist to IS=2 at the beginning as a preferred technical solution, it is every to pass through a router Dist to IS subtracts 1, and until is router becomes 0, network code is done in expression in is, and it is both a router that is, which is intermediate source node, It is an encoder again, the raw data packets that two-way inputs is encoded according to the sequence of microplate；The data packet is sent to In NCU, after Dist to IS is less than 0, indicates that network code is completed, no longer need to change, Dist to IS holding at this time -1 is not Become, Distto ID indicates the intermediate destination router that also to arrive by how many a routers, needs data packet carrying out two-way Multicast transmission.

Compared with the prior art, the invention has the following advantages and beneficial effects:

1, the present invention designs carried out comprehensive study to the network-on-chip based on network code, realize to hardware, power consumption, The accurate assessment and modeling of performance, propose a kind of novel compact network-on-chip data packet coding structure, with the volume of very little Outer hardware, delay and energy consumption design the efficient network-on-chip router for supporting microplate transfer mode, so that additional is hard Part resource at most only accounts for 1/5th of router (for the router of 5 ports.For the router of multiport, additionally Consumption is less), well solve the alignment and real-time coding problem of microplate in data packet.This is provided for the design of network-on-chip New method and thinking has theory and practice for further increasing the performance of network-on-chip and many-core chip, reducing power consumption Novelty.

2, in terms of concrete implementation technological means, the present invention has gathered network code, network-on-chip, on-chip multi-processor With the newest research results in terms of low-power consumption, merge the related disciplines knowledge such as signal theory, integrated circuit and computer, it is theoretical with Practice combines, and physical modeling and emulation experiment combine, and finally obtains research achievement.

3, the laboratory facilities of network-on-chip circuit design are related to IC design and Simulation Software Design, such as Fig. 3 institute Show.The method that NoC circuit design is combined with modeling using IC design eda software tool and FPGA, the specific institute on the left of Fig. 3 Show.The present invention accelerates the efficiency of behavior simulation, the correctness of checking function using FPGA, and is gone out using eda tool emulation testing The delay and power consumption of each component of new network-on-chip, and carry out accurate delay and power consumption modeling.

Detailed description of the invention

Fig. 1 (a)-Fig. 1 (b) is respectively network code processing figure in butterfly network coding structure figure and network-on-chip；

Fig. 2 is the schematic diagram of the network code bring alignment problem as unit of microplate；

Fig. 3 is the flow chart of the present embodiment experimental method；

Fig. 4 is the structure chart of inventive network router；

Fig. 5 is the schematic diagram that the present invention supports network code pack arrangement.

Specific embodiment

Present invention will now be described in further detail with reference to the embodiments and the accompanying drawings, but embodiments of the present invention are unlimited In this.

Embodiment

The it is proposed of network code is (such as wireless sensor network, computer network in traditional macro network environment Deng), there is the router of these networks stronger processing and store function can be enough to answer while supporting routing function Pay the extra work of network code.Also, for the delay and power consumption of Relative Network transmission, volume consumed by network code Outer delay and power consumption very little can be ignored.But network-on-chip is one kind for speed and hardware resource requirements pole Its stringent micronet, processing and caching capabilities are all very weak, it is impossible to which consumption excessive additional hardware and energy consumption resource come Support network code.

Fig. 1 (a) is a typical butterfly network coding structure: s1, s2 are two multicast source nodes；D1, d2 are two The destination node of multicast；Is is intermediate source node, is both a router and an encoder, by two-way input Raw data packets are encoded according to the sequence of flit, are then forwarded；Id is intermediate destination node, by received coding Data packet afterwards is transmitted to the destination direction of multicast respectively.Intermediate source node is need to receive data packet A from s1, s2, B makees simple exclusive or processing, is then transferred to intermediate destination node i d.Intermediate destination node i d gives packet delivery d1,d2.D1, d2 are connected to after data packet A ⊕ B that perhaps B carries out XOR operation and obtains B or A with data packet A.

In macro network in (such as wireless network), the time and energy consumption required for network transmission are far longer than number of nodes According to the time of processing, is and id are generally processor node, have stronger processing capacity and biggish caching.Data packet A, B Exclusive or processing is just carried out after completely arriving at is.

However, in the network-on-chip as shown in Fig. 1 (b), the speed that network transmission requires is exceedingly fast, the processing of network code and Distribution can not pass through processor node (such as nis, nid), otherwise will seriously affect the speed of network-on-chip.These operations must (is, id) must be completed by network-on-chip router (router).But the recovery operation of network code (such as B=A ⊕ A ⊕ B) It can be completed in destination node (such as d1, d2).

It is well known that the circuit-level that the router of network-on-chip only supports speed to be exceedingly fast exchanges and routing operations, and delay Very little is deposited, using microplate (flit) as the unit of transmission, a complete data packet (package) can not be accommodated.Therefore, newly The network-encoding operation of network-on-chip also must be as unit of flit, and cannot be as unit of package.Since network-on-chip is deposited Blocking, the transmission of microplate is likely to occur discontinuously, brings huge difficulty to the network code of router, as shown in Figure 2.

The square (being started with c) that grey is filled in Fig. 2 represents the flit after exclusive or coding.Situation 1 is optimal situation, That is data packet A, B equal length, and at the same time reaching a certain intermediate source node.The intermediate source node by simultaneously reach microplate into The processing of row exclusive or, forms new microplate (c0-c6) and sends.Situation 2 indicates that data packet A, B two clock cycle of difference arrive It reaches.A0, a1 and b5, b6 can not carry out network code processing.Situation 3 expression influenced by network congestion, data packet A, B it is micro- The case where piece reaches intermediate source node intermittently, network code becomes sufficiently complex, so that the recovery of follow-up data is by pole Big influence.

In addition, as shown in Fig. 1 (b), chip once after the completion of, multicast node position, network characteristic, link bandwidth etc. are all It can not change.And the optimisation technique of existing network code allows network structure and parameter to be changed according to the requirement of optimization Become.This generates the new problems of network code optimisation technique.

The technology path of two key cores is as follows:

1) the network-on-chip circuit design of network code is supported

The critical issue of this respect is the design of NoC router.The present invention is on the road NoC of classical support virtual channel By improving on the basis of device, it is allowed to not only support traditional exchange route function, but also support microplate encoding function, as shown in Figure 4. The router has P I/O channel, and each input channel has v virtual channel.There is one per input channel all the way Routing Logic and VC allocator is each responsible for the route direction and distribution virtual channel of data transmission.Switch Allocator is a global component, is responsible for P input channel distribution crossbar switch crossbar, realizes multiple inputs The president of the same output channel is requested simultaneously in channel.Crossbar is a crossbar switch, realizes that the road P is input to the output of the road P Rapid data transmitting.The network-on-chip router of 2D-mesh topological structure has 5 ports (P=5), respectively east, south, west, It is northern and local.The NoC router of 3D-mesh topological structure has 7 ports (there are also upper and lower).Router can pass through modification The logic circuit of Routing Logic component realizes multicast functionality.

New router increases network code module (Network Coding Unit or NCU).Virtual channel it is micro- Piece output encodes selection circuit (according to the definition of table 1 below, checking Dist to IS=0, NC Type=1) by simple, Microplate without encoding or not encoding here is directly sent to crossbar switch Crossbar；It is compiled if it is in this router The microplate of code, then be sent to network code component (NCU).NCU performs the encoding operation qualified input.By the micro- of coding Piece is sent to crossbar switch after the arbitration of Switch allocator.Therefore, the more inputs all the way of NCU of crossbar switch, become At the crossbar switch of (P+1) xP, the crossbar switch of the PxP of classical router is increased, but ratio very little.

The circuit structure design of NCU is as shown in part under Fig. 4, it is assumed that is the 2D-mesh router of 5 inputs.NCU has 5 Input weaves into two-way coding output wherein be up to 4 circuit-switched data packets need to encode.Therefore, input is 5 in figure, input buffering Device (Input buffer) is 4, and output buffer (Output buffer) is 2.Input allocator is according to Input The idle state of buffer is input distribution buffer queue.Output arbiter arbitrates two-way coding output, guarantees The use of Crossbar does not conflict.

Network coding is the critical component of addressable part.It scans 4 Input buffer, has checked whether there is The data to be encoded of effect, and check this data whether there is or not the paired datas of alignment.If two paths of data is all here, Network Coding just carries out data encoding, and modifies packet header (package head), and the data packet after forming new coding is sent to sky In not busy Output buffer.

Input Buffer plays the role of good for solving the microplate alignment of network code, we can compile in network Increase the timing that packet issues in code optimization algorithm to calculate, so that data packet reaches the time synchronization of coding nodes.For example, Fig. 1 (b) In, 1 timing of data packet of the data packet of s2 earlier than s1 is sent, and A and B can reach is simultaneously.If there is slight obstruction, The caching of A and B may be implemented in Input Buffer, so that they have been aligned carries out coding transmission again.If the Input of a packet Buffer is full, another packet arrives not yet, does not just do encoding operation according to conventional mode is transmitted.In fact, It can use the QoS that virtual channel ensures data to be encoded transmission, guarantee that data packet to be encoded is not blocked generally, so that The phenomenon that being misaligned seldom occurs.

From fig. 4, it can be seen that the structure of NCU is like the circuit for increasing virtual channel all the way, mainly by buffering FIFO, secondary Device is cut out, crossbar switch is constituted.It can thus be appreciated that additional hardware needed for supporting the NoC router of network code is simultaneously few (for 5 tunnels NoC router, additional consumption are 1/5th of router；For high base router, additional consumption is smaller).Due to raising property Can and introduce additional hardware resources can receive.In addition, the size of Input buffer is taken at the data packet of network code Size and our flit are aligned strategy.It can use with accurate optimization algorithm, more compact data micro sheet structure into one Step reduces the area of Input buffer.The presence of Output buffer can a smooth lower network transmission speed, but this Function can also be completed by Input buffer.Output buffer sets or sets much, will be determined by emulation experiment. And network code is simple xor operation, shared circuit resource is few.To sum up, additional hardware resources needed for NCU are It is entirely acceptable.

2) compact data packet coding scheme

In order to realize network code in network-on-chip, the packet format transmitted to data is needed to carry out recompiling definition, Support transmission mode of the network-on-chip with microplate (flit) for basic unit.The present invention defines the pack arrangement of support network code such as Shown in Fig. 5.One data packet is made of several microplates (Flit), including packet header (Head), several load datas (Payload) and a packet tail (Tail).Head and Tail includes control information, and what is put in Payload is valid data.

Head includes the key control information for supporting network transmission and coding, is made of 9 parts.The definition of each part It is as shown in table 1 with function.

The composition and function of 1 Head of table

From defined above as can be seen that being assured that two just with NC type, Dist to IS and Dist to ID A data packet is performed the encoding operation in which router, which router to carry out multicast transmission at.As shown in Fig. 1 (b), s2 to is Data packet Dist to IS=2 at the beginning, every to subtract 1 by a router Dist to IS, having arrived is router becomes 0, Network code is done in expression in is, which is sent in NCU.After Dist to IS is less than 0, indicate that network code is complete At no longer needing to change, Dist to IS is kept -1 constant at this time.Dist to ID indicates also to arrive by how many a routers Intermediate destination router needs data packet carrying out two-way multicast transmission.Its operating principle is identical as Dist to IS.

The laboratory facilities of network-on-chip circuit design are related to IC design and Simulation Software Design, as shown in Figure 3. The method that NoC circuit design is combined with modeling using IC design eda software tool and FPGA, specifically as shown on the left side of figure 3.This The efficiency of behavior simulation, the correctness of checking function are accelerated in invention using FPGA, and go out new piece using eda tool emulation testing The delay and power consumption of upper each component of network, and carry out accurate delay and power consumption modeling.

Test assessment is carried out under simulation software environment, as shown in the right side Fig. 3.Delay and power consumption model are input to piece online In network emulation software tool (according to experience before, secondary development NS2 network law carrys out design and simulation environment), in conjunction with net The related optimization of network coding is successfully authenticated novelty of the invention with a large amount of real cases.

The above embodiment is a preferred embodiment of the present invention, but embodiments of the present invention are not by above-described embodiment Limitation, other any changes, modifications, substitutions, combinations, simplifications made without departing from the spirit and principles of the present invention, It should be equivalent substitute mode, be included within the scope of the present invention.

Claims (2)

1. the network-on-chip router based on network code, which is characterized in that the router include the road P input, output channel, Each input channel is equipped with v virtual channel again, is designed with a routing logic Routing per input channel all the way Logic and virtual channel distributor VC allocator is each responsible for the route direction and distribution virtual channel of data transmission；Void letter Road distributor VC allocator is also connected with switch divider Switch allocator, the switch divider Switch Allocator is a global component, is responsible for the road P input channel distribution crossbar switch crossbar, realizes multiple inputs The arbitration of the same output channel is requested in channel simultaneously, and Crossbar is a crossbar switch, realizes the road P input channel to the road P The rapid data of output channel transmits, and network code module is additionally provided between the road P input channel and crossbar switch Crossbar NCU, the microplate output of virtual channel is by simple coding selection circuit, without coding or not in the micro- of this router coding Piece is directly sent to crossbar switch Crossbar；If it is the microplate encoded in this router, then network code module is sent to NCU, NCU perform the encoding operation qualified input, by the microplate of coding through switch divider Switch After the arbitration of allocator, it is sent to crossbar switch；

The pack arrangement of support network code is defined as follows:

One data packet is made of several microplates Flit, including a packet header Head, several load datas Payload and one A packet tail Tail, Head and Tail include control information, and what is put in Payload is valid data；

Head include support network transmission and coding key control information, be made of 10 parts, the definition of each part and Function is as follows: NC type: showing general data packet NC type=0 or NC data packet NC type=1；Routing Info: routing iinformation, using fixed route, one route-map of every 3 expressions；After often passing through a router, the information Move to right 3；Dist to IS: the specified intermediate source router is and how many router has been arrived, 0 indicates to route currently Device carries out NC operation, and -1 indicates that NC is completed；Dist to ID: the specified intermediate destination road and how many router has been arrived It indicates to carry out two-way multicast operation in current router by device id, 0, -1 indicates that multicast operation is completed；Package ID: data packet Serial number；Flit ID: the serial number of microplate；Src1: source node 1；Dest1: destination node 1；Src2: source node 2 works as NC Type=1 is effective；Dest1: destination node 2, multicast node, regardless of whether being NC can use；It can from above-mentioned definition To find out, it is assured that two data packets in which router just with NC type, Dist to IS and Dist to ID It performs the encoding operation, which router to carry out multicast transmission at；

Data packet Dist to IS=2 at the beginning, it is every to subtract 1 by a router Dist to IS, until is router becomes 0, network code is done in expression in is, and is is intermediate source node, is both a router and an encoder, by two-way The raw data packets of input are encoded according to the sequence of microplate；The data packet is sent in NCU, when Dist to IS is less than It after 0, indicates that network code is completed, no longer needs to change, Dist to IS is kept -1 constant at this time, and Dist to ID is indicated will also be through It crosses how many a routers to arrive intermediate destination router, needs data packet carrying out two-way multicast transmission；

The network code module NCU includes input buffer Input buffer and output buffer Output buffer, defeated Entering distributor Input allocator according to the idle state of input buffer Input buffer is input distribution caching team Column, output moderator Output arbiter arbitration two-way coding output, guarantee that the use of crossbar switch Crossbar does not conflict；

The network code module NCU scans input buffer Input buffer, checks whether there is effective data to be encoded, If so, then checking this data, whether there is or not the paired datas of alignment, if two paths of data is all here, network code module NCU just into Row data encoding, and packet header is modified, the data packet after forming new coding is sent to idle output buffer Output In buffer.

2. the network-on-chip router according to claim 1 based on network code, which is characterized in that router is by repairing The logic circuit for changing routing logic Routing Logic component realizes multicast functionality.