CN105869671B - Phase-changing memory unit write initial method and its array write initial method - Google Patents
Phase-changing memory unit write initial method and its array write initial method Download PDFInfo
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0097—Erasing, e.g. resetting, circuits or methods
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Abstract
The present invention provide a kind of phase-changing memory unit write initial method and its array write initial method, the initial method of writing of the unit includes the following steps：S1：Phase-changing memory unit is operated using initialization write pulse, non-crystalline areas is formed in the phase-changing memory unit；The non-crystalline areas is more than the non-crystalline areas that phase transition storage acquiescence write pulse generates；S2：The phase-changing memory unit is operated to low resistive state using pulse is wiped, the non-crystalline areas that the initialization write pulse is formed is made to be converted into face-centered cubic grained region；S3：Using phase-changing memory unit described in default write pulse operation.Wherein, after primary initialization, initialization effect can be further verified, and choose whether to need to initialize again as needed.The present invention controls the FCC grained regions of array each unit using initialization write pulse, can effectively improve array and averagely writes resistance, reduces write current, while the distribution of resistance of phase change memory array is more concentrated.
Description
Technical field
The invention belongs to micro-nano electronics art, be related to a kind of phase-changing memory unit write initial method and its
Array writes initial method.
Background technology
Phase transition storage (Phase change random access memory, PCRAM) be it is a kind of it is novel it is non-volatile with
Machine memory, completely compatible with CMOS standard technologies in technique and fast with service speed, fatigue resistance is good and micro
Property the features such as, in low pressure, low-power consumption, high speed has boundless commercial promise in terms of high density and embedded storage.PCRAM
It is considered as the next-generation nonvolatile memory of most possible substitution flash memory (FLASH).
Phase transition storage stores data by using the crystalline state and amorphous character of phase-change material.The amorphous of phase-change material
Conversion between state and crystalline state is realized by operation electric current heating.When the big electricity for applying a narrow spaces to phase-change material
Pulse is flowed, Flashmelt and the quenching of phase-change material is realized, causes phase-change material from crystalline state to amorphous transformation, that is, phase
Become transformation of the material from low-resistance to high resistant, is referred to as to write process (RESET processes).The amorphous state of this high resistant is known as RESET shapes
State, corresponding data " 0 ".When the moderate current impulse of the amplitude for applying a long pulsewidth to phase-change material, phase-change material is realized
Crystallization in the crystallization temperature, causes transformation of the phase-change material from amorphous state to crystalline state, that is, phase-change material from high-impedance state to
The transformation of low resistance state is referred to as journey (SET processes) of nuzzling up.The amorphous state of this low-resistance is known as SET state, corresponding data " 1 ".Phase
There are mainly two types of grain structures for the crystalline state of transition storage, are centroid structure (FCC) and hexagonal structure (HEX) respectively.Wherein, HEX
Crystal grain in the fabrication process, since high annealing is formed.Initial conditions of the phase-changing memory unit after manufacture are HEX brilliant
Grain.FCC crystal grain is the non-crystalline areas process recrystallization formation in phase-changing memory unit, is mainly distributed on around hearth electrode.Again
Phase-change memory cell after crystallization is broadly divided into the HEX grained regions other than the FCC grained regions of hearth electrode and the region.
FCC crystal grain has the difference in terms of many qualitative difference, especially heat conduction with HEX crystal grain, and the difference of heat conduction mainly can shadow
Ring the Temperature Distribution of phase-change memory cell.
Phase transition storage to write resistance sizes mainly related with phase-change memory cell melt region size and cool time.And
The melt region size of phase-change memory cell is in addition to by write current, other than the factors such as electrode material influence, also with FCC crystal grain area
The size in domain is related.FCC grained regions are bigger, and under the conditions of identical write current, phase-change memory cell melt region is bigger.In addition,
Phase transition storage is after excessive current practice, it may appear that writes the phenomenon that resistance reduces, this phenomenon is known as " cross and write "
(overRESET).Write current size-dependence density and the service life of phase transition storage, while forming sternness to the reduction of power consumption
Challenge；Writing resistance sizes not only influences the success rate that the data of phase transition storage store, while affecting the number of phase transition storage
According to stability.
Therefore, how to provide a kind of phase-changing memory unit write initial method and its array write initial method,
To reduce the write current size of phase transition storage, resistance sizes are write in raising, become urgently to be resolved hurrily one of those skilled in the art
Important technological problems.
Invention content
In view of the foregoing deficiencies of prior art, writing the purpose of the present invention is to provide a kind of phase-changing memory unit
Initial method and its array write initial method, larger for solving phase transition storage write current in the prior art, cause
The problem of power consumption of phase-change memory is higher, stability reduces.
In order to achieve the above objects and other related objects, what the present invention provided a kind of phase-changing memory unit writes initialization side
Method includes the following steps：
S1：Phase-changing memory unit is operated using initialization write pulse, amorphous is formed in the phase-changing memory unit
Region；The non-crystalline areas is more than the non-crystalline areas that phase transition storage acquiescence write pulse generates；
S2：The phase-changing memory unit is operated to low resistive state using pulse is wiped, makes the initialization write pulse shape
At non-crystalline areas be converted into face-centered cubic grained region；
S3：Using phase-changing memory unit described in default write pulse operation.
Optionally, the initialization write pulse and the acquiescence write pulse are current impulse, and arteries and veins is write in the initialization
Amplitude of the amplitude of punching higher than the acquiescence write pulse.
Optionally, the wiping pulse is DC current pulse, keeps the non-crystalline areas that the initialization write pulse is formed complete
Holocrystalline.
Optionally, in the step S3, further measure phase-changing memory unit writes resistance R1, and with initialization
The resistance R0 that writes of preceding phase-changing memory unit is compared, if meeting R1>R0 then initializes completion.
Optionally, if being unsatisfactory for R1>R0 then increases the amplitude of initialization write pulse, and repeating said steps S1-S3.
Initial method is write the present invention also provides a kind of phase change memory array, any one of the above phase transformation is used to deposit
Storage unit writes initial method to needing the phase-changing memory unit initialized into row write in the phase change memory array
Into row write initialization operation.
Optionally, judge whether the phase-changing memory unit needs to include following steps into row write initialization package：
Current phase-changing memory unit is selected by addressing circuit；
Current phase transition storage list is read using the current phase-changing memory unit of default write pulse operation, and using reading circuit
Member writes resistance；
The resistance of writing of current phase-changing memory unit is write resistance with target and is compared；
If the resistance of writing of current phase-changing memory unit writes resistance more than target, current phase-changing memory unit does not need
It is initialized into row write；If the resistance of writing of current phase-changing memory unit writes resistance, current phase-changing memory unit less than target
It needs to initialize into row write.
Optionally, the target writes resistance more than the reading judgment threshold for writing resistance.
Optionally, using progressive mode to needing to initialize into the phase-changing memory unit that row write initializes into row write,
In, rear primary initialization write pulse amplitude increases an increment on the basis of preceding primary initialization write pulse amplitude；Work as phase
The resistance of writing of transition storage unit reaches target and writes resistance, completes to the initialization of writing of the unit, is otherwise carried out down to the unit
Primary initialization.
Optionally, the initial value of the initialization write pulse is greater than or equal to the amplitude of the acquiescence write pulse.
Optionally, the increment is the integral multiple of the write current benchmark of write circuit.
Optionally, when in array the phase-changing memory unit in need for write initialization write initialization after, initialization
Terminate.
As described above, the phase-changing memory unit of the present invention write initial method and its array write initial method,
It has the advantages that：By the present invention in that with initialization write pulse, the FCC grained regions of array each unit are controlled
System can effectively improve array and averagely write resistance, reduce write current, while the distribution of resistance of phase change memory array is more collected
In.
Description of the drawings
Fig. 1 is shown as the flow chart for writing initial method of the phase-changing memory unit of the present invention.
Fig. 2 is shown as the timing chart of the phase-changing memory unit of the present invention write used in initial method.
Fig. 3 is shown as a kind of implementing procedure figure for writing initial method of the phase change memory array of the present invention.
The phase change memory array that Fig. 4 is shown as the present invention is write in a kind of embodiment of initial method, and phase transformation is deposited
Memory array compares into the distribution of resistance of writing before and after row write initialization process.
Component label instructions
S1~S3 steps
Specific implementation mode
Illustrate that embodiments of the present invention, those skilled in the art can be by this specification below by way of specific specific example
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
It please refers to Fig.1 to Fig.4.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, package count when only display is with related component in the present invention rather than according to actual implementation in schema then
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can be a kind of random change, and its
Assembly layout kenel may also be increasingly complex.
Embodiment one
What the present invention provided a kind of phase-changing memory unit writes initial method, referring to Fig. 1, being shown as the stream of this method
Cheng Tu includes the following steps：
S1：Phase-changing memory unit is operated using initialization write pulse, amorphous is formed in the phase-changing memory unit
Region；The non-crystalline areas is more than the non-crystalline areas that phase transition storage acquiescence write pulse generates；
S2：The phase-changing memory unit is operated to low resistive state using pulse is wiped, makes the initialization write pulse shape
At non-crystalline areas be converted into face-centered cubic grained region；
S3：Using phase-changing memory unit described in default write pulse operation.
As an example, the initialization write pulse and the acquiescence write pulse are current impulse, and the initialization is write
Amplitude of the amplitude of pulse higher than the acquiescence write pulse.The wiping pulse is required to so that non-crystalline areas is fully crystallized, excellent
Choosing uses DC current pulse.
As an example, referring to Fig. 2, the phase-changing memory unit for being shown as the present invention is write used in initial method
A kind of timing chart.Initialization write pulse is applied to phase-changing memory unit first, due to the initialization write pulse
Amplitude can form one higher than the amplitude for giving tacit consent to write pulse, therefore after initialization write pulse operation inside unit
Big non-crystalline areas, the non-crystalline areas are bigger than the non-crystalline areas that acquiescence write pulse generates.Then phase-changing memory unit is applied
Add wiping pulse, the pulsewidth of the wiping pulse will initialize the amorphous area of write pulse formation enough fully by unit operation to low-resistance
Domain sufficient crystallising.After initializing the non-crystalline areas sufficient crystallising that write pulse is formed, which can be converted to a face-centered cubic
(FCC) crystal region of crystal grain.The crystal region of the FCC crystal grain is compared with the FCC grained regions inside the unit before no initializtion
Greatly, thus, identical write current effect under, will produce a higher thermo parameters method so that identical write current act on
Under, the melt region of unit expands, and unit writes resistance raising.Finally, acquiescence write pulse is applied to phase-changing memory unit, it should
Write pulse is the write pulse of phase transition storage acquiescence, since by initializing, the FCC grained regions of unit expand, thus silent
Recognize under the action of write pulse, the non-crystalline areas area formed is more than the non-crystalline areas area that initialization is formed before, writes resistance
It improves.
Specifically, can further measure phase-changing memory unit writes resistance R1, and with phase transition storage before initialization
The resistance R0 that writes of unit is compared, if meeting R1>R0 then initializes completion.If being unsatisfactory for R1>R0 then increases initialization and writes
The amplitude of pulse, and repeating said steps S1-S3 write resistance until writing resistance and reaching target.
The initial method of writing of the phase-changing memory unit of the present invention deposits phase transformation using the initialization write current of high-energy
The distributed areas of different crystal grain optimize inside storage unit, and realizing reduces phase-changing memory unit write current, and electricity is write in raising
The function of resistance.
Embodiment two
Initial method is write the present invention also provides a kind of phase change memory array, the phase transformation in embodiment one is used to deposit
Storage unit writes initial method to needing the phase-changing memory unit initialized into row write in the phase change memory array
Into row write initialization operation.
Since for phase change memory array, wherein each unit is due to position, the influence of the factors such as technique, in write operation
Aspect of performance have otherness.Whether each unit is needed to write initial having differences property of progress, in addition in array
Needing the initialization condition of each unit initialized, there is also othernesses.Thus, each list should be directed to for the initialization of array
Member is initialized respectively, and sets the standard of identical assessment initialization effect.Setting writes resistance standard according to actual
Requirement setting is write, the reading judgment threshold for writing resistance is generally higher than.Wherein, read judgment threshold be used in read operation, by with
Cell resistance is compared to determine the data of the unit.When cell resistance is higher than judgment threshold is read, it is ' 0 ' to read data；
Otherwise, it is ' 1 '.Usually, write operation is being carried out, i.e., when structural unit data are ' 0 ', the cell resistance of construction, which need to be higher than, to be read to sentence
Disconnected threshold value, and cell resistance is higher, is more conducive to read operation and accurately reads data.So the present invention is into row write when initializing,
In order to reserve comparable redundancy, the resistance standard of writing of setting is generally greater than reading judgment threshold.
As an example, judging whether the phase-changing memory unit needs to include following steps into row write initialization package：
1) current phase-changing memory unit is selected by addressing circuit；
2) the current phase-changing memory unit of default write pulse operation is used, and current phase transition storage is read using reading circuit
Unit writes resistance；The write current arteries and veins having the same that is used when acquiescence write pulse and the phase transition storage normal use is high,
Width parameter；
3) after writing process, the resistance of writing of current phase-changing memory unit is write resistance with target and is compared；This reality
It applies in example, the target writes resistance and is more than the reading judgment threshold for writing resistance；
4) if the resistance of writing of current phase-changing memory unit writes resistance more than target, current phase-changing memory unit is not required to
It to be initialized into row write；If the resistance of writing of current phase-changing memory unit writes resistance, current phase transition storage list less than target
Member needs to initialize into row write.
As an example, after judging the memory cell for needing to initialize into row write, using progressive mode to need into
The phase-changing memory unit of row write initialization is initialized into row write, wherein rear primary initialization write pulse amplitude is preceding primary
Increase an increment on the basis of initialization write pulse amplitude；When the resistance of writing of phase-changing memory unit reaches target and writes resistance,
The initialization of writing of the unit is completed, otherwise the unit is initialized next time.Wherein, rear primary initialization write current phase
The reference current of writing for writing driving circuit is generally for the amplitude increment of preceding primary initialization write current, it also can be according to actual circuit
It is adjusted.
Why progressive mode is used, is because the initialization write current of each unit is unknown, thus initializes electricity selected
It when stream, needs to be incremented by from small to large, and writes resistance by what the write pulse of acquiescence generated and assess the initialization to the unit
Whether complete.Can not only make in this way array each unit into cross initialize after obtain it is more similar write resistance, while can also have
The avoiding in initialization procedure of effect " crosses and writes " phenomenon caused by initial galvanic current is excessive.
As an example, the initial value of the initialization write pulse is greater than or equal to the amplitude of the acquiescence write pulse, preferably
For (be no more than acquiescence write current 10%) suitable with acquiescence write current.The increment is the integer of the write current benchmark of write circuit
Times, the preferably equal to write current benchmark of write circuit.Because in general, write current benchmark be write current minimal adjustment unit,
Write circuit realizes the generation of write current by multiplying write current benchmark again.When being initialized into row write, initialization electricity is write every time
The increment of stream should be the multiple of write current benchmark, and multiple is bigger, and the speed of initialization is faster, still, right since increment is more extensive
Some units may occur in which " cross and write " phenomenon.In order to avoid " cross and write ", generally using write current benchmark as increment.
When in array the phase-changing memory unit in need for write initialization write initialization after, initialization terminates.
As an example, Fig. 3 shows a kind of implementing procedure for writing initial method of the phase change memory array of the present invention
Figure, includes the following steps：
1) initialization starts；
2) phase-changing memory unit currently initialized by the selection of addressing circuit；
3) current phase-changing memory unit is operated using acquiescence write pulse, verifies whether the unit needs to carry out just
Beginningization processing.After writing process, resistance is write using reading circuit reading active cell；
4) resistance of writing of active cell is write resistance with target and is compared；
If 5) resistance of writing of active cell writes resistance more than target, unit initialization no longer needs to carry out at initialization
Reason, then carry out the initialization of next unit；
If the resistance of writing of active cell writes resistance less than target, initialization process is carried out to the unit；First, preceding primary
With certain increment increase initialization write current on the basis of initialization write current, and unit is grasped using the initialization write pulse
Make, then, using pulse is wiped by unit operation to low resistive state, further execute above-mentioned steps 3), and carry out down, so
Cycle；
6) after the unit initialization of array institute some need initialization, initialization terminates.
Divide in the resistance of writing passed through before and after writing initialization process as an example, Fig. 4 is shown as one piece of phase change memory array
Cloth compares, and ordinate is cumulative probability, and abscissa is Log (Res).The phase transition storage permutation size is 4K bits.In figure
Distribution of resistance shown in square is before carrying out initialization process, and by 1.0mA, the resistance that the write pulse of 200ns generates divides
Cloth.Distribution of resistance shown in figure intermediate cam shape is before carrying out initialization process, and by 1.3mA, the write pulse of 200ns generates
Distribution of resistance.As it can be seen that bigger write current generates distribution of resistance that is higher and more concentrating.And it is electric shown in circle in figure
Resistance is distributed as after carrying out initialization process, by 1.0mA, the distribution of resistance of the write pulse generation of 200ns.As it can be seen that initial
Change before and after the processing, using identical 1.0mA, the distribution of resistance that the write pulse of 200ns generates is completely different.By initialization process
Later, the distribution of resistance that identical electric current generates is higher and more concentrates.In addition, 1.0mA is used after initialization process,
The distribution of resistance that the write pulse of 200ns generates uses 1.3mA, the resistance of the write pulse generation of 200ns before with initialization process
Distribution is substantially suitable.As it can be seen that after by initialization process, the write current that phase change memory array needs realizes reduction.
In conclusion the phase-changing memory unit of the present invention write initial method and its array to write initial method logical
It crosses using initialization write pulse, the FCC grained regions of array each unit is controlled, array is can effectively improve and averagely writes electricity
Resistance reduces write current, while the distribution of resistance of phase change memory array is more concentrated.So the present invention effectively overcomes now
There is the various shortcoming in technology and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology can all carry out modifications and changes to above-described embodiment without violating the spirit and scope of the present invention.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should by the present invention claim be covered.
Claims (11)
1. a kind of phase-changing memory unit writes initial method, which is characterized in that include the following steps：
S1：Phase-changing memory unit is operated using initialization write pulse, non-crystalline areas is formed in the phase-changing memory unit；
Wherein, the non-crystalline areas does not carry out the initialization write pulse operation more than the phase-changing memory unit, and as a comparison
Directly use non-crystalline areas caused by phase-changing memory unit described in default write pulse operation；
S2：The phase-changing memory unit is operated to low resistive state using pulse is wiped, the initialization write pulse is made to be formed
Non-crystalline areas is converted into face-centered cubic grained region；
S3：Using phase-changing memory unit described in the default write pulse operation；
S4：Measure the phase-changing memory unit writes resistance R1, and is operated with the initialization write pulse is not carried out, and conduct
Comparison is directly compared using the resistance R0 that writes of phase-changing memory unit described in the default write pulse operation, if meeting R1>
R0 then initializes completion.
2. phase-changing memory unit according to claim 1 writes initial method, it is characterised in that：The initialization is write
Pulse and the acquiescence write pulse are current impulse, and the amplitude of the initialization write pulse is higher than the acquiescence write pulse
Amplitude.
3. phase-changing memory unit according to claim 1 writes initial method, it is characterised in that：The wiping pulse is
DC current pulse makes the non-crystalline areas that the initialization write pulse is formed be fully crystallized.
4. phase-changing memory unit according to claim 1 writes initial method, it is characterised in that：If being unsatisfactory for R1>
R0 then increases the amplitude of initialization write pulse, and repeating said steps S1-S3.
5. a kind of phase change memory array writes initial method, it is characterised in that：Using such as claim 1-4 any one institute
That states writes initial method to being needed in the phase change memory array into the phase-changing memory unit that row write initializes into row write
Initialization operation.
6. phase change memory array according to claim 5 writes initial method, it is characterised in that：Judge the phase transformation
Whether memory cell needs to include following steps into row write initialization package：
Current phase-changing memory unit is selected by addressing circuit；
Current phase-changing memory unit is read using the current phase-changing memory unit of default write pulse operation, and using reading circuit
Write resistance；
The resistance of writing of current phase-changing memory unit is write resistance with target and is compared；
If the resistance of writing of current phase-changing memory unit writes resistance more than target, current phase-changing memory unit need not carry out
Write initialization；If the resistance of writing of current phase-changing memory unit writes resistance less than target, current phase-changing memory unit needs
It is initialized into row write.
7. phase change memory array according to claim 6 writes initial method, it is characterised in that：The target writes electricity
Resistance is more than the reading judgment threshold for writing resistance.
8. phase change memory array according to claim 5 writes initial method, it is characterised in that：Using progressive mode
To needing to initialize into the phase-changing memory unit that row write initializes into row write, wherein rear primary initialization write pulse amplitude
Increase an increment on the basis of preceding primary initialization write pulse amplitude；When the resistance of writing of phase-changing memory unit reaches target
Resistance is write, the initialization of writing of the unit is completed, otherwise the unit is initialized next time.
9. phase change memory array according to claim 8 writes initial method, it is characterised in that：The initialization is write
The amplitude of the initial value of pulse is greater than or equal to the amplitude of the acquiescence write pulse.
10. phase change memory array according to claim 8 writes initial method, it is characterised in that：The increment is
The integral multiple of the write current benchmark of write circuit.
11. phase change memory array according to claim 5 writes initial method, it is characterised in that：When institute in array
After the phase-changing memory unit in need initialized into row write writes initialization, initialization terminates.
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| US11139034B1 (en) | 2020-07-15 | 2021-10-05 | Micron Technology, Inc. | Data-based polarity write operations |
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| CN1825613A (en) * | 2005-01-12 | 2006-08-30 | 三星电子株式会社 | Method of operating and structure of phase change random access memory (pram) |
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| EP2355105B1 (en) * | 2010-02-02 | 2013-01-09 | Nxp B.V. | Phase change memory programming method and phase change memory |
| JP6084521B2 (en) * | 2013-06-20 | 2017-02-22 | 株式会社日立製作所 | Phase change device |
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| CN1664953A (en) * | 2004-02-04 | 2005-09-07 | 三星电子株式会社 | Phase-change memory device and method of writing a phase-change memory device |
| CN1825613A (en) * | 2005-01-12 | 2006-08-30 | 三星电子株式会社 | Method of operating and structure of phase change random access memory (pram) |
| CN101106174A (en) * | 2006-05-30 | 2008-01-16 | 三星电子株式会社 | Method for reducing a reset current for resetting a portion of a phase change material in a memory cell of a phase change memory device and the phase change memory device |
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| CN103563001A (en) * | 2011-03-21 | 2014-02-05 | 英特尔公司 | Method and apparatus to reset a phase change memory and switch (pcms) memory cell |
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