CN105840174A - Difference sum circuit in lateral logger - Google Patents
Difference sum circuit in lateral logger Download PDFInfo
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- CN105840174A CN105840174A CN201510019953.7A CN201510019953A CN105840174A CN 105840174 A CN105840174 A CN 105840174A CN 201510019953 A CN201510019953 A CN 201510019953A CN 105840174 A CN105840174 A CN 105840174A
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Abstract
The invention provides a difference sum circuit in a lateral logger, and the circuit is used for an acquisition circuit on the front end of an acquisition system in a lateral logger. The difference sum circuit in a lateral logger comprises a difference sum output end and N input ends, wherein N is an even number larger than or equal to 2. For N signals respectively input from the N input ends, the difference sum circuit obtains the difference of each two signals, and obtains N/2 signal differences, and performs summation on the N/2 signal differences, and outputs the obtained sum from the difference sum output end. The difference sum circuit performs subtraction on each two input signals of the plurality of signals, and then performs summation on the differences of each two signals, so as to reduce error of signal acquisition and improve measuring precision of the front end of the acquisition system.
Description
Technical field:
The present invention relates to difference and the circuit of a kind of signal acquiring system front end in lateralog.
Background technology
In lateralog, need multiple signals of signal acquiring system collection are calculated.In the past, typically the multiple signals gathered first are sued for peace two-by-two again to signal two-by-two and ask poor, here, by this circuit referred to as " and difference circuit ".Due to this and difference circuit itself, it is likely to result in signals collecting result and there is bigger error, it is therefore desirable to a kind of precision higher process circuit.
Summary of the invention:
In view of the above problems, it is an object of the invention to provide the difference in a kind of lateralog and circuit, difference is asked again signal two-by-two to be differed from summation the most two-by-two multiple signals of input such that it is able to reduce the error of signals collecting, improve the certainty of measurement of acquisition system front end.
In order to solve the problems referred to above, the difference in the lateralog of the present invention and circuit, including difference and outfan and N number of input, wherein, N is greater than the even number equal to 2;N number of signal that described difference and circuit will input respectively from described N number of input, the difference that every 2 signals are obtained these 2 signals obtains N/2 signal difference, to described N/2 signal difference summation, by obtained and export from described difference and outfan.
Additionally, in difference in the lateralog of the present invention and circuit, also include that summation operation amplifying circuit and N/2 is sought difference operation amplifying circuit, wherein, described summation operation amplifying circuit has described difference and outfan and N/2 input, ask difference operation amplifying circuit to have described in each and ask poor outfan and 2 inputs, ask poor outfan N/2 the input respectively with described summation operation amplifying circuit of asking of difference operation amplifying circuit to be connected for described N/2;Difference operation amplifying circuit is respectively asked respectively 2 signals from respective 2 inputs input to be asked poor, by obtained signal difference via the respective input asking poor outfan to export described summation operation amplifying circuit;Described summation operation amplifying circuit is to the signal difference summation from described N/2 input input, by obtained and export from described difference and outfan.
Multiple signals of input are asked difference again signal two-by-two to be differed from summation, it is possible to reduce the error of signals collecting, improve the certainty of measurement of acquisition system front end by the difference in the lateralog of the present invention and circuit the most two-by-two.
Accompanying drawing explanation
Fig. 1 is the schematic block diagram of the difference in the lateralog of the present invention and circuit.
Fig. 2 is the schematic circuit of the difference in the lateralog of the present invention and circuit.
Detailed description of the invention
Some term is used to refer to particular system component in present specification from start to finish.As skilled in the art will recognize, generally can indicate identical parts by different titles, thus present specification is not intended to distinguish those simply at the most different rather than the most different parts.In present specification, use term " to include " with open form, " comprising " and " having ", " possessing ", and therefore should be construed as meaning " including but not limited to ... ".
Multiple signals of input are asked difference again signal two-by-two to be differed from summation by the difference in the lateralog of the present invention and circuit the most two-by-two.Hereinafter, with reference to the accompanying drawings the difference in the lateralog of the present invention and circuit are described in detail.
Fig. 1 is the schematic block diagram of the difference in the lateralog of the present invention and circuit.
As shown in Figure 1, difference and circuit 100 in the lateralog of the present invention include 1 difference and outfan (i.e., ' Out ' in accompanying drawing 1) and 6 inputs, 6 signals In1, In2, In3, In4, In5, the In6 that will input respectively from 6 inputs, every 2 signals are asked difference obtain 3 signal difference In1-In2, In3-In4, In5-In6, to this 3 signal difference summation, by obtained and export from difference and outfan Out, Out=(In1-In2)+(In3-In4)+(In5-In6).
6 signals of input are asked difference again signal two-by-two to be differed from summation, it is possible to reduce the error of signals collecting, are improved the certainty of measurement of acquisition system front end by the difference in the lateralog of the present invention shown in Fig. 1 and circuit the most two-by-two.
Fig. 2 is the schematic circuit of the difference in the lateralog of the present invention and circuit.
As in figure 2 it is shown, difference in the lateralog of the present invention and circuit 200 include the 1st seeking difference operation amplifying circuit, the 2nd asking difference operation amplifying circuit and summation operation amplifying circuit.
1st asks difference operation amplifying circuit have resistance R1, resistance R2, resistance R5, resistance R6, operational amplifier IC1, the 1st input INPUTA, the 2nd input INPUTB and seek poor outfan with the input INPUTE of summation operation amplifying circuit is connected.
1st asks the 1st input INPUTA of difference operation amplifying circuit to be connected via an input of resistance R1 and operational amplifier IC1, and the 2nd input INPUTB is connected via another input of resistance R2 and operational amplifier IC1.One input of resistance R1 and operational amplifier IC1 is connected via the outfan of resistance R5 with operational amplifier IC1.Another input of resistance R2 and operational amplifier IC1 is via resistance R6 ground connection.1st asks the poor outfan of asking of difference operation amplifying circuit to be connected with the input INPUTE of summation operation amplifying circuit.
1st asks difference operation amplifying circuit that the signal from the 1st input INPUTA input and the signal from the 2nd input INPUTB input are asked poor, obtains the 1st signal difference, is input to the input INPUTE of summation operation amplifying circuit via the 1st outfan.
2nd asks difference operation amplifying circuit have resistance R3, resistance R4, resistance R7, resistance R8, operational amplifier IC2, the 1st input INPUTC, the 2nd input INPUTD and seek poor outfan with the input INPUTF of summation operation amplifying circuit is connected.
2nd asks the 3rd input INPUTC of difference operation amplifying circuit to be connected via an input of resistance R3 and operational amplifier IC2, and the 4th input INPUTD is connected via another input of resistance R4 and operational amplifier IC2.One input of resistance R3 and operational amplifier IC2 is connected via the outfan of resistance R7 with operational amplifier IC2.Another input of resistance R4 and operational amplifier IC2 is via resistance R8 ground connection.2nd asks the poor outfan of asking of difference operation amplifying circuit to be connected with the input INPUTF of summation operation amplifying circuit.
2nd asks difference operation amplifying circuit that the signal from the 3rd input INPUTC input and the signal from the 4th input INPUTD input are asked poor, obtains the 2nd signal difference, is input to the input INPUTF of summation operation amplifying circuit via the 2nd outfan.
Summation operation amplifying circuit has resistance R9, resistance R10, resistance R11, resistance R12, operational amplifier IC3, input INPUTE, input INPUTF and difference and outfan OUTPUT.
Via resistance R9, input INPUTF is connected the input INPUTE of summation operation amplifying circuit via an input of resistance R10 and operational amplifier IC3.Another input of operational amplifier IC3 is via resistance R12 ground connection.Resistance R9, resistance R10 with operational amplifier IC2 input via resistance R11 is the poorest with the outfan of operational amplifier IC3 and outfan is connected.
The summation operation amplifying circuit the 1st signal difference to inputting from input INPUTE and the 2nd signal difference summation from input INPUTF input, by gained and output to difference and outfan OUTPUT.
Above, with reference to the accompanying drawings the difference in the lateralog of the present invention and circuit have been described in detail.But the invention is not restricted to this, those skilled in the art can carry out deformation and simple replacement to it completely according to specific needs.Such as, Fig. 1 is difference and the circuit of 6 input 1 outputs, and Fig. 2 is difference and the circuit of 4 input 1 outputs, it is apparent that the invention is not restricted to 6 inputs or 4 inputs, can be any number of input, as long as even number input.It addition, Fig. 2 is only the difference of the present invention and the example of a physical circuit of circuit, the invention is not restricted to this, as long as being capable of asking difference that signal two-by-two differs from the process of summation more two-by-two the multiple signals inputted.
Claims (2)
1. the difference in a lateralog and circuit, it is characterised in that:
Described difference and circuit include difference and outfan and N number of input, and wherein, N is greater than the even number equal to 2;
N number of signal that described difference and circuit will input respectively from described N number of input, the difference that every 2 signals are obtained these 2 signals obtains N/2 signal difference, to described N/2 signal difference summation, by obtained and export from described difference and outfan.
2. the difference in lateralog as claimed in claim 1 and circuit, it is characterised in that
Described difference and circuit include that summation operation amplifying circuit and N/2 is sought difference operation amplifying circuit, wherein, described summation operation amplifying circuit has described difference and outfan and N/2 input, ask difference operation amplifying circuit to have described in each and ask poor outfan and 2 inputs, ask poor outfan N/2 the input respectively with described summation operation amplifying circuit of asking of difference operation amplifying circuit to be connected for described N/2;
Difference operation amplifying circuit is respectively asked respectively 2 signals from respective 2 inputs input to be asked poor, by obtained signal difference via the respective input asking poor outfan to export described summation operation amplifying circuit;
Described summation operation amplifying circuit is to the signal difference summation from described N/2 input input, by obtained and export from described difference and outfan.
Priority Applications (1)
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CN201510019953.7A CN105840174B (en) | 2015-01-15 | 2015-01-15 | Difference sum circuit in lateral logging instrument |
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CN201510019953.7A CN105840174B (en) | 2015-01-15 | 2015-01-15 | Difference sum circuit in lateral logging instrument |
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CN105840174A true CN105840174A (en) | 2016-08-10 |
CN105840174B CN105840174B (en) | 2021-02-26 |
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CN85107740A (en) * | 1985-10-19 | 1987-04-22 | 南京航空学院 | Electric and electrically operated sitting module pressure regulator and control method thereof |
US5001926A (en) * | 1988-11-10 | 1991-03-26 | Institut Francais Du Petrole | Device for determining the vertical distance between two elements at unequal heights |
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CN101232172A (en) * | 2007-01-26 | 2008-07-30 | 三菱电机株式会社 | Circuit breaker |
CN101377932A (en) * | 2007-08-27 | 2009-03-04 | 日立乐金资料储存股份有限公司 | Method for adjusting a focus position on an optical disc and an optical disc apparatus applying the same therein |
WO2011130080A3 (en) * | 2010-04-12 | 2012-01-19 | Baker Hughes Incorporated | Improved current measurement for water-based mud galvanic electrical imaging and laterlog tools |
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