CN105826403A - High potential induced degradation (PID) resistance monocrystalline multilayer passivation antireflection film and preparation method thereof - Google Patents
High potential induced degradation (PID) resistance monocrystalline multilayer passivation antireflection film and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 238000002161 passivation Methods 0.000 title abstract description 12
- 230000015556 catabolic process Effects 0.000 title 1
- 238000006731 degradation reaction Methods 0.000 title 1
- 229910004205 SiNX Inorganic materials 0.000 claims abstract description 32
- 230000003287 optical effect Effects 0.000 claims abstract description 29
- 238000005457 optimization Methods 0.000 claims abstract description 28
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 15
- 229910020286 SiOxNy Inorganic materials 0.000 claims abstract description 14
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000001301 oxygen Substances 0.000 claims abstract description 14
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 14
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 13
- 239000007789 gas Substances 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 238000000151 deposition Methods 0.000 claims abstract description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 238000007747 plating Methods 0.000 claims description 4
- 230000003247 decreasing effect Effects 0.000 claims description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 2
- 238000012545 processing Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 abstract description 80
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 13
- 229910052710 silicon Inorganic materials 0.000 abstract description 13
- 239000010703 silicon Substances 0.000 abstract description 13
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 5
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 239000013078 crystal Substances 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 abstract description 3
- 239000002356 single layer Substances 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 16
- 230000000694 effects Effects 0.000 description 7
- 239000006117 anti-reflective coating Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 230000009466 transformation Effects 0.000 description 4
- 230000006698 induction Effects 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 235000008216 herbs Nutrition 0.000 description 2
- 238000011031 large-scale manufacturing process Methods 0.000 description 2
- 238000012827 research and development Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 230000001131 transforming effect Effects 0.000 description 2
- 238000010792 warming Methods 0.000 description 2
- 210000002268 wool Anatomy 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000008280 blood Substances 0.000 description 1
- 210000004369 blood Anatomy 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 235000013842 nitrous oxide Nutrition 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The present invention relates to a high PID resistance monocrystalline multilayer passivation antireflection film and a preparation method thereof. The preparation method comprises the steps of feeding a monocrystalline silicon piece in a plasma enhanced chemical vapor deposition (PECVD) furnace body after etching, firstly introducing in an oxygen-containing gas, such as the oxygen, the air, etc., and then depositing a multilayer passivation antireflection film, and finally arranging a bottom-layer SiNx layer, a single-layer or multilayer optical optimization layer SiNx layer and a top-layer optical optimization layer SiOxNy layer of which the refractive indexes decrease progressively on the right surface of a monocrystalline silicon piece substrate orderly from bottom to top, wherein the total film thickness is between 70 nm and 125 nm, and a total refractive index is between 1.90 and 2.10. According to the present invention, and based on a conventional monocrystalline silicon battery technology, the purpose of high PID resistance can be achieved by just changing the preparation method at the PECVD and a membraneous structure of the passivation antireflection film and without needing to add a SiOx layer on the surface of the silicon piece after etching specially by using an ozone device or other methods; the preparation method can be compatible with a conventional crystal silicon battery technology, and the monocrystalline multilayer passivation antireflection film can be produced by directly using a general etching device and a PECVD device, or by remolding slightly.
Description
Technical field
The present invention relates to solar energy crystal silicon battery and manufacture field, the monocrystalline multilamellar passivated reflection reducing of a kind of high PID resistance penetrates film and preparation method thereof.
Background technology
Along with environmental problem and energy problem obtain the concern of more and more people, solar cell is as a kind of clean energy resource, and people have had been introduced into a new stage to its research and development.PID (potentialinduceddegradation) effect refers under long-term action of high voltage, assembly exists between glass and encapsulating material leaky, causing surface passivation antireflective coating before this to lose efficacy, then PN junction lost efficacy, and finally made assembly property reduce.All there is certain PID Problem of Failure in the p-type solar energy crystal silicon component of traditional handicraft, so research PID phenomenon, develops one of the target that the solar cell of PIDFree is research and development department of vast solar energy manufacturer and part research institutions.More general and the strictest is double 85PID tests, and its test condition is the negative voltage of 1000V, the ambient temperature of 85 DEG C, the humidity of 85%, the testing time of 96h, assembly final peak power output attenuation ratio just can determine that as PID test passes, i.e. PIDFree less than 5%.
The SiNx passivated reflection reducing of tradition solar energy polycrystal battery surface is penetrated film layer and is nearly all made because refractive index is relatively low PID decay the most serious；Existing market is in order to pursue PIDFree, and main method is to improve the refractive index of SiNx film layer, but the more conventional technique of battery conversion efficiency reduces 1-2%；Also having method is exactly the ozone O using ultraviolet ionization, high frequency ozone generator to generate3Oxidized silicon chip surface, generates relatively thin SiOxLayer or use laughing gas N2OPECVD method directly deposits one layer of SiO at silicon chip surfacexThin film, makes battery have certain PID resistance.
On the other hand, the antireflective coating that in current large-scale production, polycrystalline battery surface is conventional mostly be two to three layers of silicon nitride, generally its optical thickness be specific wavelength 1/4th or 1/2nd.For single-layer silicon nitride silicon antireflective coating, it only has preferable anti-reflective effect to single wavelength, has of a relatively high reflectance and poor passivation effect.Reflectance can be reduced and improve the focus that the antireflective coating of passivation effect is solar cell research.
Summary of the invention
The technical problem to be solved in the present invention is: provide the monocrystalline multilamellar passivated reflection reducing of a kind of high PID resistance to penetrate film and preparation method thereof, this method need not use ozone devices or additive method silicon chip top layer after etching specially to increase SiOx layer, after directly using common etching apparatus and PECVD device or transforming a little；Passivated reflection reducing prepared by the method penetrates film can reduce reflectance, improves passivation effect, improves efficiency of solar cell, and has the most excellent anti-PID attenuation characteristic.
The technical solution adopted in the present invention is: the monocrystalline multilamellar passivated reflection reducing of a kind of high PID resistance penetrates film, is included in the bottom SiN that monocrystalline silicon piece substrate front surface sets gradually from bottom to topxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyLayer；Described bottom SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyThe refractive index of layer is successively decreased；Described bottom SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyThe total film thickness of layer is 70～125nm, and total refractive index is 1.90～2.10.
Further, bottom SiN of the present inventionxLayer and single or multiple lift optical optimization layer SiNxLayer all uses PECVD to prepare；Described bottom SiNxThe refractive index of layer is 2.15～2.4, and thickness is 4～20nm；Described single or multiple lift optical optimization layer SiNxThe refractive index of layer is 1.95～2.25, and thickness is 20～65nm.
Further say, top layer optical optimization layer SiO of the present inventionxNyLayer uses PECVD by oxygen-containing gas and SiH4、NH3Deposition forms together；Its thickness is 15～60nm, and refractive index is 1.6～1.95.
Meanwhile, the present invention proposes the monocrystalline multilamellar passivated reflection reducing of a kind of high PID resistance and penetrates the preparation method of film, comprises the following steps:
1) monocrystalline silicon piece common process performs etching after processing；
2) after etching, monocrystalline silicon piece, by the PECVD cavity carrier feeding 300 DEG C to 550 DEG C, is passed through oxygen-containing gas 3min to 20min；
3) PECVD device plating multilamellar passivated reflection reducing is used to penetrate film；It is included in bottom high index of refraction SiN that monocrystalline silicon piece substrate front surface sets gradually from bottom to topxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyLayer；
4) use conventional batteries typography printing back electrode, aluminum back surface field, positive grid line and anelectrode, and sinter.
The principle of the present invention is: in after etching, monocrystalline silicon piece enters the PECVD cavity between 300 DEG C to 550 DEG C, is passed through the oxygen-containing gas such as oxygen or air with after certain time, and silicon chip surface grown the hot SiO of thin layer2Layer, this SiOx layer is finer and close, has preferable passivation effect, can effectively reduce the recombination-rate surface of cell piece；And this densification SiOx layer relatively thin (0.1nm-2nm), the tunneling effect of electronics is clearly, can by battery surface be enriched with a part of electric charge lead away from, prevent the potential induction attenuation (PID) because electric charge accumulation causes at battery surface, make battery have anti-PID attenuation characteristic.
Multilamellar passivated reflection reducing penetrates the SiN of film bottom high index of refractionxThe introducing of layer both can with reinforcing membrane layer passivation effect, again can the effective free positively charged ion in barrier assembly, be effectively improved battery anti-PID attenuation characteristic；Reduce multilamellar SiN the most successivelyxLayer can also be greatly reduced the reflectance of cell piece side to light while having certain PID resistance, it is possible to effectively reduces the reflectance of intermediate waves wave band, improves the short circuit current of cell piece；SiO in conjunction with top layer low-refractionxNyLayer so that the refractive index of integral membrane layer is lower, continues to increase incident ray ratio, and after improving short circuit current, and cell piece lamination, color is dark, and overall uniform colorless is poor.The polycrystalline multilayer film battery PID resistance using the method to prepare is splendid, and the assembly of preparation can be tested by the PID under the conditions of non-resistance EVA on market double 85, and battery conversion efficiency is higher than the conventional PECVD coating process of tradition.
The invention has the beneficial effects as follows: the present invention is based on tradition single crystal battery technique, preparation method when only changing PECVD and passivated reflection reducing penetrate the film quality structure of film, can be compatible with conventional crystalline silicon battery process, can produce after directly using common etching apparatus and PECVD device or transforming a little.The method to equipment and monocrystalline silicon piece without particular/special requirement, be easily achieved and owing to being passed through the oxygen-containing gas such as oxygen or air before depositional coating; do not have safety problem during vent gas treatment; it is applicable to large-scale production; also can operate with some advanced battery process, such as: the back of the body passivation cell, N-type double-side cell, MWT battery etc..
Accompanying drawing explanation
The present invention is further described with embodiment below in conjunction with the accompanying drawings.
Fig. 1 is the structural representation of the present invention；
In figure: 1, bottom SiNx layer；2, single or multiple lift optical optimization layer SiNxLayer；3, top layer optical optimization layer SiOxNyLayer.
Detailed description of the invention
Presently in connection with accompanying drawing and preferred embodiment, the present invention is further detailed explanation.These accompanying drawings are the schematic diagram of simplification, and the basic structure of the present invention is described the most in a schematic way, and therefore it only shows the composition relevant with the present invention.
The monocrystalline multilamellar passivated reflection reducing of a kind of high PID resistance as shown in Figure 1 penetrates membrane structure, is included in the bottom SiN that polysilicon chip substrate front surface sets gradually from bottom to topxLayer 1, single or multiple lift optical optimization layer SiNxLayer 2 and top layer optical optimization layer SiOxNyLayer 3.These film layer refractive indexs from bottom to top are successively decreased, and its total film thickness is 70～125nm, and total refractive index is 1.90～2.10.
It is further described below by two groups of embodiments:
Embodiment 1
1) by original silicon chip pretreatment, this pretreatment includes the making herbs into wool in battery process, spread and the technique such as etching；
2) it is warming up to 500 DEG C after the PECVD device of silicon chip entrance 380 DEG C after etching, first the logical oxygen-containing gas 20min such as oxygen or air in PECVD cavity；It is sequentially depositing multilamellar SiN that refractive index reduces the most successively again on polysilicon chip surfacexLayer, wherein bottom SiNxLayer, refractive index is 2.25, and thicknesses of layers is 20nm；Middle single-layer SiNxLayer, refractive index is 2.05, and thicknesses of layers is 30nm；Use PECVD device at diffusingsurface plating residue SiOxNyLayer, refractive index is 1.75, and thicknesses of layers is 35nm；
4) use conventional batteries typography printing back electrode, aluminum back surface field, positive grid line and anelectrode, and sinter.
Finding through detection, the photoelectric transformation efficiency of the solar battery sheet that the present embodiment obtains increases and PID resistance has bigger lifting.Concrete data see table 1:
The photoelectric transformation efficiency of the solaode that table 1 the present embodiment obtains and PID
As can be seen from Table 1: double-layer reflection reducing coating process efficiency gain 0.16% prepared by the method, mainly due to short-circuit current gain 60 milliamperes；The most double 85 condition PID (potential induction attenuation) power attenuations in 96 hours only have 1.7%, and within 192 hours, PID decays to 4.1%.
Embodiment 2
1) by original silicon chip pretreatment, this pretreatment includes the making herbs into wool in battery process, spread and the technique such as etching；
2) it is warming up to 550 DEG C after the PECVD device of silicon chip entrance 380 DEG C after etching, first the logical oxygen-containing gas 5min such as oxygen or air in PECVD cavity；It is sequentially depositing multilamellar SiN that refractive index reduces the most successively again on polysilicon chip surfacexLayer, wherein bottom SiNxLayer, refractive index is 2.35, and thicknesses of layers is 5nm.Centre is double-deck SiNx, its lower floor SiNxRefractive index is 2.15, and thicknesses of layers is 15nm；Its upper strata SiNxLayer, refractive index is 2.00, and thicknesses of layers is 30nm；Use PECVD device at diffusingsurface plating residue SiOxNyLayer, refractive index is 1.75, and thicknesses of layers is 40nm；
4) use conventional batteries typography printing back electrode, aluminum back surface field, positive grid line and anelectrode, and sinter.
Finding through detection, the photoelectric transformation efficiency of the solar battery sheet that the present embodiment obtains increases and PID resistance has bigger lifting.Concrete data see table 2:
The photoelectric transformation efficiency of the solaode that table 2 the present embodiment obtains and PID
As can be seen from Table 1: double-layer reflection reducing coating process efficiency gain 0.26% prepared by the method, mainly due to short-circuit current gain 85 milliamperes, filling FF increases by 0.05；PID (potential induction attenuation) power attenuation in 96 hours simultaneously only has 0.9%, and within 192 hours, PID decays to 3.4%, and battery PID pad value is the lowest.
The detailed description of the invention of the simply present invention described in description above, the flesh and blood of the present invention is not construed as limiting by various illustrations, person of an ordinary skill in the technical field after having read description can to before described detailed description of the invention make an amendment or deform, without departing from the spirit and scope of the invention.
Claims (4)
1. the monocrystalline multilamellar passivated reflection reducing of one kind high PID resistance penetrates film, it is characterised in that: it is included in the bottom SiN that monocrystalline silicon piece substrate front surface sets gradually from bottom to topxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyLayer；Described bottom SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyThe refractive index of layer is successively decreased；Described bottom SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyThe total film thickness of layer is 70～125nm, and total refractive index is 1.90～2.10.
The monocrystalline multilamellar passivated reflection reducing of high PID resistance the most as claimed in claim 1 penetrates film, it is characterised in that: described bottom SiNxLayer and single or multiple lift optical optimization layer SiNxLayer all uses PECVD to prepare；Described bottom SiNxThe refractive index of layer is 2.15～2.4, and thickness is 4～20nm；Described single or multiple lift optical optimization layer SiNxThe refractive index of layer is 1.95～2.25, and thickness is 20～65nm.
The monocrystalline multilamellar passivated reflection reducing of high PID resistance the most as claimed in claim 1 penetrates film, it is characterised in that: described top layer optical optimization layer SiOxNyLayer uses PECVD by oxygen-containing gas and SiH4、NH3Deposition forms together；Its thickness is 15～60nm, and refractive index is 1.6～1.95.
4. the monocrystalline multilamellar passivated reflection reducing of a high PID resistance as claimed in claim 1 penetrates the preparation method of film, it is characterised in that: comprise the following steps:
1) monocrystalline silicon piece common process performs etching after processing；
2) after etching, monocrystalline silicon piece, by the PECVD cavity carrier feeding 300 DEG C to 550 DEG C, is passed through oxygen-containing gas 3min to 20min；
3) PECVD device plating multilamellar passivated reflection reducing is used to penetrate film；It is included in bottom high index of refraction SiN that monocrystalline silicon piece substrate front surface sets gradually from bottom to topxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyLayer；
4) use conventional batteries typography printing back electrode, aluminum back surface field, positive grid line and anelectrode, and sinter.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023125776A1 (en) * | 2021-12-30 | 2023-07-06 | 天合光能股份有限公司 | Solar cell front passivation film layer |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080241421A1 (en) * | 2007-04-02 | 2008-10-02 | Miin Jang Chen | Optoelectronic device and method of fabricating the same |
| CN103700714A (en) * | 2013-12-24 | 2014-04-02 | 江苏顺风光电科技有限公司 | High-efficiency PID (Potential Included Degradation) Free solar single crystal silicon cell passivation antireflection film |
| CN104576770A (en) * | 2014-12-31 | 2015-04-29 | 江苏顺风光电科技有限公司 | Passivation and reflection reduction multi-layer film for high-efficiency black crystal silicon battery |
| CN104916710A (en) * | 2015-06-30 | 2015-09-16 | 江苏顺风光电科技有限公司 | High-efficiency polycrystalline multilayer passivation anti-reflection film structure with high PID resistance |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080241421A1 (en) * | 2007-04-02 | 2008-10-02 | Miin Jang Chen | Optoelectronic device and method of fabricating the same |
| CN103700714A (en) * | 2013-12-24 | 2014-04-02 | 江苏顺风光电科技有限公司 | High-efficiency PID (Potential Included Degradation) Free solar single crystal silicon cell passivation antireflection film |
| CN104576770A (en) * | 2014-12-31 | 2015-04-29 | 江苏顺风光电科技有限公司 | Passivation and reflection reduction multi-layer film for high-efficiency black crystal silicon battery |
| CN104916710A (en) * | 2015-06-30 | 2015-09-16 | 江苏顺风光电科技有限公司 | High-efficiency polycrystalline multilayer passivation anti-reflection film structure with high PID resistance |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023125776A1 (en) * | 2021-12-30 | 2023-07-06 | 天合光能股份有限公司 | Solar cell front passivation film layer |
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Application publication date: 20160803 |