CN105789282B - There is one kind part high dopant channel 4H-SiC gold half field effect should manage - Google Patents

There is one kind part high dopant channel 4H-SiC gold half field effect should manage Download PDF

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CN105789282B
CN105789282B CN201610256739.8A CN201610256739A CN105789282B CN 105789282 B CN105789282 B CN 105789282B CN 201610256739 A CN201610256739 A CN 201610256739A CN 105789282 B CN105789282 B CN 105789282B
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depressed area
sic
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cap layers
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CN105789282A (en
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贾护军
杨志辉
马培苗
杨银堂
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Xidian University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
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  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention belongs to field effect transistor technical fields, and especially disclosing one kind, there is part high dopant channel 4H-SiC gold half field effect should manage;It is intended to provide and can be improved output electric current and device transconductance, there is the one kind for improving frequency characteristic part high dopant channel 4H-SiC gold half field effect should manage;The technical solution of use are as follows: be provided with 4H-SiC semi-insulating substrate from bottom to top, p-type buffer layer, N-type channel layer, source cap layers and drain electrode cap layers are respectively set in the two sides of N-type channel layer, gate region is provided in the middle part of N-type channel layer and close to the side of source electrode cap layers, gate region channel depressed area and right side channel depressed area on the left of N-type channel two sides are formed, the depth of left side channel depressed area and right side channel depressed area is 0.05-0.1 μm, the width of left side channel is 0.5 μm, the width of right side channel is 1 μm, region is the channel highly doped regions with high-dopant concentration immediately below the channel depressed area of left side.

Description

There is one kind part high dopant channel 4H-SiC gold half field effect should manage
Technical field
The invention belongs to field effect transistor technical fields, and in particular to one kind has part high dopant channel 4H-SiC gold Half field effect should manage.
Background technique
SiC material has the materials outstanding such as broad-band gap, high breakdown electric field, high saturated electrons migration velocity, high heat conductance Material and electrology characteristic make it in high frequency high power device application, especially under the harsh environments such as high temperature, high pressure, space flight, satellite High frequency high power device application in have very big potentiality.In SiC paramorph, the closely packed wurtzite structure of hexagonal The electron mobility of 4H-SiC be nearly three times of 6H-SiC, therefore 4H-SiC material is in high frequency high power device, especially golden Belong in semiconductor field effect transistor (MESFET) application and occupies main status.
Currently, most of documents are dedicated to the research of dual recess 4H-SiC MESFET structure and on the basis of this structures It improves.The structure from bottom to up by 4H-SiC semi-insulating substrate, p-type buffer layer, N-type channel layer and N+ cap layers stack and At based on the stack layer, etching and form the N-type channel layer of recess after N+ cap layers, the source half length of grid is to N-type channel Layer sunken inside forms recessed grid structure, and the N-type channel layer of recess can be completed by reactive ion etching RIE technology.
Although the breakdown voltage of above-mentioned dual recess structure 4H-SiC MESFET is because the source half length of grid is to N-type channel Layer sunken inside and increase, but drain saturation current does not obtain substantive promotion.And in practical situations, reactive ion etching The process of RIE can form lattice damage on device drift region surface, and carrier effective mobility in N-type channel layer is caused to decline, And then drain current is reduced, the degeneration of saturation current is shown as on current output characteristics.
Summary of the invention
It is of the existing technology the purpose of the present invention is aiming at the shortcomings in the prior art, solving the problems, such as, it is desirable to provide One kind having part high-concentration dopant channel and can be improved output electric current and device transconductance, the one kind for improving frequency characteristic and has Part high dopant channel 4H-SiC field-effect tube.
To achieve the above object, the invention discloses following technical solutions:
There is one kind part high dopant channel 4H-SiC gold half field effect should manage, and be provided with the semi-insulating lining of 4H-SiC from bottom to top Source cap layers (4) and drain electrode are respectively set in bottom (1), p-type buffer layer (2), N-type channel layer (3), the two sides of N-type channel layer (3) Active electrode (6) and drain electrode (7), N-type is respectively set in the surface of cap layers (5), the source electrode cap layers (4) and drain electrode cap layers (5) It is provided with gate region (10) in the middle part of channel layer (3) and close to the side of source electrode cap layers (4), gate region (10) is in N-type channel layer (3) Two sides form left side channel depressed area (8) and right side channel depressed area (9), and region is tool immediately below left side channel depressed area (8) There is the channel highly doped regions (11) of high-dopant concentration.
Further, the depth of left side channel depressed area (8) and right side channel depressed area (9) is 0.05 μm, left side The width of channel depressed area (8) is 0.5 μm, and the width of right side channel depressed area (9) is 1 μm.
Further, doping concentration is 9 × 10 in the N-type channel region17cm-3To 6 × 1018cm-3Section.
There is one kind disclosed by the invention part high dopant channel 4H-SiC gold half field effect should manage, and have below beneficial to effect Fruit:
First, drain current improves.4H-SiC MESFET device peak power output density is proportional to drain electrode saturation electricity Stream, breakdown voltage and knee-point voltage.By introducing N-type channel high-concentration dopant region, make close to source N-type channel region electricity Lotus increases, so that the channel total electrical charge of source-drain area will increase, so the drain saturation current of the device is greatly improved.
Second, device transconductance improves.The mutual conductance of MESFET device reflects gate source voltage to the control energy of channel leakage stream Power.Big device transconductance needs grid down space charged region to concentrate on region under grid as far as possible, reduces it to the greatest extent and expands to grid two sides The trend of exhibition.By the channel introducing highly doped regions on the left of grid, concentration gradient is formed with underface channel on the left of grid, It will effectively prevent grid down space charged region from extending to two sides, i.e. grid down space charged region thickness will effectively increase, to increase Device transconductance.
Third, frequency characteristic improve.By introducing highly doped regions in channel on the left of grid, increase device transconductance, together When device gate-source capacitance amplification it is smaller, thus the frequency characteristic of device improve it is obvious.
Detailed description of the invention
Fig. 1 is structural schematic diagram of the invention;
Description of symbols:
1.4H-SiC semi-insulating substrate, 2.P type buffer layer, 3.N type channel layer, 4. source electrode cap layers, 5. drain electrode cap layers, 6. sources Electrode, 7. drain electrodes, 8. left side channel depressed areas, 9. right side channel depressed areas, 10. gate regions, 11. channel highly doped regions.
Specific embodiment
Below with reference to embodiment and referring to attached drawing, the invention will be further described.
Referring to Figure 1.
There is one kind part high dopant channel 4H-SiC gold half field effect should manage, and be provided with the semi-insulating lining of 4H-SiC from bottom to top Bottom 1, p-type buffer layer 2, N-type channel layer 3, source cap layers 4 and drain electrode cap layers 5 are respectively set in the two sides of N-type channel layer 3, described Active electrode 6 and drain electrode 7,3 middle part of N-type channel layer and close source electrode is respectively set in the surface of source electrode cap layers 4 and drain electrode cap layers 5 The side of cap layers 4 is provided with gate region 10, gate region 10 channel depressed area 8 and right side ditch on the left of 3 two sides of N-type channel layer are formed Road depressed area 9,8 underface region of left side channel depressed area are the channel highly doped regions 11 with high-dopant concentration.
As specific embodiment, the depth of left side channel depressed area 8 and right side channel depressed area 9 is 0.05 μm, left The width of lateral sulcus road depressed area 8 is 0.5 μm, and the width of right side channel depressed area 9 is 1 μm.
As specific embodiment, doping concentration is 9 × 10 in the N-type channel region17cm-3To 6 × 1018cm-3Section.
The present invention makes to increase close to source N-type channel area charge by introducing N-type channel high-concentration dopant region 11, So that the channel total electrical charge of source-drain area will increase, the drain saturation current of resulting devices is greatly improved.It introduces simultaneously N-type channel high-concentration dopant region form concentration gradient with underface channel on the left of grid, will effectively prevent under grid empty Between charged region to two sides extend, i.e. grid down space charged region thickness will effectively increase, to increase device transconductance;Device transconductance increases Device gate-source capacitance only has small increase while adding, and resulting devices frequency characteristic, which has, to be significantly improved.
The above is only a preferred embodiment of the present invention, rather than its limitations;Although should be pointed out that referring to above-mentioned each Embodiment describes the invention in detail, those skilled in the art should understand that, it still can be to above-mentioned each Technical solution documented by embodiment is modified, or equivalent substitution of some or all of the technical features;And this A little modifications and replacement, do not make the essence of corresponding technical solution depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (1)

1. there is one kind part high dopant channel 4H-SiC gold half field effect should manage, which is characterized in that be provided with 4H- from bottom to top Source cap is respectively set in SiC semi-insulating substrate (1), p-type buffer layer (2), N-type channel layer (3), the two sides of N-type channel layer (3) Active electrode (6) and leakage is respectively set in the surface of layer (4) and drain electrode cap layers (5), the source electrode cap layers (4) and drain electrode cap layers (5) Electrode (7) is provided with gate region (10) in the middle part of N-type channel layer (3) and close to the side of source electrode cap layers (4), and gate region (10) is in N Type channel layer (3) two sides formed left side channel depressed area (8) and right side channel depressed area (9), left side channel depressed area (8) just under Square region is the channel highly doped regions (11) with high-dopant concentration, and left side channel depressed area (8) and right side channel are recessed The depth for falling into area (9) is 0.05 μm, and the width of left side channel depressed area (8) is 0.5 μm, the width of right side channel depressed area (9) It is 1 μm, doping concentration is 9 × 10 in the N-type channel region17cm-3To 6 × 1018cm-3Section.
CN201610256739.8A 2016-04-22 2016-04-22 There is one kind part high dopant channel 4H-SiC gold half field effect should manage Active CN105789282B (en)

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CN113257887A (en) * 2021-03-23 2021-08-13 西安电子科技大学 4H-SiC metal semiconductor field effect transistor with three regions
CN113782590A (en) * 2021-09-09 2021-12-10 西安电子科技大学 4H-SiC metal semiconductor field effect transistor with partial sinking channel
CN114944439B (en) * 2022-06-16 2024-07-16 太原理工大学 Transistor type 4H-SiC ultraviolet photoelectric detector and preparation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1717811A (en) * 2002-11-26 2006-01-04 克里公司 Transistors having buried P-type layers beneath the source region and methods of fabricating the same
CN104282764A (en) * 2014-10-28 2015-01-14 西安电子科技大学 4H-SiC metal semiconductor field effect transistor with slope-shaped grid and manufacturing method
CN104916706A (en) * 2015-05-05 2015-09-16 西安电子科技大学 Metal semiconductor field effect transistor with wide-channel deep sags

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US7432142B2 (en) * 2004-05-20 2008-10-07 Cree, Inc. Methods of fabricating nitride-based transistors having regrown ohmic contact regions

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1717811A (en) * 2002-11-26 2006-01-04 克里公司 Transistors having buried P-type layers beneath the source region and methods of fabricating the same
CN104282764A (en) * 2014-10-28 2015-01-14 西安电子科技大学 4H-SiC metal semiconductor field effect transistor with slope-shaped grid and manufacturing method
CN104916706A (en) * 2015-05-05 2015-09-16 西安电子科技大学 Metal semiconductor field effect transistor with wide-channel deep sags

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