CN105789178A - Fuse structure, semiconductor device comprising fuse structure and preparation method - Google Patents

Fuse structure, semiconductor device comprising fuse structure and preparation method Download PDF

Info

Publication number
CN105789178A
CN105789178A CN201410826883.1A CN201410826883A CN105789178A CN 105789178 A CN105789178 A CN 105789178A CN 201410826883 A CN201410826883 A CN 201410826883A CN 105789178 A CN105789178 A CN 105789178A
Authority
CN
China
Prior art keywords
fuse
area
fusing
wires structure
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410826883.1A
Other languages
Chinese (zh)
Inventor
吴建兴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Aviation Chongqing Microelectronics Co Ltd
Original Assignee
China Aviation Chongqing Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Aviation Chongqing Microelectronics Co Ltd filed Critical China Aviation Chongqing Microelectronics Co Ltd
Priority to CN201410826883.1A priority Critical patent/CN105789178A/en
Publication of CN105789178A publication Critical patent/CN105789178A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Fuses (AREA)

Abstract

The invention relates to the technical field of manufacturing of semiconductors, in particular to a fuse structure, a semiconductor device comprising the fuse structure and a preparation method. On the basis of a traditional fuse structure, a groove is formed in a fuse region to form an energy turning point and a discharge point, so that electric energy applied to fuses is concentrated in the region of the groove; the energy turning point and the discharge point can be timely fused after the condition that the current flowing through the fuses or the voltage difference of two ends is greater than a preset value is ensured; re-combination is not generated; meanwhile, a fusing point is controllable; and design of a circuit is facilitated.

Description

Fuse-wires structure, the semiconductor device comprising this fuse-wires structure and preparation method
Technical field
The present invention relates to technical field of manufacturing semiconductors, the semiconductor device particularly relate to a kind of fuse-wires structure, comprising this fuse-wires structure and preparation method.
Background technology
At present, integrated circuit (IC) device all can arrange several fuse (Fuse), for parameters such as protection circuit structure or the fundamental voltages changing device;Such as, in the preparation process of IC-components, owing to there is drift phenomenon, and then can make to prepare and between the virtual voltage of device and the voltage simulated, there is bigger deviation, and in order to reduce this deviation, generally can pass through to utilize the fuse pre-set to be modified when carrying out monocrystalline test (CP) or packaging and testing (FT).
So, fuse in the devices is set, it is accomplished by having easily fusing (easyblowout) and without features such as Hui Lian (nore-combination), so that flowing through the curtage of fuse once exceed predetermined value, it becomes possible to fusing timely and Hui Lian will not be produced.
Fig. 1 is the structural representation of conventional fuse;As it is shown in figure 1, fuse 1 is generally elongate in shape, including the fuse area 13 being arranged between bonding pad, two ends 11 and bonding pad 11, and it is provided with contact head 12 in each bonding pad 11, electrically connects for other structures.Above-mentioned fuse area 13 to be narrower than the width of bonding pad 11, and then forms striking point 14,15 in the place that fuse area 13 contacts with bonding pad 12;When needs fuse 1 fuses or tests, once the voltage at the electric current flowed through in fuse area 13 or two ends exceedes predetermined value, striking point 14 or 15 will burn and melt, but cannot determine which point can blow, and then is unfavorable for the design of circuit.
But, as it is shown in figure 1, owing to fuse 1 being provided with two striking points 14,15, its energy turning point corresponding is also with regard to two, when the voltage of the electric current flowed through in fuse area 13 or two ends exceed predetermined value less time, it arises that scorification failure, and then cannot realize the target preset;Additionally, owing to bonding pad 11 is list structure, its width is not too big relative to the width difference of bonding pad 11, even if above-mentioned scorification successful operation, i.e. striking point 14 or 15 fusing, but owing to the fuse material of molten condition is more and easily flows, very easily produce back even phenomenon (re-combination), and then the defect of device architecture can be caused.
Summary of the invention
For above-mentioned technical problem, the semiconductor device this application provides a kind of fuse-wires structure, comprising this fuse-wires structure and preparation method, can based on the basis of conventional fuse structure, by offering groove in fuse area, and then form energy turnover and point of discharge, so that the electric energy being applied on fuse concentrates in the region of groove, after guaranteeing that the voltage difference at electric current or the two ends flowing through fuse is more than predetermined value, the turnover of this energy can fuse timely with point of discharge, and tieback will not be produced, its striking point is controlled again simultaneously, is beneficial to the design of circuit.
This application provides a kind of fuse-wires structure, including:
Fuse, is provided with fuse area and is positioned at the bonding pad at these fuse area two ends;
Wherein, it is arranged in the described fuse of described fuse area and is provided with groove, for forming fusing place.
As a preferred embodiment, above-mentioned fuse-wires structure, also include:
Electrical contact, is arranged in the described fuse being arranged in described bonding pad, and described fuse is electrically connected with external structure by described electrical contact.
As a preferred embodiment, in above-mentioned fuse-wires structure:
Described fusing place is arranged on described fuse area midpoint along its length.
As a preferred embodiment, in above-mentioned fuse-wires structure:
The area of section being perpendicular on fuse length direction on described fusing place edge in described fuse is minimum.
As a preferred embodiment, in above-mentioned fuse-wires structure:
Described groove structure is tip flutes, and described fusing place is positioned at the bottom of described tip flutes.
As a preferred embodiment, in above-mentioned fuse-wires structure:
At least side sidewall of described fuse offers described groove.
As a preferred embodiment, in above-mentioned fuse-wires structure:
It is positioned at the thickness of fuse of described fuse area less than the thickness of the fuse being positioned at described bonding pad.
Present invention also provides a kind of semiconductor device, including the fuse-wires structure described in above-mentioned any one.
As a preferred embodiment, the described fuse-wires structure in above-mentioned semiconductor device is provided with
Fusing place of big energy, is arranged in the described fuse in the region that described fuse area contacts with described bonding pad, for protecting the damage from instantaneous big electric energy of the described semiconductor device.
As a preferred embodiment, in above-mentioned semiconductor device:
Arrange in described fuse in described fusing place along being perpendicular to the area of section on fuse length direction and shape based on the maximum power feasible value of described semiconductor device.
The preparation method that the application also states that a kind of fuse-wires structure, can be applicable to prepare above-mentioned fuse-wires structure, and the method includes:
Semi-conductive substrate is provided;
In described Semiconductor substrate, prepare fuse, and this fuse is provided with fuse area and is positioned at the bonding pad at these fuse area two ends;
At least side sidewall in the described fuse being positioned at described fuse area offers a groove, to form fusing place in the bottom of this groove.
As a preferred embodiment, in the above-mentioned method preparing fuse-wires structure:
Described fusing place is arranged on described fuse area midpoint along its length.
As a preferred embodiment, in the above-mentioned method preparing fuse-wires structure:
The area of section being perpendicular on fuse length direction on described fusing place edge in described fuse is minimum.
In sum, owing to have employed technique scheme, present patent application describes a kind of fuse-wires structure, comprise semiconductor device and the preparation method of this fuse-wires structure, can based on the basis of traditional fuse-wires structure, by offering groove structure at fuse area, to form energy turnover and point of discharge, when making the pressure reduction at the electric current flowing through on fuse or its two ends more than preset value, can fuse timely, device products is played a protective role or reaches the test purpose preset, and owing to striking point is arranged on the bottom of groove structure, it is not likely to produce the defects such as tieback after making fuse failure, and striking point is controlled, it is additionally favorable for the circuit design of designer.
Accompanying drawing explanation
Fig. 1 is the structural representation of conventional fuse;
Fig. 2 is the structural representation of the fuse that side sidewall offers groove in the embodiment of the present application;
Fig. 3 is the structural representation of the fuse that both sides sidewall offers groove in the embodiment of the present application;
Fig. 4 is the schematic flow sheet preparing fuse-wires structure in the embodiment of the present application.
Detailed description of the invention
Fuse-wires structure in the application includes the fuse being provided with bonding pad and fuse area, and in fuse area, in fuse, offer groove structure, thus can form a striking point in the fuse be positioned at bottom portion of groove, its concrete position can according to technological design requirements set, preferably may be provided at the middle position of fuse area, and guarantee the sectional area sectional area less than fuse area remainder of fusing place, namely the cross section resistance maximum (can set in cross section resistance value) of fusing place is made according to concrete process requirements, during to guarantee the electric energy flowing through fusing place more than preset value, namely this fusing place can fuse, thus disconnecting the electrical connection at fuse-wires structure two ends.
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described:
Embodiment one
Fig. 2 is the structural representation of the fuse that side sidewall offers groove in the embodiment of the present application;As in figure 2 it is shown, a kind of fuse-wires structure, including fuse 2, and this fuse 2 is provided with fuse area 23 and is positioned at the bonding pad 21 at these fuse area 23 two ends.
Further, the fuse 2 in bonding pad 21 also sets up electrical contact 22, so that the electrical contact 22 that the two ends of fuse 2 can be passed through to arrange electrically connects with other circuit structure, and then form the semiconductor device structure such as including integrated circuit (IC) system.
Preferably, the fuse 2 being arranged in fuse area 23 can be even strip-shaped structure, its material can be selected for the metal or alloy etc. that resistivity is relatively big and fusing point is relatively low, more than preset value, (this preset value can be that curtage is poor at the voltage of the electric current or its two ends that flow through it thus can to make the fuse being arranged in fuse area 23, specifically can set according to the circuit structure electrical parameter being connected with fuse 2) time, it will fuse because of electric discharge heating, and then disconnects the electrical connection at fuse 2 two ends.
nullFurther,Due to when fuse 2 fuses,It is arranged in fuse 2 shape matching uniform of fuse area 23,And then make its resistance everywhere comparatively balanced,Thus likely fuse at any one place being arranged in fuse area 23,And so that occur the position fused controlled,One groove can be set in the fuse 2 be arranged in fuse area 23,And then make the cross-sectional area (namely along the sectional area being perpendicular to fuse length direction) being arranged in the fuse of bottom portion of groove less than the sectional area of fuse in other regions of fuse area 23,Thus make the fuse upper section resistance being positioned at bottom portion of groove place maximum,Thus when carrying out testing electrical property or electrical connection,The fuse being positioned at bottom portion of groove region is fused prior to other parts,And then reach the purpose that fuse failure place is controlled,It is beneficial to the circuit design of designer.
Preferably, above-mentioned groove structure may be configured as tip flutes, namely as shown in Figure 2, so that fusing place 26 is formed on the bottom being positioned at tip flutes, and then make fusing place 26 as whole fuse ability transfer and point of discharge, namely fusing place 26 occurs the condition of fusing that the condition of fusing occurs far below its elsewhere, effectively to improve accuracy and the promptness of fuse failure, can significantly avoid the generation of the scorification failure phenomenon of fuse.
Additionally, it is positioned at fusing place 26 of bottom portion of groove, groove owing to offering can remove the fuse of part, and then the thickness making to close on the fuse of this fusing place 26 decreases other positions relatively, and then the generation of the tieback phenomenon produced after can effectively avoiding fusing.
Further, as shown in Figure 2, the position that in fuse 2, fuse area 21 contacts with bonding pad 23 is additionally provided with big energy fusing place 24,25, it is mainly used in the electric energy (such as electric current or two ends pressure reduction) when flowing through fuse 2 to increase suddenly, big energy fusing place 24,25 and fusing place 26 all can fuse, and then are able to ensure that the safety of circuit or device.
Preferably, the area of section of fuse 2 of bonding pad 21 it is arranged in more than the area of section of the fuse 2 being arranged in fuse area 23;Namely along fuse 2 length direction, when being transitioned into fuse area 23 by bonding pad 21, energy turnover and point of discharge is formed in the position of its contact, and then form above-mentioned big energy fusing place 24,25, with when fusing place 26 is broken down and can not be fused, can pass through to fuse big energy fusing place 24,25, the electrical connection at fuse 2 two ends to be disconnected.
Preferably, the condition of above-mentioned big energy fusing place 24,25 fusing is greater than the fusing condition of fusing place 26, the electric current that such as big energy fusing place 24,25 can fuse is greater than the electric current that fusing place 26 can fuse, and the electric current that big energy fusing place 24,25 can fuse is the maximum current that device architecture can bear.
Preferably, as shown in Figure 2, it is arranged in the width of fuse of bonding pad 21 more than the width being arranged in fuse area 22 fuse, and then forms above-mentioned big energy fusing place 24,25 at the width turning point (position namely contacted with bonding pad 21 at fuse area 23) of fuse 2;Equally, above-mentioned big energy fusing place 24,25 is formed also by arranging groove structure, as long as making the maximum current that the blowout current of big energy fusing place 24,25 can bear less than device architecture, and more than the blowout current of fusing place 26, the blowout current of this fusing place simultaneously 26 is also greater than device architecture can the electric current of normal operation.
In fuse in the present embodiment, in fuse area, offer groove structure, to form fusing energy (such as electric current or two ends pressure reduction) fusing place less than other positions, and then the fusing position of fuse-wires structure can be controlled accurately, in order to circuit design;Simultaneously as the fuse of fusing place is relatively thin, being more easy to fusing, after the electric energy in fuse reaches preset value, fusing place can fuse timely, and then can improve the fusing timeliness of fuse;Further, since the fuse in groove structure eliminates a part, and then the tieback produced after can effectively avoiding fusing.
Embodiment two
Fig. 3 is the structural representation of the fuse that both sides sidewall offers groove in the embodiment of the present application;As shown in Figure 3; on basis based on above-described embodiment one; fuse-wires structure in this enforcement; include being provided with fuse area 23 too and be positioned at the fuse 1 of bonding pad 21 at fuse area 23 two ends; simple and clear in order to set forth; in the present embodiment with above-described embodiment once in identical content is not tired at this states, but those skilled in the art use technical scheme in the present embodiment all in the scope of the application protection based on the correlation technique feature set forth in above-described embodiment one.
As it is shown on figure 3, for the fusing timeliness further improving fuse 2, groove structure can be respectively provided with at least side sidewall of fuse 2, to increase the sectional area difference of the fuse in fusing place and other regions being positioned at bottom portion of groove;In the present embodiment, it is then be provided with groove on the both sides sidewall of fuse, more excellent is then arrange to be symmetrical arranged groove structure, so that there is bigger difference in fusing place 27 of bottom portion of groove formation with the fuse cross-sectional area in other regions, while improving the fusing timeliness of fusing place 27, moreover it is possible to further avoid fusing place 27 to fuse the generation of tieback.
Preferably, so that fuse 2 has the effect that better fuses, above-mentioned fusing place 27 can be arranged on the middle position of fuse area 23, namely as shown in Figure 3, the fuse being arranged in fuse area 23 has length L, then fusing place 27 is L/2 at a distance of the distance at fuse area 23 two ends, thus make fuse 2 at Lian electricity Hou, the electric energy flowing through it can converge to the center point of fuse 2, and for energy turning point and point of discharge, (being shaped as of fusing place 27 groove is pointed because of this fusing place 27, it is more likely formed natural point of discharge), and then fuse 2 can be improved further only at the probability of fusing place 27 position fusing, relatively can also further avoid the generation of fusing tieback by single-sided side walls groove structure simultaneously.
Embodiment three
Present invention also provides a kind of semiconductor device; this semiconductor device includes the fuse-wires structure in above-described embodiment one and/or embodiment two; specifically can be as Figure 2-3; simple and clear in order to set forth; the content identical with above-described embodiment one and/or embodiment two in the present embodiment also refuses tired stating at this, but those skilled in the art use technical scheme in the present embodiment all in the scope of the application protection based on the correlation technique feature set forth in above-described embodiment one and/or embodiment two.
Preferably, can arrange in fuse 2 in fusing place 26 or 27 along being perpendicular to the area of section on fuse 2 length direction and shape based on the maximum power feasible value of above-mentioned semiconductor device;It is positive number if maximum power feasible value is a numerical range [A, B], A and B, and A is more than energy value more than the normal operation of semiconductor device of B, B;It addition, the fusing electric energy of big energy fusing place 24,25 is less than or equal to A, but more than B;And the fusing electric energy of fusing place 26 or 27 is less than the fusing electric energy of big energy fusing place 24,25, and the energy value of the normal operation more than semiconductor device.
Embodiment four
Fig. 4 is the schematic flow sheet preparing fuse-wires structure in the embodiment of the present application;As shown in Figure 4, the method preparing fuse-wires structure of this enforcement, specifically include that
First, it is provided that semi-conductive substrate, this Semiconductor substrate can be provided with other circuit structures.
Then, with preparation in this Semiconductor substrate, there is fuse area and be positioned at the fuse of bonding pad of fuse area segment.
Finally, at least side sidewall of fuse being positioned at fuse area is offered the groove of pointed shape, form fusing place with the tip location in this bottom portion of groove region, and then form fuse-wires structure as shown in Figure 2 or Figure 3.
Preferably, above-mentioned fusing place is arranged on the midpoint of the fuse of fuse area, and the cross-sectional area in other regions is all higher than being positioned at the area of the cross section of fusing place in fuse, to guarantee that fusing place can be fused timely and effectively and will not produce the defects such as tieback.
Preferably; owing to the method for the present embodiment can be used for preparing the fuse-wires structure set forth in above-described embodiment one and/or embodiment two; its relevant technical characteristic corresponding is also applied in the present embodiment, so those skilled in the art use technical scheme in the present embodiment also all in the scope of the application protection based on the correlation technique feature set forth in above-described embodiment one and/or embodiment two.
To sum up, owing to have employed technique scheme, a kind of fuse-wires structure recorded in the embodiment of the present application, comprise semiconductor device and the preparation method of this fuse-wires structure, all can based on the basis of traditional fuse-wires structure, by offering groove structure at fuse area, to form energy turnover and point of discharge, make when the electric energy (pressure reduction such as electric current or its two ends) flowing through on fuse is more than preset value, can fuse timely, device products is played a protective role or reaches the test purpose preset, and owing to striking point is arranged on the bottom of groove structure, it is not likely to produce the defects such as tieback after making fuse failure, and striking point is controlled, it is additionally favorable for the circuit design of designer.
By illustrating and accompanying drawing, give the exemplary embodiments of the ad hoc structure of detailed description of the invention, based on present invention spirit, also can do other conversion.Although foregoing invention proposes existing preferred embodiment, but, these contents are not intended as limitation.
For a person skilled in the art, after reading described above, each middle variations and modifications will be apparent to undoubtedly.Therefore, appending claims should regard whole variations and modifications of the true intention containing the present invention and scope as.In Claims scope, the scope of any and all equivalence and content, be all considered as still belonging to the intent and scope of the invention.

Claims (13)

1. a fuse-wires structure, it is characterised in that including:
Fuse, is provided with fuse area and is positioned at the bonding pad at these fuse area two ends;
Wherein, it is arranged in the described fuse of described fuse area and is provided with groove, for forming fusing place.
2. fuse-wires structure as claimed in claim 1, it is characterised in that also include:
Electrical contact, is arranged in the described fuse being arranged in described bonding pad, and described fuse is electrically connected with external structure by described electrical contact.
3. fuse-wires structure as claimed in claim 1, it is characterised in that described fusing place is arranged on described fuse area midpoint along its length.
4. fuse-wires structure as claimed in claim 1, it is characterised in that minimum along the area of section being perpendicular on fuse length direction in described fusing place in described fuse.
5. fuse-wires structure as claimed in claim 1, it is characterised in that described groove structure is tip flutes, and described fusing place is positioned at the bottom of described tip flutes.
6. fuse-wires structure as claimed in claim 1, it is characterised in that offer described groove at least side sidewall of described fuse.
7. fuse-wires structure as claimed in claim 1, it is characterised in that be positioned at the thickness of fuse of described fuse area less than the thickness of the fuse being positioned at described bonding pad.
8. a semiconductor device, it is characterised in that include the fuse-wires structure as described in any one in claim 1~7.
9. semiconductor device as claimed in claim 8, it is characterised in that described fuse-wires structure is additionally provided with:
Fusing place of big energy, is arranged in the described fuse in the region that described fuse area contacts with described bonding pad, for protecting the damage from instantaneous big electric energy of the described semiconductor device.
10. semiconductor device as claimed in claim 8, it is characterised in that arrange in described fuse in described fusing place along being perpendicular to the area of section on fuse length direction and shape based on the maximum power feasible value of described semiconductor device.
11. the preparation method of a fuse-wires structure, it is characterised in that including:
Semi-conductive substrate is provided;
In described Semiconductor substrate, prepare fuse, and this fuse is provided with fuse area and is positioned at the bonding pad at these fuse area two ends;
At least side sidewall in the described fuse being positioned at described fuse area offers a groove, to form fusing place in the bottom of this groove.
12. preparation method as claimed in claim 11, it is characterised in that described fusing place is arranged on described fuse area midpoint along its length.
13. preparation method as claimed in claim 11, it is characterised in that minimum along the area of section being perpendicular on fuse length direction in described fusing place in described fuse.
CN201410826883.1A 2014-12-25 2014-12-25 Fuse structure, semiconductor device comprising fuse structure and preparation method Pending CN105789178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410826883.1A CN105789178A (en) 2014-12-25 2014-12-25 Fuse structure, semiconductor device comprising fuse structure and preparation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410826883.1A CN105789178A (en) 2014-12-25 2014-12-25 Fuse structure, semiconductor device comprising fuse structure and preparation method

Publications (1)

Publication Number Publication Date
CN105789178A true CN105789178A (en) 2016-07-20

Family

ID=56389382

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410826883.1A Pending CN105789178A (en) 2014-12-25 2014-12-25 Fuse structure, semiconductor device comprising fuse structure and preparation method

Country Status (1)

Country Link
CN (1) CN105789178A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6271574B1 (en) * 1998-05-14 2001-08-07 Stmicroelectronics S.A. Integrated circuit fuse with localized fusing point
CN1459831A (en) * 2002-05-15 2003-12-03 台湾积体电路制造股份有限公司 Metal fuse structure of semiconductor assembly part and its manufacturing method
CN1606157A (en) * 2003-10-10 2005-04-13 松下电器产业株式会社 Semiconductor device with polysilicon fuse and method for trimming the same
US20140210042A1 (en) * 2013-01-25 2014-07-31 Seiko Instruments Inc. Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6271574B1 (en) * 1998-05-14 2001-08-07 Stmicroelectronics S.A. Integrated circuit fuse with localized fusing point
CN1459831A (en) * 2002-05-15 2003-12-03 台湾积体电路制造股份有限公司 Metal fuse structure of semiconductor assembly part and its manufacturing method
CN1606157A (en) * 2003-10-10 2005-04-13 松下电器产业株式会社 Semiconductor device with polysilicon fuse and method for trimming the same
US20140210042A1 (en) * 2013-01-25 2014-07-31 Seiko Instruments Inc. Semiconductor device

Similar Documents

Publication Publication Date Title
CN108023055A (en) Secondary battery
CN205376400U (en) Temperature fuse device
CN107533889A (en) Rectangular chip resistor device and its manufacture method
CN103915411B (en) Electrically programmable fuse structures
CN103730301B (en) Fuse
US10784484B2 (en) Connecting element, current-collecting device and associated production method
CN206379445U (en) Heating film group and power-supply device
CN206225447U (en) Busbar component, electrokinetic cell overload protective device and power battery assembly
CN105789178A (en) Fuse structure, semiconductor device comprising fuse structure and preparation method
CN106208186B (en) Secondary battery pack and protection element therefor
CN104037030B (en) There are the safeties of U-shaped memorial alloy
CN104317457B (en) Bridging structure and contact panel for contact panel
CN203950625U (en) Novel heat protection piezo-resistance and Surge Protector
CN103178095B (en) A kind of high temperature schottky diode
CN100517686C (en) Semiconductor device
CN205264765U (en) Battery pack
CN205881850U (en) Totally closed expulsion fuse
CN204215992U (en) Photovoltaic fused mass of fuse
CN103872011B (en) Electrically programmable fuse structure
CN202352661U (en) Fuse wire circuit for FT-Trim of IC chip
CN104485282A (en) Manufacturing method of discharge tube chip
CN108899382A (en) A kind of repair method and solar panel of solar panel laser scoring exception
CN102915961B (en) Manufacturing method of electronic programmable fuse device
CN203839150U (en) Thermal protection type voltage dependent resistor with high pass flow
CN204011347U (en) Resistance to high surging fuse unit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20160720