CN105788550B - Gate electrode side fan-out area circuit - Google Patents

Gate electrode side fan-out area circuit Download PDF

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Publication number
CN105788550B
CN105788550B CN201610292187.6A CN201610292187A CN105788550B CN 105788550 B CN105788550 B CN 105788550B CN 201610292187 A CN201610292187 A CN 201610292187A CN 105788550 B CN105788550 B CN 105788550B
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chip
grid
circuit
circuit module
out area
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CN105788550A (en
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黄笑宇
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2016/089741 priority patent/WO2017190425A1/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses gate electrode side fan-out area circuit, including grid chipset and circuit module group, the grid chipset includes N number of grid chip, wherein N is the positive integer more than or equal to 2;The circuit module group generates according to the input signal that N number of grid chip provides and exports corresponding output signal.According to the circuit, the commonality of PCB (printed circuit board) can be improved, reduce management cost.

Description

Gate electrode side fan-out area circuit
Technical field
All things considered of the present invention is related to field of liquid crystal panel display, and more particularly more particularly to a kind of gate electrode side is fanned out to Area circuit.
Background technique
(Thin Film Transistor Liquid Crystal Display, tft liquid crystal are aobvious by TFT-LCD Show device) it is one of the principal item that current flat panel is shown, have become modern IT, display platform important in video product. TFT-LCD controls each pixel unit using active elements such as thin film transistor (TFT) (thin-film transistor, TFT) Open and close, and liquid crystal material is controlled to the penetrance of light to show image according to video signal.Liquid crystal display It is equipped with the display panel comprising pixel array and the driving circuit for driving liquid crystal display panel.Display panel is equipped with more The parallel data line of item and scan line, data line and scan line are interlocked vertically, and are equipped with pixel unit and control in staggered place The thin film transistor switch of pixel unit processed.Driving circuit includes source electrode driver and gate drivers, and source electrode driver provides Data line is relevant to the signal of display image, and gate drivers provide the signal that scan line opens or closes thin film transistor (TFT).
As shown in Figure 1, it drives configuration diagram, the existing main driving principle of TFT-LCD for TFT-LCD in the prior art Including: system board passes through the connector (connector) on wire rod and pcb board 1 for R/G/B signal, control signal and power It is connected, pcb board passes through S-COF (Source-Chip on Film, film on source electrode chip) chip 2 and G-COF (Gate- Chip on Film, grid chip on film) chip 3 connect with display area (Display Area) 4, so that LCD is obtained Obtain required power supply and signal.In order to implement narrow frame design, and electronic product is responded towards light and short, better function and speed The fast development of degree, the trend development that the technology of driving chip encapsulation is also thinner towards thickness, area is smaller, grid chip and source electrode core Piece all uses chip-on-film (Chip on Film, COF) type packaged type.In Fig. 1 as it can be seen that fan-out area (Fan Out Area) 5 be part that 4 signal line of display area is connect with driving chip, gate line and source data line via being fanned out to Region 5 is connected to S-COF chip 2 and G-COF chip 3, and the fan-out area 5 positioned at 3 side of grid drive chip G-COF chip can With referred to as gate electrode side fan-out area.
But with the development of display technology, abnormity screen starts to be applied in commercial display, due to abnormity shield its length and width with Traditional design is different (for example, abnormity screen as shown in Figures 2 and 3), therefore, will lead to the resolution ratio and traditional design of abnormity screen Liquid crystal display device resolution ratio it is different, therefore, be set to and pass to cooperate abnormity screen display that user is needed to manually adjust The display pattern for the sequence controller (T-CON) united on the matched pcb board 1 of liquid crystal display panel of design, alternatively, collocation is directed to The PCB of abnormity screen, but the raising of the management cost and cost of manufacture of PCB is caused through the above way, it can not adapt at present Reduce the demand of management cost and cost of manufacture.
Summary of the invention
In view of this, it is an object of the present invention to provide a kind of gate electrode side fan-out area circuit, to solve the management of existing PCB Cost and cost of manufacture are higher, can not adapt to the defect for reducing the demand of management cost and cost of manufacture at present.
Exemplary embodiment of the present provides gate electrode side fan-out area circuit, which is characterized in that including grid chipset and Circuit module group, the grid chipset include N number of grid chip, wherein N is the positive integer more than or equal to 2;The circuit mould Block group generates according to the input signal that N number of grid chip provides and exports corresponding output signal.
Optionally, the sequence controller of display device detects the output signal generated from circuit module group, and based on detecting To output signal control the display pattern of display device.
Optionally, the circuit module group includes the circuit module of N number of parallel connection, and each circuit module is according to corresponding grid Chip provide input signal generate and export corresponding output signal, wherein N number of grid chip with it is described N number of in parallel Circuit module correspond.
Optionally, the output signal of generation is output in the source electrode chip group of source side fan-out area by each circuit module Corresponding source electrode chip, wherein source electrode chip group includes N number of source electrode chip, N number of source electrode chip with it is described N number of in parallel Circuit module correspond.
Optionally, the sequence controller of display device detects source electrode chip from the received output signal of circuit module, and base The display pattern of display device is controlled in the output signal detected.
Optionally, each circuit module in N number of circuit module be one switch, wherein it is each switch in response to The input signal on or off that corresponding grid chip provides.
Optionally, the switch is NMOS transistor.
Optionally, the display device has N kind display pattern.
Optionally, each grid chip in N number of grid chip is grid chip on film.
Optionally, each source electrode chip in N number of source electrode chip is source electrode chip on film.
The gate electrode side fan-out area circuit provided according to an exemplary embodiment of the present, not only can automatically adjust display The display pattern of device also significantly reduces the management cost and cost of manufacture of PCB.
Detailed description of the invention
By the detailed description carried out below in conjunction with the accompanying drawings, above and other purpose of exemplary embodiment of the present, spy Point and advantage will become apparent, in which:
Fig. 1 shows the configuration diagram of Thin Film Transistor-LCD in the prior art;
Fig. 2 shows the configuration diagrams of a heterotype film transistor liquid crystal display (TFT-LCD) in the prior art;
Fig. 3 shows the configuration diagram of another heterotype film transistor liquid crystal display (TFT-LCD) in the prior art;
Fig. 4 shows the block diagram of gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit;
Fig. 5 shows the example of gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit;
Fig. 6 shows the signal of the signal of the detecting of sequence controller in one cycle according to an exemplary embodiment of the present invention Figure;
Fig. 7 shows the example of another gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit;
Fig. 8 shows the example of the gate electrode side fan-out area circuit of another exemplary embodiment according to the present invention;
Fig. 9 shows the example of the gate electrode side fan-out area circuit of another exemplary embodiment according to the present invention.
Specific embodiment
Now, different example embodiments is more fully described with reference to the accompanying drawings, wherein some exemplary embodiments are attached It is shown in figure, wherein identical label always shows identical component.
Fig. 4 shows the block diagram of gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit.
As shown in figure 4, gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit includes grid chipset 10 With circuit module group 20, wherein the grid chipset 10 includes N number of grid chip, wherein N is just whole more than or equal to 2 Number.Here, as an example, each grid chip in N number of grid chip is grid chip on film.Particularly, The circuit module group 20 generates according to the input signal that N number of grid chip provides and exports corresponding output signal.Institute Stating output signal can be used for controlling the display pattern of display device.
In addition, as an example, when circuit module group 20 generates and defeated according to the input signal that the N number of grid chip provides Out after corresponding output signal, the sequence controller being set on the pcb board of display device can be detected to be produced from circuit module group 20 Raw output signal, and control based on the output signal detected the display pattern of display device.
Fig. 5 shows the example of gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit.
As shown in fig. 5, it is assumed that grid chipset 10 included by the circuit of gate electrode side fan-out area includes three grid chips (G-COF1-G-COF3 in such as Fig. 5), the circuit module group 20 may include conducting wire A and resistance R, wherein conducting wire A is The cabling of gate electrode side fan-out area, one end of conducting wire A is by the source electrode chip of source side fan-out area (for example, on a film Source electrode chip) it is connected with sequence controller, the other end of conducting wire A is grounded by resistance R, grid chip G-COF1-G-COF3 Output pin a, b and c be respectively connected to conducting wire A.Here, it should be appreciated that not only may be used according to the grid chipset 10 in this example , can also be more or less including three grid chips, but include at least two.
Particularly, when vertical scanning signal is transmitted to grid chip G-COF1-G-COF3, G-COF1-G-COF3 Output pin a, b and c export the output of vertical scanning signal and grid chip G-COF1-G-COF3 simultaneously to viewing area Open signal, here, the vertical scanning signal are identical as the open signal of viewing area.Circuit module group 20 can be according to grid core The signal that piece G-COF1-G-COF3 is provided generates and exports corresponding output signal, sequence controller T-CON can be based on via The source electrode chip received output signal generated from circuit module group 20 controls the display pattern of display device.
For example, conducting wire A is defeated within a scan period when the framework of Thin Film Transistor-LCD is as shown in Figure 1 Out shown in (a) into the signal of sequence controller such as Fig. 6, that is, within a scan period there are three square wave output (for example, The square wave of three 33V), at this point, sequence controller is based on these three square-wave signals detected by the display pattern of display device It is set as normal displaying mode.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 2, conducting wire A is scanned at one In period shown in (b) of the output into the signal such as Fig. 6 of sequence controller, there are two square waves within a scan period by conducting wire A It exports (for example, square wave of two 33V), at this point, sequence controller T-CON will be shown based on the two square-wave signals detected The display pattern of device is set as vertical resolution and reduces to the special-shaped display pattern of original one third.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 3, conducting wire A is scanned at one In period shown in (c) of the output into the signal such as Fig. 6 of sequence controller, conducting wire A has a square wave within a scan period It exports (for example, square wave of a 33V), at this point, sequence controller T-CON will be shown based on this square-wave signal detected The display pattern of device is set as vertical resolution and reduces to original 2/3rds special-shaped display pattern.
By the above-mentioned means, sequence controller can be based on the high-voltage square-wave of detection when display device is different frameworks The quantity of signal correspondingly sets different display patterns, allows the framework of a variety of display devices to share same PCB, mentions The high commonality of PCB, reduces management cost.
Fig. 7 shows the example of the gate electrode side fan-out area circuit of another exemplary embodiment according to the present invention.
As shown in Figure 7, it is assumed that grid chipset 10 included by the circuit of gate electrode side fan-out area includes three grid chips (G-COF1-G-COF3 in such as Fig. 7), the circuit module group 20 may include two conducting wire A and B and two similar resistance Resistance R1 and R2, wherein conducting wire A and B are the cabling of gate electrode side fan-out area, and one end of conducting wire A and B are fanned out to by source side The source electrode chip in region is connected with the sequence controller on pcb board and (is not shown in Fig. 7), and the other end of conducting wire A is connected to grid The output pin b of pole piece piece G-COF2, the output pin a of grid chip G-COF1 are connected to conducting wire A after connecting with resistance R1, lead The other end of line B is grounded by resistance R2.Here, it should be appreciated that according to the grid chipset 10 in this example not only may include three A grid chip, can also be more or less, but include at least two.
Particularly, circuit module group 20 can be generated and be exported according to the signal that grid chip G-COF1-G-COF3 is provided Corresponding output signal, sequence controller T-CON can be based on received from the defeated of the generation of circuit module group 20 via source electrode chip Signal controls the display pattern of display device out.
For example, when the framework of Thin Film Transistor-LCD is as shown in Figure 1, when sequence controller is via source electrode chip When the received output signal generated from circuit module 20 is low level signal and high level signal, sequence controller is based on detecting To low level signal and high level signal the display pattern of display device is set as normal displaying mode.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 2, when sequence controller via When the received output signal generated from circuit module 20 of source electrode chip is two low level signals, sequence controller is based on detecting To two low level signals by the display pattern of display device be set as vertical resolution reduce it is different to original one third Shape display pattern.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 3, when sequence controller via When the received output signal generated from circuit module group 20 of source electrode chip is high level signal and low level signal, timing control The display pattern of display device is set as vertical resolution based on the high level signal and low level signal detected by device to be reduced To original 2/3rds special-shaped display pattern.
By the above-mentioned means, can be when display device is different frameworks, sequence controller can be based on the circuit of detection The output signal that module group 20 generates, correspondingly sets different display patterns, the framework of a variety of display devices is total to With same PCB, the commonality of PCB is improved, management cost is reduced.
Fig. 8 shows the example of the gate electrode side fan-out area circuit of another exemplary embodiment according to the present invention.
As shown in Figure 8, it is assumed that grid chipset 10 included by the circuit of gate electrode side fan-out area includes three grid chips (G-COF1-G-COF3 in such as Fig. 8), the circuit module group 20 may include three conducting wires A, B and C and respectively with conducting wire A, B With C concatenated resistance R1, R2 and R3, wherein conducting wire A, B and C are the cabling of gate electrode side fan-out area, one end of conducting wire A, B and C It is connected and (is not shown in Fig. 8) with the sequence controller on pcb board by the source electrode chip of source side fan-out area, conducting wire A, The other end of B and C respectively via with the concatenated resistance eutral grounding of each wire.The output pin a connection of grid chip G-COF1 is led The output pin c connecting wire C of output pin the b connecting wire B, grid chip G-COF3 of line A, grid chip G-COF2.This In, it should be appreciated that it according to the grid chipset 10 in this example not only may include three grid chips, can also be more or less, But include at least two.
Particularly, the output signal that circuit module group 20 can be provided according to grid chip G-COF1-G-COF3 generates simultaneously Corresponding output signal is exported, sequence controller can be based on via the received output generated from circuit module group 20 of source electrode chip Signal controls the display pattern of display device.
For example, when the framework of Thin Film Transistor-LCD is as shown in Figure 1, when sequence controller is via source electrode chip When the received output signal generated from circuit module 20 is three high level signals, sequence controller is based on three detected The display pattern of display device is set as normal displaying mode by high level signal.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 2, when sequence controller via The received output signal generated from circuit module 20 of source electrode chip is high level signal, high level signal and low level signal When, sequence controller is based on the high level signal, high level signal and low level signal detected by the display mould of display device Formula is set as vertical resolution and reduces to the special-shaped display pattern of original one third.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 3, when sequence controller via When the received output signal generated from circuit module group 20 of source electrode chip is three low level signals, sequence controller is based on detecing The display pattern of display device is set as vertical resolution by three low level signals measured to be reduced to original 2/3rds Special-shaped display pattern.
By the above-mentioned means, can be when display device is different frameworks, sequence controller can be based on the circuit of detection The output signal that module group 20 generates, correspondingly sets different display patterns, the framework of a variety of display devices is total to With same PCB, the commonality of PCB is improved, management cost is reduced.
In another embodiment, the circuit module group includes the circuit module of N number of parallel connection, and each circuit module is according to phase The input signal that the grid chip answered provides generates and exports corresponding output signal, wherein N number of grid chip with it is described The circuit module of N number of parallel connection corresponds.
Particularly, each circuit module is generated according to the input signal that corresponding grid chip provides and is exported corresponding Output signal.For example, each grid chip in the grid chipset is grid chip on film, N number of circuit module In each circuit module be a switch, wherein each switch may be in response to the input signal that corresponding grid chip provides On or off.
In addition, as an example, after each circuit module produces corresponding output signal, it can be defeated by the output signal Out into source electrode chip group, with the display pattern for controlling display device.
Particularly, source electrode chip group may include N number of source electrode chip, here, each source electrode in N number of source electrode chip Chip can be source electrode chip on film.N number of source electrode chip is corresponded with N number of circuit module in parallel, each The output signal of generation can be output to the corresponding source electrode chip in the source electrode chip group of source side fan-out area by circuit module. The sequence controller detecting source electrode chip of display device is believed from the received output signal of circuit module, and based on the output detected Number control the display pattern of display device.Here, as an example, the display device can have N kind display pattern.
By the above-mentioned means, circuit module can generate according to input signal and export corresponding output signal, thus when making Sequence controller is based on output signal setting and the current matched display pattern of display device framework.
In the following, will be described in detail in conjunction with specific example.
Fig. 9 shows the example of gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit.
Referring to Fig. 9, as an example it is supposed that grid chipset 10 included by gate electrode side fan-out area circuit 100 includes three A grid chip (G-COF1-G-COF3 in such as Fig. 5), correspondingly, circuit module group 20 includes and grid chip G-COF1-G- The one-to-one circuit module of COF3 (M1-M3 in such as Fig. 5), here, as an example, each electricity in the circuit module group Road module can be a switch, for example, NMOS tube, wherein each switch may be in response to its corresponding grid chip and provide Input signal on or off, for example, when switch be NMOS tube when, when input signal be high level signal when, NMOS tube is led It is logical.Here, it should be appreciated that in this example, circuit module group 20 includes 3 circuit modules in parallel, it is of course also possible to it is more or Less, but it is at least two.It will be understood by those skilled in the art that other circuit modules that similar functions may be implemented also are fitted For the present invention.In addition, as an example, three grid chips and with three grid chips one-to-one three open Pass may be disposed in the gate electrode side fan-out area of liquid crystal display device.
Particularly, the grid a1-a3 of each switch (that is, M1-M3) is separately connected corresponding grid chip G-COF1- The output pin A1-A3 of G-COF3, for example, the A1 output pin connection grid chip G-COF1 of grid chip G-COF1 is corresponding The grid of the corresponding switch M2 of A2 output pin connection grid chip G-COF2 of the grid a1 of switch M1, grid chip G-COF2 The grid a3 of the corresponding switch M3 of A3 output pin connection grid chip G-COF3 of a2, grid chip G-COF3.In addition, switch The source electrode b1-b3 of M1-M3 is connected with the corresponding source electrode chip in the source electrode chip group of source electrode fan-out area respectively, for example, opening The source electrode b1 for closing M1 is connected to the input pin d1 of source electrode chip S-COF1, and the source electrode b2 of switch M1 is connected to source electrode chip S- The source electrode b3 of the input pin d2 of COF2, switch M3 are connected to the input pin d3 of source electrode chip S-COF3.Sequence controller T- The input pin k of CON is connected with the output pin e1-e3 of source electrode chip S-COF1-S-COF3 respectively, the leakage of switch M1-M3 Pole c1-c3 ground connection.Here, the resistance R in Fig. 9 is equivalent resistance when NMOS is connected.
Hereinafter, the working principle of gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit is described.
Particularly, grid chip can send input signal to corresponding switch, and switch is sent according to grid chip Input signal on or off, and the corresponding output signal of generation is exported to the source electrode chip of source side fan-out area, The sequence controller of display device detects source electrode chip from switching received output signal, and based on the output signal detected come Set the display pattern for being suitble to current liquid crystal display device framework.
For example, the framework of the Thin Film Transistor-LCD of prior art Plays is as shown in Figure 1, work as thin film transistor (TFT) When the framework of liquid crystal display is as shown in Figure 1, grid chip G-COF1 is sent by output pin A1 to the grid a1 of switch M1 High level signal, G-COF2 are by output pin A2 to the grid a2 of switch M2 sends high level signal, G-COF3 passes through output Pin A3 sends high level signal to the grid a3 of switch M3, and switch M1, M2 and M3 conducting are then transferred to by source electrode b1-b3 The output signal of source electrode chip S-COF1, S-COF2 and S-COF3 be low level signal, low level signal and low level signal, this When, sequence controller T-CON is detected from received three low level signals of switch M1, M2 and M3, and based on three detected The display pattern of display device is set as normal displaying mode by signal.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 2, grid chip G-COF1 is logical Output pin A1 is crossed to the grid a1 of switch M1 sends high level signal, G-COF2 passes through grid of the output pin A2 to switch M2 A2 sends high level signal, and the grid a3 of M3 does not receive input signal, then switch M1, M2 is connected, and M3 cut-off then passes through source electrode The output signal that b1-b3 is transferred to source electrode chip S-COF1, S-COF2 and S-COF3 is low level signal, low level signal and height Level signal, at this point, sequence controller T-CON detecting from the received low level signal of switch M1, M2 and M3, low level signal and High level signal, and the display pattern of display device is set as vertical resolution based on three signals detected and is reduced to original Carry out the special-shaped display pattern of one third.
As another example, when the framework of Thin Film Transistor-LCD is as shown in Figure 3, grid chip G-COF1 is logical It crosses output pin A1 and does not receive input letter to the grid a2 and a3 that the grid a1 of switch M1 sends high level signal, M2 and M3 Number, then switch M1 is connected, and M2, M3 cut-off are then transferred to source electrode chip S-COF1, S-COF2 and S-COF3 by source electrode b1-b3 Output signal be low level signal, high level signal and high level signal, at this point, detecting it is received from switch M1, M2 and M3 Low level signal, high level signal and high level signal, and based on three signals detected by the display pattern of display device It is set as vertical resolution to reduce to original 2/3rds special-shaped display pattern.
In conclusion gate electrode side fan-out area according to an exemplary embodiment of the present invention circuit, not only can automatically adjust The display pattern of whole display device also significantly reduces the management cost and cost of manufacture of PCB.
Obviously, protection scope of the present invention is not limited to the specific embodiment of appeal, and those skilled in the art can To carry out various modification and variations without departing from the spirit and scope of the present invention to invention.In this way, if these of the invention are repaired Change with modification within the scope of the claims of the present invention and its equivalent technology, then the present invention be also intended to encompass these change and Including modification.

Claims (9)

1. a kind of gate electrode side fan-out area circuit, which is characterized in that including grid chipset and circuit module group,
The grid chipset includes N number of grid chip, wherein N is the positive integer more than or equal to 2;
The circuit module group generates according to the input signal that N number of grid chip provides and exports corresponding output signal;
The sequence controller of display device detects the output signal generated from circuit module group, and based on the output signal detected Control the display pattern of display device, the display pattern includes normal displaying mode and special-shaped display pattern;The display Vertical resolution of the device under the special-shaped display pattern is less than the display device hanging down under the normal displaying mode Straight resolution ratio.
2. gate electrode side fan-out area as described in claim 1 circuit, which is characterized in that the circuit module group include it is N number of simultaneously The circuit module of connection, each circuit module generate according to the input signal that corresponding grid chip provides and export corresponding output Signal,
Wherein, N number of grid chip is corresponded with N number of circuit module in parallel.
3. gate electrode side fan-out area as claimed in claim 2 circuit, which is characterized in that each circuit module is by the output of generation Signal is output to the corresponding source electrode chip in the source electrode chip group of source side fan-out area,
Wherein, source electrode chip group includes N number of source electrode chip, and N number of source electrode chip and N number of circuit module in parallel are one by one It is corresponding.
4. gate electrode side fan-out area as claimed in claim 3 circuit, which is characterized in that the sequence controller of display device is detected Source electrode chip controls based on the output signal detected the display mould of display device from the received output signal of circuit module Formula.
5. gate electrode side fan-out area as claimed in claim 2 circuit, which is characterized in that each of described N number of circuit module Circuit module is a switch, wherein each to switch the input signal on or off provided in response to corresponding grid chip.
6. gate electrode side fan-out area as claimed in claim 5 circuit, which is characterized in that the switch is NMOS transistor.
7. gate electrode side fan-out area as claimed in claim 4 circuit, which is characterized in that there is the display device N kind to show Mode.
8. gate electrode side fan-out area as described in claim 1 circuit, which is characterized in that each of described N number of grid chip Grid chip is grid chip on film.
9. gate electrode side fan-out area as claimed in claim 3 circuit, which is characterized in that each of described N number of source electrode chip Source electrode chip is source electrode chip on film.
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